MTDMA (Multimedia, Multimode TDMA) system has been developed for the 3rd generation mobile communications. An adaptive modulation technique is employed, which select 16 QAM or QPSK modulations fit for the O (Indoor Office)/P (Outdoor to Indoor and Pedestrian) communication environments. The maximum user rate of 4 Mbps is realized. Basic specification is described for O, P and V environments.

This paper presents a novel transmission diversity scheme for code division multiple access system. Conventional diversity receivers in mobile stations require space and complicated circuits, however, the proposed diversity schemes present significant diversity effect without any diversity equipment at the mobile station. It is possible to use the transmitter diversity at the base station by using the feature of time division duplex (TDD) which has strongly correlated fading patterns in both forward and reverse link. Computer simulation is performed to evaluate the performance of the proposed systems for single user environment. The performance of the system 1, which select best situated antenna, is analyzed and the BER performance for multiple access is presented.

This paper proposes an adaptive permission probability control method for the CDMA/PRMA access protocol. The proposed method is effective to the uplink channels of the integrated voice and data wireless system. The proposed method uses the R-ALOHA protocol with end-of-use flags in order to avoid the reservation cancellations caused by excessive multiple-access interference. Also, a higher priority at packet transmission is given to voice compared with data so that the real-time transmission of voice packets can be guaranteed. Priority is controlled by suitably varying permission probabilities. Permission probabilities are adaptively calculated according to both the channel load and the channel capacities. The usefulness of this proposed method is ensured through computer simulation in an isolated cell environment. Moreover, various applications to cellular environments are investigated. The calculated results indicate that transmission efficiency has been improved compared with the conventional CDMA/PRMA protocol.

This paper describes methods used in the design of a high speed burst modem applied for mobile communication systems. The modem has burst mode operations including burst mode AGC (automatic gain control), burst mode BTR (bit timing recovery), adaptive equalization, and diversity based on a selection algorithm to achieve a higher performance in multipath fading channels. Moreover, the performance of the burst modem, which is developed using analog signal processing devices, DSPs (digital signal processors), and FPGAs (field programmable gate arrays), is analyzed experimentally. Results show that the modem can suppress irreducible BER values below 1. 0e-6 and attains a 2 dB implicit diversity gain over multipath fading channels modeled by a two-ray impulse response system with independent Rayleigh fading.

A novel method for the guided-probe diagnosis of high-performance LSIs containing macrocells, which have no internal netlist essential to the diagnosis, has been developed. In this method, the macrocell netlist is derived from its layout by extracting a leaf-cell-level netlist and is combined with the original one. Logic models for the leaf cells in the extracted netlist are also generated to obtain the logic-simulation data in the macrocells. The logic modeling is extended for application to memory macrocells, based on the idea that analog-behavior leaf cells in the memory macrocells are converted into logically equivalent circuits for logic simulation. Specifically, sense amplifiers and wired-or connections on bit lines are replaced with the corresponding logic-behavior models. The proposed method has been successfully applied to actual design data of LSIs containing macrocells, and it has been verified that it enables fault paths inside macrocells to be accurately traced and that the logic models give good timing resolution in the logic simulation. Using the proposed method, LSIs containing macrocells will be able to be diagnosed regardless of the macrocell types, without the need for a "golden" device, by an electron-beam guided probe system.

Three types of ternary decision diagrams (TDDs) are considered: AND -TDDs, EXOR-TDDs, and Kleene-TDDs. Kleene-TDDs are useful for logic simulation in the presence of unknown inputs. Let N(BDD:f), N(AND-TDD:f), and N(EXOR-TDD:f) be the number of non-terminal nodes in the BDD, the AND-TDD, and the EXOR-TDD for f, respectively. Let N(Kleene-TDD:) be the number of non-terminal nodes in the Kleene -TDD for , where is the regular ternary function corresponding to f. Then N(BDD:f) N(TDD:f). For parity functions, N(BDD:f)=N(AND-TDD:f)=N(EXOR-TDD:f)=N(Kleene-TDD:). For unate functions,N(BDD:f)=N(AND-TDD:f). The sizes of Kleene-TDDs are O(3n/n), and O(n3) for arbitrary functions, and symmetric functions, respectively. There exist a 2n-variable function, where Kleene-TDDs require O(n) nodes with the best order, while O(3n) nodes in the worst order.

One-dimensional Cellular Automata (CA's) are considered as potential pseudorandom pattern generators to generate highly random parallel patterns with simple hardware configurations. A class of linear, binary, and of nearest neighbor (radius = 1) CA's is referred to here as elementary ones. This paper investigates operations of such CA's with fixed boundary conditions when non-null boundary values are applied to them. By modifying transition matrices of elementary CA's to include the influence of boundary values, structures of state transition diagrams are determined.

This paper presents a new methodology for diagnosing transistor leakage faults in a CMOS circuit by using both IDDQ and logic value information. A hierarchical procedure is used to identify and delete impossible fault candidates efficiently and a procedure is employed to generate diagnostic tests for improving diagnostic resolution. A novel approach for handling the intermediate output voltage of a faulty gate is used in new methods for fault simulation and diagnostic test generation based on primary output values. Experimental results on ISCAS85 circuits show the effectiveness of the proposed methodology.

In order to develop high-speed ICs, it is important to clarify the relationship between circuit speed and device parameters. An analytical expression for circuit performance is effective for this purpose. This paper describes an analytical toggle frequency expression for Source-Coupled FET Logic (SCFL) frequency dividers. The proposed equation is expressed as the sum of the product of sensitivity coefficients of FET parameters and time constants which are extracted through a small signal transfer function analysis. These sensitivity coefficients are extracted using SPICE simulations. The equation is a simple formula with only five coefficients, which is much smaller than conventional sensitivity analyses. Furthermore, the accuracy of the proposed equation is improved compared to an analytical method based on the small signal transfer function which we previously proposed. The equation can be easily extended to consider interconnection delay time. The calculated maximum toggle frequencies using the equation show good agreement with SPICE simulations and experimental results for a wide gate-length variation range of 0. 12-µm to 0. 24-µm GaAs MESFETs. By re-extraction of another set of sensitivity coefficients, the proposed equation can be widely applied to shorter gate-length GaAs MESFETs and other FET devices such as HEMT devices. The expression clearly shows the relationship between the circuit performance and intrinsic FET parameters. According to the equation, the key parameters for high-speed circuit operation are high transconductance with a low drain conductance, and a low gate-drain capacitance. The equation can be used as a criterion for the optimization of the FET structure to realize high speed circuit performance.

We will present a partial scan design method based on n-fold line-up structures in order to achieve high fault efficiency and reduce test pattern generation time for practical LSIs. We will also present a partial scan design method based on the state justification of pure load/hold FFs in order to achieve high fault efficiency and reduce the number of scan FFs for practical LSIs with lots of load/hold FFs. Experimental results for practical LSIs show that our presented methods can achieve high fault efficiency (more than 99%) and reduce the number of scan FFs for the LSI with lots of load/hold FFs.

The advantage of random testing is that test application can be performed at a low cost in the BIST scheme. However, not all circuits are random pattern testable due to the existence of random pattern resistant faults. In this paper, we present a method for improving the random pattern testability of logic circuits by partial circuit duplication approach. The basic idea is to detect random pattern resistant faults by using the difference between the duplicated part of a circuit and the original part. Experimental results on benchmark circuits show that high fault coverage can be achieved with a very small amount of hardware overhead.

Comparative performance evaluation between parallel combinatory CDMA (PC-CDMA) and Direct Sequence CDMA (DS-CDMA) has been conducted for high speed radio communication up to 2 Mbps under a multipath Rayleigh fading environment. For both DS-CDMA and PC-CDMA, user information rate per code of 128 kbps, convolutional code with 1/2 coding rate, the same bit interleaving and QPSK data modulation are applied to get transmission symbol rate of 128 ksps. The chip rate of 4. 096 Mcps is used to investigate the possibility of 2 Mbps transmission using only 5 MHz bandwidth. So the spreading factor of the spreading code is 32 for DS-CDMA. In PC-CDMA, 128 ksps data stream is divided into four 32 ksps data streams and according to the every four bits pattern, corresponding spreading code of spreading factor of 128 and its polarity are selected out of eight candidate spreading codes. In soft decision Viterbi decoding applied to PC-CDMA, branch metric is calculated for every bit by weighting the output levels of the PC-CDMA correlators for eight candidate spreading codes. By computer simulation under vehicular environment model with six multipaths, it has been shown that PC-CDMA can offer more capacity approximately by double than DS-CDMA for both downlink and uplink under the condition such as for vehicular for BER of 10-3, and 2 Mbps transmission per cell for downlink is possible not only in isolated cell condition but also in omni cell condition by PC-CDMA.

Experimental results of 1. 92 Mbps data transmission over a 20 MHz wideband DS-CDMA (W-CDMA) mobile radio link under frequency selective multipath fading are presented. 1. 92 Mbps data were transmitted using an orthogonal multicode transmission scheme. The combined use of antenna diversity reception, RAKE combining, and concatenated channel coding is applied to improve transmission performance. Laboratory and field experimental results demonstrated the possibility of 2 Mbps data transmission in a real fading environment.

Variable-rate data transmission with no rate indicator is described for direct sequence code division multiple access (DS-CDMA) mobile radio. The variable-rate data to be transmitted is block-encoded using a cyclic redundancy check (CRC) and then convolutionally encoded before being spread. The convolutionally encoded data is always brought to the zero state at the end of the data sequence within each frame. Blind rate detection is incorporated into the process of Viterbi-decoding the received convolutional-coded frame data. At each possible end bit position (i. e. , each possible transmission rate), the trellis path arriving at the zero-state is selected if its path metric satisfies a certain condition, and is then traced back to recover the frame data. CRC is used to determine whether the recovered data is correct or not. The path selection condition is described. The average frame error rate (FER) and average false detection rate (FDR) are evaluated by computer simulation under frequency selective multipath Rayleigh fading environments and the results are compared with another variable-rate transmission scheme using a rate indicator.

We have developed a new autofocus method using image processing techniques. This method consists of two steps. The first step is the preset of an objective lens condition with the aid of the feedback of Z-sensor. Next, a hole pattern to be measured is detected using the pattern recognition. In the second step, the E-beam is shifted to the center of a hole pattern and scanned across the axis of a pattern. The exciting current of the objective lens is changed at constant intervals, where the center position of the range is the preset value of the Z-sensor. The best focus condition is determined based on the signal profile obtained by the autofocus scan. The measurement repeatability (3σ) can be achieved within 3. 9 nm. The percentage of success of 98. 7% can be realized in the present autofocus method.

In multilevel block modulation codes for QPSK and 8-PSK modulation, a construction of binary component codes is given. These codes have a good minimum Euclidean distance by using different forms of the dependency properties of the binary component codes. Interdependency among component codes is formed by using the binary component subcodes which are derived by the coset decomposition of the binary component codes. The algebraic structures of the codes are investigated to find out how interdependency among component codes gives a good minimum Euclidean distance. First, it is shown that cyclic codes over ZM for M-PSK (M=4,8), where the coding scheme is given by Piret, can be constructed by forming specific interdependency among binary component codes for proposed multilevel coding method. Furthermore, it is shown that better minimum Euclidean distance than above can be obtained by modifying the composition of interdependency among binary component codes. These proposed multilevel codes have algebraic structure of additive group and cyclic property over GF(M). Finally, error performances are compared with those of some code's reference modulation scheme for transmitting the same number of information bits.

This paper presents a design of CMOS Chua-type analog chaos circuit by using a signal-flow-graph (SFG) method. In this circuit, the transmittance of a nonlinear element is realized by an OTA with a feedback resistor, and other linear elements are realized by op-amp based circuits. The proposed circuit is insensitive to the finite admittance of OTA's and to the parasitics of resistors except a feedback resistor in the nonlinear element. The performance and chaotic behavior of the proposed circuit are confirmed by SPICE simulations.

We have improved the optical beam induced resistance change (OBIRCH) system so as to detect (1) a current path as small as 10-50 µA from the rear side of a chip, (2) current paths in silicide lines as narrow as 0. 2 µm, (3) high-resistance Ti-depleted polysilicon regions in 0. 2 µm wide silicide lines, and (4) high-resistance amorphous thin layers as thin as a few nanometers at the bottoms of vias. All detections were possible even in observation areas as wide as 5 mm 5 mm. The physical causes of these detections were characterized by focused ion beam and transmission electron microscopy.

We present a high-level synthesis scheme that considers weak testability of generated register-transfer level (RTL) data paths, as well as their area and performance. The weak testability, proposed in our previous work, is a testability measure of RTL data paths for non-scan design. In our scheme, we first extract a condition on resource sharing sufficient for weak testability from a data flow graph before synthesis, and treat the condition as design objectives in the following synthesis tasks. We propose heuristic synthesis algorithms which optimize area and the design objectives under the performance constraint.

We fabricated a tunable and polarization-insensitive arrayed-waveguide grating (AWG) 1616 multiplexer that operates around the wavelength of 1. 55 µm using fluorinated polyimides. The wavelength channel spacing was 0. 8 nm, and the 3-dB passband width was 0. 26 nm. The insertion loss at each channel was from 8 to 12 dB, and the crosstalk was less than -28 dB. The transmission pass wavelength was tuned over a wide range of 6 nm by heating from 24 to 64. The slope of the temperature dependence of the pass wavelength was -0. 15 nm/, which is ten times that of a silica-based multiplexer. Polarization-insensitivity was achieved by fabricating a film AWG multiplexer, which was formed by removing the silicon substrate and annealing at 350. The polarization-dependent wavelength shift was smaller than the spectrum analyzers wavelength resolution of 0. 1 nm.