We design a full-order observer for discrete-time linear time-invariant systems with constant output delays. The observer design is based on the output delay model expressed by a two-dimensional state variable, with discrete-time and space independent variables. Employing a discrete-time state transformation, we construct an explicit strict Lyapunov function that enables us to prove the global exponential stability of the full-order observer error system with an explicit estimate of the exponential decay rate. The numerical example demonstrates the design of the full-order observer and illustrates the validity of the exponential stability.
Chuang WANG Zunchao LI Cheng LUO Lijuan ZHAO Yefei ZHANG Feng LIANG
A novel auto-tuning digital DC--DC converter is presented. In order to reduce the recovery time and undershoot, the auto-tuning control combines LnL, conventional PID and a predictive PID with a configurable predictive coefficient. A switch module is used to select an algorithm from the three control algorithms, according to the difference between the error signal and the two initially predefined thresholds. The detection and control logic is designed for both window delay line ADC and $Sigma Delta$ DPWM to correct the delay deviation. When the output of the converter exceeds the quantization range, the digital output of ADC is set at 0 or 1, and the delay line stops working to reduce power consumption. Theoretical analysis and simulations in the CSMC CMOS 0.5,$mu$m process are carried out to verify the proposed DC--DC converter. It is found that the converter achieves a power efficiency of more than 90% at heavy load, and reduces the recovery time and undershoot.
Wei CHOON TAY Eng LEONG TAN Ding YU HEH
This paper presents a fundamental locally one-dimensional (FLOD) method for 3-D thermal simulation. We first propose a locally one-dimensional (LOD) method for heat transfer equation within general inhomogeneous media. The proposed LOD method is then cast into compact form and formulated into the FLOD method with operator-free right-hand-side (RHS), which leads to computationally efficient update equations. Memory storage requirements and boundary conditions for both FLOD and LOD methods are detailed and compared. Stability analysis by means of analyzing the eigenvalues of amplification matrix substantiates the stability of the FLOD method. Additionally, the potential instability of the Douglas Gunn (DG) alternating-direction-implicit (ADI) method for inhomogeneous media is demonstrated. Numerical experiments justify the gain achieved in the overall efficiency for FLOD over LOD, DG-ADI and explicit methods. Furthermore, the relative maximum error of the FLOD method illustrates good trade-off between accuracy and efficiency.
An-Sheng CHAO Cheng-Wu LIN Hsin-Wen TING Soon-Jyh CHANG
The proposed stimulus design for linearity test is embedded in a differential successive approximation register analog-to-digital converter (SAR ADC), i.e. a design for testability (DFT). The proposed DFT is compatible to the pattern generator (PG) and output response analyzer (ORA) with the cost of 12.4-% area of the SAR ADC. The 10-bit SAR ADC prototype is verified in a 0.18-µm CMOS technology and the measured differential nonlinearity (DNL) error is between -0.386 and 0.281 LSB at 1-MS/s.
Takako NAKATANI Shozo HORI Keiichi KATAMINE Michio TSUDA Toshihiko TSUMAKI
The success of any project can be affected by requirements changes. Requirements elicitation is a series of activities of adding, deleting, and modifying requirements. We refer to the completion of requirements elicitation of a software component as requirements maturation. When the requirements of each component have reached the 100% maturation point, no requirement will come to the component. This does not mean that a requirements analyst (RA) will reject the addition of requirements, but simply, that the additional requirements will not come to the project. Our motivation is to provide measurements by which an RA can estimate one of the maturation periods: the early, middle, or late period of the project. We will proceed by introducing the requirements maturation efficiency (RME). The RME of the requirements represents how quickly the requirements of a component reach 100% maturation. Then, we will estimate the requirements maturation period for every component by applying the RME. We assume that the RME is derived from its accessibility from an RA to the requirements source and the stability of the requirements. We model accessibility as the number of information flows from the source of the requirements to the RA, and further, model stability with the requirements maturation index (RMI). According to the multiple regression analysis of a case, we are able to get an equation on RME derived from these two factors with a significant level of 5%. We evaluated the result by comparing it to another case, and then discuss the effectiveness of the measurements.
Jungo MORIYASU Toshimichi SAITO
This letter studies the simple dynamic binary neural network characterized by signum activation function and ternary connection parameters. In order to control the sparsity of the connections and the stability of the stored signal, a simple evolutionary algorithm is presented. As a basic example of teacher signals, we consider a binary periodic orbit which corresponds to a control signal of ac-dc regulators. In the numerical experiment, applying the correlation-based learning, the periodic orbit can be stored. The sparsification can be effective to reinforce the stability of the periodic orbit.
Compressive sensing is a promising technique in data acquisition field. A central problem in compressive sensing is that for a given sparse signal, we wish to recover it accurately, efficiently and stably from very few measurements. Inspired by mathematical analysis, we introduce a combining scheme between stability and robustness in reconstruction problems using compressive sensing. By choosing appropriate parameters, we are able to construct a condition for reconstruction map to perform properly.
Min Kook SONG Jin Bae PARK Young Hoon JOO
This paper is concerned with exploring an extended approach for the stability analysis and synthesis for Markovian jump nonlinear systems (MJNLSs) via fuzzy control. The Takagi-Sugeno (T-S) fuzzy model is employed to represent the MJNLSs with incomplete transition description. In this paper, not all the elements of the rate transition matrices (RTMs), or probability transition matrices (PTMs) are assumed to be known. By fully considering the properties of the RTMs and PTMs, sufficient criteria of stability and stabilization is obtained in both continuous and discrete-time. Stabilization conditions with a mode-dependent fuzzy controller are derived for Markovian jump fuzzy systems in terms of linear matrix inequalities (LMIs), which can be readily solved by using existing LMI optimization techniques. Finally, illustrative numerical examples are provided to demonstrate the effectiveness of the proposed approach.
In this paper, a new digital true random number generator based on Cross Feedback Ring Oscillators (CFRO) is proposed. The random sources of CFRO lie in delay variations (jitter), unpredictable transition behaviors as well as metastability. The CFRO is proved to be truly random by restarting from the same initial states. Compared with the so-called Fibonacci Ring Oscillator (FIRO) and Galois Ring Oscillator (GARO), the CFRO needs less than half of their time to accumulate relatively high entropy and enable extraction of one random bit. Only a simple XOR corrector is used to reduce the bias of output sequences. TRNG based on CFRO can be run continuously at a constant high speed of 150Mbps. For higher security, the TRNG can be set in stateless mode at a cost of slower speed of 10Mbps. The total logical resources used are relatively small and no special placement and routing is needed. The TRNG both in continuous mode and in stateless mode can pass the NIST tests and the DIEHARD tests.
A new theoretical formulation based on BIBO (Bounded Input Bounded Output) operators is proposed for a general feedback amplifier circuit. Several fundamental theorems are derived in this letter. The main theorem provides a basis for a realization of an inverse of a feedback-branch linear or nonlinear BIBO operator satisfying the associative law.
Hiroyuki YOTSUYANAGI Hiroyuki MAKIMOTO Takanobu NIMIYA Masaki HASHIZUME
This paper proposes a method for testing delay faults using a boundary scan circuit in which a time-to-digital converter (TDC) is embedded. The incoming transitions from the other cores or chips are captured at the boundary scan circuit. The TDC circuit is modified to set the initial value for a delay line through which the transition is propagated. The condition for measuring timing slacks of two or more paths is also investigated since the overlap of the signals may occur in the delay line of the TDC in our boundary scan circuit. An experimental IC with the TDC and boundary scan is fabricated and is measured to estimate the delay of some paths measured by the TDC embedded in boundary scan cells. The simulation results for a benchmark circuit with the boundary scan circuit are also shown for the case that timing slacks of multiple paths can be observed even if the signals overlap in the TDC.
Yuki NISHIMURA Kanya TANAKA Yuji WAKASA Yuh YAMASHITA
In this paper, a stochastic asymptotic stabilization method is proposed for deterministic input-affine control systems, which are randomized by including Gaussian white noises in control inputs. The sufficient condition is derived for the diffusion coefficients so that there exist stochastic control Lyapunov functions for the systems. To illustrate the usefulness of the sufficient condition, the authors propose the stochastic continuous feedback law, which makes the origin of the Brockett integrator become globally asymptotically stable in probability.
Seong-Eun KIM Young-Seok CHOI Jae-Woo LEE Woo-Jin SONG
This paper provides a novel normalized sign least-mean square (NSLMS) algorithm which updates only a part of the filter coefficients and simultaneously performs sparse updates with the goal of reducing computational complexity. A combination of the partial-update scheme and the set-membership framework is incorporated into the context of L∞-norm adaptive filtering, thus yielding computational efficiency. For the stabilized convergence, we formulate a robust update recursion by imposing an upper bound of a step size. Furthermore, we analyzed a mean-square stability of the proposed algorithm for white input signals. Experimental results show that the proposed low-complexity NSLMS algorithm has similar convergence performance with greatly reduced computational complexity compared to the partial-update NSLMS, and is comparable to the set-membership partial-update NLMS.
Kiichi NIITSU Naohiro HARIGAI Takahiro J. YAMAGUCHI Haruo KOBAYASHI
This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation.
This paper presents the stability analysis for continuous-time Takagi-Sugeno fuzzy systems using a fuzzy Lyapunov function. The proposed fuzzy Lyapunov function involves the time derivatives of states to include new free matrices in the LMI stability conditions. These free matrices extend the solution space for Linear Matrix Inequalities (LMIs) problems. Numerical examples illustrate the effectiveness of the proposed methods.
Nurul Ezaila ALIAS Anil KUMAR Takuya SARAYA Shinji MIYANO Toshiro HIRAMOTO
In this paper, negative bias temperature instability (NBTI) reliability of pFETs is analyzed under the post-fabrication SRAM self-improvement scheme that we have developed recently, where cell stability is self-improved by simply applying high stress voltage to supply voltage terminal (VDD) of SRAM cells. It is newly found that there is no significant difference in both threshold voltage and drain current degradation by NBTI stress between fresh PFETs and PFETs after self-improvement scheme application, indicating that the self-improvement scheme has no critical reliability problem.
In this paper, a high performance current latch sense amplifier (CLSA) with vertical MOSFET is proposed, and its performances are investigated. The proposed CLSA with the vertical MOSFET realizes a 11% faster sensing time with about 3% smaller current consumption relative to the conventional CLSA with the planar MOSFET. Moreover, the proposed CLSA with the vertical MOSFET achieves an 1.11 dB increased voltage gain G(f) relative to the conventional CLSA with the planar MOSFET. Furthermore, the proposed CLSA realizes up to about 1.7% larger yield than the conventional CLSA, and its circuit area is 42% smaller than the conventional CLSA.
Katsuya FUJIWARA Hideo FUJIWARA
In this paper, we introduce generalized feed-forward shift registers (GF2SR) to apply them to secure and testable scan design. Previously, we introduced SR-equivalents and SR-quasi-equivalents which can be used in secure and testable scan design, and showed that inversion-inserted linear feed-forward shift registers (I2LF2SR) are useful circuits for the secure and testable scan design. GF2SR is an extension of I2LF2SR and the class is much wider than that of I2LF2SR. Since the cardinality of the class of GF2SR is much larger than that of I2LF2SR, the security level of scan design with GF2SR is much higher than that of I2LF2SR. We consider how to control/observe GF2SR to guarantee easy scan-in/out operations, i.e., state-justification and state-identification problems are considered. Both scan-in and scan-out operations can be overlapped in the same way as the conventional scan testing, and hence the test sequence for the proposed scan design is of the same length as the conventional scan design. A program called WAGSR (Web Application for Generalized feed-forward Shift Registers) is presented to solve those problems.
Ahmed MUSA Kenichi OKADA Akira MATSUZAWA
Capacitive feedback VCOs use capacitors that are connected from the output node to the gate of the tail transistor that acts as a current source. Using such feedback results in modulating the current that is used by the oscillator and therefore changes its cyclostationary noise properties which results in a lower output phase noise. This paper presents a mathematical study of capacitive feedback VCOs in terms of stability and phase noise enhancement to confirm stability and to explain the enhancement in phase noise. The derived expression for the phase noise shows an improvement of 4.4 dB is achievable by using capacitive feedback as long as the VCO stays in the current limited region. Measurement results taken from an actual capacitive feedback VCO implemented in a 65 nm CMOS process also agrees with the analysis and simulation results which further validates the given analysis.
Joon-Young CHOI Hongju KIM Soonman KWON
We address the global asymptotic stability of FAST TCP, especially considering cross traffics, time-varying network feedback delay, and queuing delay dynamics at link. Exploiting the inherent dynamic property of FAST TCP, we construct two sequences that represent the lower and upper bound variations of the congestion window in time. By showing that the sequences converge to the equilibrium point of the congestion window, we establish that FAST TCP in itself is globally asymptotically stable without any specific conditions on the tuning parameter α or the update gain γ.