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[Keyword] TE(21534hit)

3301-3320hit(21534hit)

  • ILP-Based Scheduling for Parallelizable Tasks

    Kana SHIMADA  Shogo KITANO  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1503-1505

    Task scheduling is one of the most important processes in the design of multicore computing systems. This paper presents a technique for scheduling of malleable tasks. Our scheduling technique decides not only the execution order of the tasks but also the number of cores assigned to the individual tasks, simultaneously. We formulate the scheduling problem as an integer linear programming (ILP) problem, and the optimal schedule can be obtained by solving the ILP problem. Experiments using a standard task-set suite clarify the strength of this work.

  • Design Method for Low-Delay Maximally Flat FIR Digital Differentiators with Variable Stopbands Obtained by Minimizing Lp Norm

    Ryosuke KUNII  Takashi YOSHIDA  Naoyuki AIKAWA  

     
    PAPER-Digital Signal Processing

      Vol:
    E100-A No:7
      Page(s):
    1513-1521

    Linear phase maximally flat digital differentiators (DDs) with stopbands obtained by minimizing the Lp norm are filters with important practical applications, as they can differentiate input signals without distortion. Stopbands designed by minimizing the Lp norm can be used to control the relationship between the steepness in the transition band and the ripple scale. However, linear phase DDs are unsuitable for real-time processing because each group delay is half of the filter order. In this paper, we proposed a design method for a low-delay maximally flat low-pass/band-pass FIR DDs with stopbands obtained by minimizing the Lp norm. The proposed DDs have low-delay characteristics that approximate the linear phase characteristics only in the passband. The proposed transfer function is composed of two functions, one with flat characteristics in the passband and one that ensures the transfer function has Lp approximated characteristics in the stopband. In the optimization of the latter function, Newton's method is employed.

  • AUV Based Data-Gathering Protocol for the Lifetime Extension of Underwater Acoustic Sensor Networks

    Heungwoo NAM  

     
    LETTER-Mobile Information Network and Personal Communications

      Vol:
    E100-A No:7
      Page(s):
    1596-1600

    As autonomous underwater vehicles (AUVs) have been widely used to perform cooperative works with sensor nodes for data-gathering, the need for long-range AUVs has further grown to support the long-duration cooperation with sensor nodes. However, as existing data-gathering protocols for the cooperative works have not considered AUVs' energy consumption, AUVs can deplete their energy more quickly before fulfilling their missions. The objective of this work is to develop an AUV based data-gathering protocol that maximizes the duration for the cooperative works. Simulation results show that the proposed protocol outperforms existing protocols with respect to the long-range AUVs.

  • On Approximated LLR for Single Carrier Millimeter-Wave Transmissions in the Presence of Phase Noise Open Access

    Makoto NISHIKORI  Shinsuke IBI  Seiichi SAMPEI  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2017/01/12
      Vol:
    E100-B No:7
      Page(s):
    1086-1093

    This paper proposes approximated log likelihood ratios (LLRs) for single carrier millimeter-wave (mmW) transmission systems in the presence of phase noise. In mmW systems, phase noise on carrier wave signals in very high frequency bands causes severe performance degradation. In order to mitigate the impairments of phase noise, forward error correction (FEC) techniques, such as low density parity check (LDPC) code, are effective. However, if the probabilistic model does not capture the exact behavior of the random process present in the received signal, FEC performance is severely degraded, especially in higher order modulation or high coding rate cases. To address this issue, we carefully examine the probabilistic model of minimum mean square error (MMSE) equalizer output including phase noise component. Based on the derived probabilistic model, approximated LLR computation methods with low computational burden are proposed. Computer simulations confirm that the approximated LLR computations on the basis of the derived probabilistic model are capable of improving bit error rate (BER) performance without sacrificing computational simplicity in the presence of phase noise.

  • Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors

    Yutaka MASUDA  Takao ONOYE  Masanori HASHIMOTO  

     
    PAPER

      Vol:
    E100-A No:7
      Page(s):
    1452-1463

    Software-based error detection techniques, which includes error detection mechanism (EDM) transformation, are used for error localization in post-silicon validation. This paper evaluates the performance of EDM for timing error localization with a noise-aware logic simulator and 65-nm test chips assuming the following two EDM usage scenarios; (1) localizing a timing error occurred in the original program, and (2) localizing as many potential timing errors as possible. Simulation results show that the EDM transformation customized for quick error detection cannot locate electrical timing errors in the original program in the first scenario, but it detects 86% of non-masked errors potential bugs in the second scenario, which mean the EDM performance of detecting electrical timing errors affecting execution results is high. Hardware measurement results show that the EDM detects 25% of original timing errors and 56% of non-masked errors. Here, these hardware measurement results are not consistent with the simulation results. To investigate the reason, we focus on the following two differences between hardware and simulation; (1) design of power distribution network, and (2) definition of timing error occurrence frequency. We update the simulation setup for filling the difference and re-execute the simulation. We confirm that the simulation and the chip measurement results are consistent.

  • An HLA-Based Formal Co-Simulation Approach for Rapid Prototyping of Heterogeneous Mixed-Signal SoCs

    Moon Gi SEOK  Tag Gon KIM  Daejin PARK  

     
    PAPER

      Vol:
    E100-A No:7
      Page(s):
    1374-1383

    The rapid prototyping of a mixed-signal system-on-chip (SoC) has been enabled by reusing predesigned intellectual properties (IPs) and by integrating newly designed IP into the top design of SoC. The IPs have been designed on various hardware description levels, which leads to challenges in simulations that evaluate the prototyping. One traditional solution is to convert these heterogeneous IP models into equivalent models, that are described in a single description language. This conversion approach often requires manual rewriting of existing IPs, and this results in description loss during the model projection due to the absence of automatic conversion tools. The other solutions are co-simulation/emulation approaches that are based on the coupling of multiple simulators/emulators through connection modules. The conventional methods do not have formal theoretical backgrounds and an explicit interface for integrating the simulator into their solutions. In this paper, we propose a general co-simulation approach based on the high-level architecture (HLA) and a newly-defined programming language interface for interoperation (PLI-I) between heterogeneous IPs as a formal simulator interface. Based on the proposed PLI-I and HLA, we introduce formal procedures of integration and interoperation. To reduce integration costs, we split these procedures into two parts: a reusable common library and an additional model-dependent signal-to-event (SE) converter to handle differently abstracted in/out signals between the coupled IPs. During the interoperation, to resolve the different time-advance mechanisms and increase computation concurrency between digital and analog simulators, the proposed co-simulation approach performs an advanced HLA-based synchronization using the pre-simulation concepts. The case study shows the validation of interoperation behaviors between the heterogeneous IPs in mixed-signal SoC design, the reduced design effort in integrating, and the synchronization speedup using the proposed approach.

  • Extraction of Energy Distribution of Electrons Trapped in Silicon Carbonitride (SiCN) Charge Trapping Films

    Sheikh Rashel Al AHMED  Kiyoteru KOBAYASHI  

     
    PAPER-Electronic Materials

      Vol:
    E100-C No:7
      Page(s):
    662-668

    The electron retention characteristics of memory capacitors with blocking oxide-silicon carbonitride (SiCN)-tunnel oxide stacked films were investigated for application in embedded charge trapping nonvolatile memories (NVMs). Long-term data retention in the SiCN memory capacitors was estimated to be more than 10 years at 85 °C. We presented an improved method to analyze the energy distribution of electron trap states numerically. Using the presented analytical method, electron trap states in the SiCN film were revealed to be distributed from 0.8 to 1.3 eV below the conduction band edge in the SiCN band gap. The presence of energetically deep trap states leads us to suggest that the SiCN dielectric films can be employed as the charge trapping film of embedded NVMs.

  • CF3: Test Suite for Arithmetic Optimization of C Compilers

    Yusuke HIBINO  Hirofumi IKEO  Nagisa ISHIURA  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1511-1512

    This letter presents a test suite CF3 designed to find bugs in arithmetic optimizers of C compilers. It consists of 13,720 test programs containing all the expression patterns covering all the permutations of 3 operators from 14 operators. CF3 detected more than 70 errors in GCC 4.2-4.5 within 2 hours.

  • Close-Loop Angle Control of Stepper Motor Fed by Power Packets

    Shiu MOCHIYAMA  Ryo TAKAHASHI  Takashi HIKIHARA  

     
    LETTER-Systems and Control

      Vol:
    E100-A No:7
      Page(s):
    1571-1574

    The power packet dispatching system, in which electric power is transferred in a pulse-shaped form with information, is expected to realize dynamical management of multiple power sources in independent systems such as robots. In this letter, close-loop control of a stepper motor by power packets is discussed. The precise angle control is achieved by the combined transfer of power and control information in experiments.

  • Orbital Angular Momentum (OAM) Multiplexing: An Enabler of a New Era of Wireless Communications Open Access

    Doohwan LEE  Hirofumi SASAKI  Hiroyuki FUKUMOTO  Ken HIRAGA  Tadao NAKAGAWA  

     
    INVITED PAPER-Transmission Systems and Transmission Equipment for Communications

      Pubricized:
    2017/01/12
      Vol:
    E100-B No:7
      Page(s):
    1044-1063

    This paper explores the potential of orbital angular momentum (OAM) multiplexing as a means to enable high-speed wireless transmission. OAM is a physical property of electro-magnetic waves that are characterized by a helical phase front in the propagation direction. Since the characteristic can be used to create multiple orthogonal channels, wireless transmission using OAM can enhance the wireless transmission rate. Comparisons with other wireless transmission technologies clarify that OAM multiplexing is particularly promising for point-to-point wireless transmission. We also clarify three major issues in OAM multiplexing: beam divergence, mode-dependent performance degradation, and reception (Rx) signal-to-noise-ratio (SNR) reduction. To mitigate mode-dependent performance degradation we first present a simple but practical Rx antenna design method. Exploiting the fact that there are specific location sets with phase differences of 90 or 180 degrees, the method allows each OAM mode to be received at its high SNR region. We also introduce two methods to address the Rx SNR reduction issue by exploiting the property of a Gaussian beam generated by multiple uniform circular arrays and by using a dielectric lens antenna. We confirm the feasibility of OAM multiplexing in a proof of concept experiment at 5.2 GHz. The effectiveness of the proposed Rx antenna design method is validated by computer simulations that use experimentally measured values. The two new Rx SNR enhancement methods are validated by computer simulations using wireless transmission at 60 GHz.

  • A Hardware-Trojan Classification Method Using Machine Learning at Gate-Level Netlists Based on Trojan Features

    Kento HASEGAWA  Masao YANAGISAWA  Nozomu TOGAWA  

     
    PAPER

      Vol:
    E100-A No:7
      Page(s):
    1427-1438

    Due to the increase of outsourcing by IC vendors, we face a serious risk that malicious third-party vendors insert hardware Trojans very easily into their IC products. However, detecting hardware Trojans is very difficult because today's ICs are huge and complex. In this paper, we propose a hardware-Trojan classification method for gate-level netlists to identify hardware-Trojan infected nets (or Trojan nets) using a support vector machine (SVM) or a neural network (NN). At first, we extract the five hardware-Trojan features from each net in a netlist. These feature values are complicated so that we cannot give the simple and fixed threshold values to them. Hence we secondly represent them to be a five-dimensional vector and learn them by using SVM or NN. Finally, we can successfully classify all the nets in an unknown netlist into Trojan ones and normal ones based on the learned classifiers. We have applied our machine-learning-based hardware-Trojan classification method to Trust-HUB benchmarks. The results demonstrate that our method increases the true positive rate compared to the existing state-of-the-art results in most of the cases. In some cases, our method can achieve the true positive rate of 100%, which shows that all the Trojan nets in an unknown netlist are completely detected by our method.

  • Correct Formulation of Gradient Characteristics for Adaptive Notch Filters Based on Monotonically Increasing Gradient Algorithm

    Shunsuke KOSHITA  Hiroyuki MUNAKATA  Masahide ABE  Masayuki KAWAMATA  

     
    LETTER-Digital Signal Processing

      Vol:
    E100-A No:7
      Page(s):
    1557-1561

    In the field of adaptive notch filtering, Monotonically Increasing Gradient (MIG) algorithm has recently been proposed by Sugiura and Shimamura [1], where it is claimed that the MIG algorithm shows monotonically increasing gradient characteristics. However, our analysis has found that the underlying theory in [1] includes crucial errors. This letter shows that the formulation of the gradient characteristics in [1] is incorrect, and reveals that the MIG algorithm fails to realize monotonically increasing gradient characteristics when the input signal includes white noise.

  • Distributed Optimization with Incomplete Information for Heterogeneous Cellular Networks

    Haibo DAI  Chunguo LI  Luxi YANG  

     
    LETTER-Numerical Analysis and Optimization

      Vol:
    E100-A No:7
      Page(s):
    1578-1582

    In this letter, we propose two robust and distributed game-based algorithms, which are the modifications of two algorithms proposed in [1], to solve the joint base station selection and resource allocation problem with imperfect information in heterogeneous cellular networks (HCNs). In particular, we repeatedly sample the received payoffs in the exploitation stage of each algorithm to guarantee the convergence when the payoffs of some users (UEs) in [1] cannot accurately be acquired for some reasons. Then, we derive the rational sampling number and prove the convergence of the modified algorithms. Finally, simulation results demonstrate that two modified algorithms achieve good convergence performances and robustness in the incomplete information scheme.

  • Ontology-Based Driving Decision Making: A Feasibility Study at Uncontrolled Intersections

    Lihua ZHAO  Ryutaro ICHISE  Zheng LIU  Seiichi MITA  Yutaka SASAKI  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2017/04/05
      Vol:
    E100-D No:7
      Page(s):
    1425-1439

    This paper presents an ontology-based driving decision making system, which can promptly make safety decisions in real-world driving. Analyzing sensor data for improving autonomous driving safety has become one of the most promising issues in the autonomous vehicles research field. However, representing the sensor data in a machine understandable format for further knowledge processing still remains a challenging problem. In this paper, we introduce ontologies designed for autonomous vehicles and ontology-based knowledge base, which are used for representing knowledge of maps, driving paths, and perceived driving environments. Advanced Driver Assistance Systems (ADAS) are developed to improve safety of autonomous vehicles by accessing to the ontology-based knowledge base. The ontologies can be reused and extended for constructing knowledge base for autonomous vehicles as well as for implementing different types of ADAS such as decision making system.

  • Robust Widely Linear Beamforming via an IAA Method for the Augmented IPNCM Reconstruction

    Jiangbo LIU  Guan GUI  Wei XIE  Xunchao CONG  Qun WAN  Fumiyuki ADACHI  

     
    LETTER-Digital Signal Processing

      Vol:
    E100-A No:7
      Page(s):
    1562-1566

    Based on the reconstruction of the augmented interference-plus-noise (IPN) covariance matrix (CM) and the estimation of the desired signal's extended steering vector (SV), we propose a novel robust widely linear (WL) beamforming algorithm. Firstly, an extension of the iterative adaptive approach (IAA) algorithm is employed to acquire the spatial spectrum. Secondly, the IAA spatial spectrum is adopted to reconstruct the augmented signal-plus-noise (SPN) CM and the augmented IPNCM. Thirdly, the extended SV of the desired signal is estimated by using the iterative robust Capon beamformer with adaptive uncertainty level (AU-IRCB). Compared with several representative robust WL beamforming algorithms, simulation results are provided to confirm that the proposed method can achieve a better performance and has a much lower complexity.

  • Reordering-Based Test Pattern Reduction Considering Critical Area-Aware Weighted Fault Coverage

    Masayuki ARAI  Kazuhiko IWASAKI  

     
    PAPER

      Vol:
    E100-A No:7
      Page(s):
    1488-1495

    Shrinking feature sizes and higher levels of integration in semiconductor device manufacturing technologies are increasingly causing the gap between defect levels estimated in the design stage and reported ones for fabricated devices. In this paper, we propose a unified weighted fault coverage approach that includes both bridge and open faults, considering the critical area as the incident rate of each fault. We then propose a test pattern reordering scheme that incorporates our weighted fault coverage with an aim to reduce test costs. Here we apply a greedy algorithm to reorder test patterns generated by the bridge and stuck-at automatic test pattern generator (ATPG), evaluating the relationship between the number of patterns and the weighted fault coverage. Experimental results show that by applying this reordering scheme, the number of test patterns was reduced, on average, by approximately 50%. Our results also indicate that relaxing coverage constraints can drastically reduce test pattern set sizes to a level comparable to traditional 100% coverage stuck-at pattern sets, while targeting the majority of bridge faults and keeping the defect level to no more than 10 defective parts per milion (DPPM) with a 99% manufacturing yield.

  • A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers

    Takahiro YAMAMOTO  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  Shigeru YAMASHITA  Yuko HARA-AZUMI  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1496-1499

    Approximate computing is considered as a promising approach to design of power- or area-efficient digital circuits. This paper proposes a systematic methodology for design and worst-case accuracy analysis of approximate array multipliers. Our methodology systematically designs a series of approximate array multipliers with different area, delay, power and accuracy characteristics so that an LSI designer can select the one which best fits to the requirements of her/his applications. Our experiments explore the trade-offs among area, delay, power and accuracy of the approximate multipliers.

  • Synthesizing Pareto Efficient Intelligible State Machines from Communication Diagram

    Toshiyuki MIYAMOTO  

     
    PAPER-Formal tools

      Pubricized:
    2017/03/07
      Vol:
    E100-D No:6
      Page(s):
    1200-1209

    For a service-oriented architecture based system, the problem of synthesizing a concrete model, i.e., behavioral model, for each service configuring the system from an abstract specification, which is referred to as choreography, is known as the choreography realization problem. In this paper, we assume that choreography is given by an acyclic relation. We have already shown that the condition for the behavioral model is given by lower and upper bounds of acyclic relations. Thus, the degree of freedom for behavioral models increases; developing algorithms of synthesizing an intelligible model for users becomes possible. In this paper, we introduce several metrics for intelligibility of state machines, and study the algorithm of synthesizing Pareto efficient state machines.

  • Symbolic Design of Networked Control Systems with State Prediction

    Masashi MIZOGUCHI  Toshimitsu USHIO  

     
    PAPER-Formal techniques

      Pubricized:
    2017/03/07
      Vol:
    E100-D No:6
      Page(s):
    1158-1165

    In this paper, we consider a networked control system where bounded network delays and packet dropouts exist in the network. The physical plant is abstracted by a transition system whose states are quantized states of the plant measured by a sensor, and a control specification for the abstracted plant is given by a transition system when no network disturbance occurs. Then, we design a prediction-based controller that determines a control input by predicting a set of all feasible abstracted states at time when the actuator receives the delayed input. It is proved that the prediction-based controller suppresses effects of network delays and packet dropouts and that the controlled plant still achieves the specification in spite of the existence of network delays and packet dropouts.

  • A Shadow Cursor for Calibrating Screen Coordinates of Tabletop Displays and Its Evaluation

    Makio ISHIHARA  Yukio ISHIHARA  

     
    PAPER-Human-computer Interaction

      Pubricized:
    2017/03/16
      Vol:
    E100-D No:6
      Page(s):
    1271-1279

    This paper discusses the use of a common computer mouse as a pointing interface for tabletop displays. In the use of a common computer mouse for tabletop displays, there might be an angular distance between the screen coordinates and the mouse control coordinates. To align those coordinates, this paper introduces a screen coordinates calibration technique using a shadow cursor. A shadow cursor is the basic idea of manipulating a mouse cursor without any visual feedbacks. The shadow cursor plays an important role in obtaining the angular distance between the two coordinates. It enables the user to perform a simple mouse manipulation so that screen coordinates calibration will be completed in less than a second.

3301-3320hit(21534hit)