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17601-17620hit(21534hit)

  • Verification of Wafer Test Process Simulation in VLSI Manufacturing System and Its Application

    Akihisa CHIKAMURA  Koji NAKAMAE  Hiromu FUJIOKA  

     
    PAPER-Integrated Electronics

      Vol:
    E82-C No:6
      Page(s):
    1013-1017

    Our simulation method by using a combination of discrete event simulation and detailed parametric models of the VLSI manufacturing test system is verified by comparing simulated results with actual ones of a real wafer test facility of one-chip microcomputer in a Japanese semiconductor company. The simulated results are found to be in close agreement with the actual ones. As an application of the verified simulation method, we evaluate the economic effect of the introduction in the wafer test process of LSI testers that allows us to test multiple chips simultaneously. It is found that the optimum number of chips simultaneously tested by an LSI tester is 4 when considering both of the test cost per chip and the average test TAT.

  • Analog CMOS Implementation of Quantized Interconnection Neural Networks for Memorizing Limit Cycles

    Cheol-Young PARK  Koji NAKAJIMA  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    952-957

    In order to investigate the dynamic behavior of quantized interconnection neural networks on neuro-chips, we have designed and fabricated hardware neural networks according to design rule of a 1.2 µm CMOS technology. To this end, we have developed programmable synaptic weights for the interconnection with three values of 1 and 0. We have tested the chip and verified the dynamic behavior of the networks in a circuit level. As a result of our study, we can provide the most straightforward application of networks for a dynamic pattern classifier. The proposed network is advantageous in that it does not need extra exemplar to classify shifted or reversed patterns.

  • A Design Hierarchy of IC Interconnects and Gate Patterns

    Shinji ODANAKA  Akio MISAKA  Kyoji YAMASHITA  

     
    INVITED PAPER

      Vol:
    E82-C No:6
      Page(s):
    948-954

    A new design hierarchy in TCAD is discussed with emphasis on a design of IC interconnects and gate patterns. Two design methodologies for gate patterns at a CMOS cell level and multilevel interconnect scheme at a chip level are proposed. This approach generates the layout design rules of gate patterns, considering the fabrication process and pattern layout dependency, and allows a design of multilevel interconnect scheme at the initial phase of technology development.

  • Designing IIR Digital All-Pass Filters by Successive Projections Method

    Hiroyuki SAWADA  Naoyuki AIKAWA  Masamitsu SATO  

     
    LETTER

      Vol:
    E82-A No:6
      Page(s):
    1021-1025

    The transfer function of IIR all-pass filters is a rational function of ω. However, the optimization of such a rational function using the successive projections method, which has a wider range of application than the Remez algorithm, has not been presented. In this paper, we propose designing IIR all-pass filters using the successive projections method.

  • Imperfect Singular Solutions of Nonlinear Equations and a Numerical Method of Proving Their Existence

    Yuchi KANZAWA  Shin'ichi OISHI  

     
    PAPER-Nonlinear Problems

      Vol:
    E82-A No:6
      Page(s):
    1062-1069

    A new concept of "an imperfect singular solution" is defined as an approximate solution which becomes a singular solution by adding a suitable small perturbation to the original equations. A numerical method is presented for proving the existence of imperfect singular solutions of nonlinear equations with guaranteed accuracy. A few numerical examples are also presented for illustration.

  • Experiments on Decision Feedback Carrier Recovery Loop for QPSK

    Mikio IWAMURA  Seizo SEKI  Kazuhiro MIYAUCHI  

     
    LETTER-Radio Communication

      Vol:
    E82-B No:6
      Page(s):
    974-977

    The characteristics of the decision feedback carrier recovery loop (DFL) for conventional QPSK signaling is evaluated experimentally through measurements of the carrier-to-noise ratio of the regenerated carrier, lock range, acquisition waveforms and bit error rates. The results show that the DFL hardly exhibits inferiority to the ideal synchronization by designing the loop natural frequency adequately small. The DFL is shown superb in carrier tracking.

  • Design and Implementation of Virtual Subnetwork System Supporting IP Terminal Mobility

    Teruyuki HASEGAWA  Akira IDOUE  Toshihiko KATO  

     
    PAPER

      Vol:
    E82-B No:6
      Page(s):
    897-906

    According to the wide spread of mobile computer terminals, it is required to connect them to remote networks and to allow them to communicate with home computers and Internet servers. There are some mechanisms studied on the IP terminal mobility, including DHCP which assigns IP addresses dynamically and Mobile-IP which supports seemless mobility. However, there are some problems identified for those methods on compatibility with existing IP terminals, route optimization and compatibility with firewall systems. So we have proposed a virtual subnetwork system which can accommodate existing IP routers and terminals without any modifications, and which selects an optimal route for the communication with networks other than the home network. This paper describes the mechanism and the results of implementation of our system.

  • Non-Isothermal Device Simulation of Gate Switching and Drain Breakdown Characteristics of Si MOSFET in Transient State

    Hirobumi KAWASHIMA  Ryo DANG (or DAN)  

     
    PAPER

      Vol:
    E82-C No:6
      Page(s):
    894-899

    Electro-thermal characteristics of the Si MOSFET in transient state are reported using a non-isothermal device simulator where both the transistor's self-heating and the thermal influence of its neighboring devices are duly taken into account. The thermal influence is estimated using a three-dimensional thermal simulator. Based on this set-up, we predict time-dependent electro-thermal characteristics of the Si MOSFET at gate switching and its drain breakdown conditions. We show that the time delay between the electrical response and the lattice temperature rise, is significant and thus can not be neglected. In addition, we found that avalanche and thermal breakdown characteristics largely depend on the slope of the drain input voltage.

  • Dynamic Polling Algorithm Based on Network Management Information Values

    Kiyohito YOSHIHARA  Keizo SUGIYAMA  Hiroki HORIUCHI  Sadao OBANA  

     
    PAPER

      Vol:
    E82-B No:6
      Page(s):
    868-876

    Network monitoring is one of the most significant functions in network management to understand the state of a network in real-time. In SNMP (Simple Network Management Protocol), polling is used for this purpose. If the time interval for two consecutive polling requests is too long, then we cannot understand the state of the network in real-time. Conversely, if it is too short, then the polling message traffic increases and imposes a heavy load on the network. Many dynamic polling algorithms have been proposed for controlling the increase in the polling message traffic. However, they cannot keep track of the time variations of management information values, since their main objectives are to check whether or not a network node is active and the next polling interval is determined being independent of the time variations of the values. The existing polling algorithms are thereby not applicable to the case where monitoring the time variation of management information values is critical. This paper proposes a new dynamic polling algorithm which, by making use of Discrete Fourier Transformation, enables not only to control the increase in the polling message traffic but also to keep track of the time variations of network management information values. We show the availability of the proposed algorithm by evaluating it through both simulations and experiments in actual network environment.

  • Data Traffic Distributed Control Scheme for Wideband and Narrowband Integrated Services in PWC

    Shaokai YU  Theodore BOUT  

     
    PAPER

      Vol:
    E82-B No:6
      Page(s):
    834-840

    Future cellular systems are envisioned to support mixed traffic, and ultimately multimedia services. However, a mixture of voice and data requires novel service mechanisms that can guarantee quality of service. In order to transfer high-speed data, multislot channel allocation is seen as a favoured solution to the present systems with the least compromise to circuit- switched services. This paper evaluates the performance of narrowband voice calls and multislot data packet transmission in such integrated systems by using a matrix-analytic approach. This method achieves quadratic convergence compared to the conventional spectral methods. Mobility is also considered in a prioritized cellular environment where frequent handoff has the potential of degrading data performance. The voice call distribution, data packets throughput, delay and waiting time distribution are derived. Moreover, a new multiple priority-based distributed control algorithm and a voice rate control scheme are enforced to mitigate the queuing congestion of data packets. The numerical results derived from this study show that larger data packets incur longer latency and the use of these flexible schemes can improve the overall performance.

  • Content-Based Image Retrieval Based on Scale-Space Theory

    Young Shik MOON  Jung Bum OH  

     
    LETTER

      Vol:
    E82-A No:6
      Page(s):
    1026-1028

    A content-based image retrieval scheme based on scale-space theory is proposed. Instead of considering all scales for image retrieval, the proposed algorithm utilizes a modified histogram intersection method to compute the relative scale between a query image and a candidate image. The proposed method has been applied to various images and the performance improvement has been verified.

  • Adaptive Control Design for Linear Time-Varying System Based on Internal Model Principle

    Koichi HIDAKA  Hiromitsu OHMORI  Akira SANO  

     
    PAPER-Systems and Control

      Vol:
    E82-A No:6
      Page(s):
    1047-1054

    In this paper, we propose a new adaptive control system design using internal model principle (IMP) for a bounded polynomial parameters. In this method, we regard time varying parameters as variable disturbance and design an estimating law used the internal model of the disturbance so that the law is able to rejected the effectness of the disturbance. Our method has the features that the tracking error can converge to zero. Furthermore, we give a sufficient condition for the stability based on a small-gain theorem. The condition shows that our proposed method relax the stability condition more than the conventional methods based on a passivity theorem. Finally, we contain a numerical simulation to show an effect of our system.

  • Quantum Transport Modeling of Ultrasmall Semiconductor Devices

    Hideaki TSUCHIYA  Tanroku MIYOSHI  

     
    INVITED PAPER

      Vol:
    E82-C No:6
      Page(s):
    880-888

    With the progress of LSI technology, the electronic device size is presently scaling down to the nano-meter region. In such an ultrasmall device, it is indispensable to take quantum mechanical effects into account in device modeling. In this paper, we first review the approaches to the quantum mechanical modeling of carrier transport in ultrasmall semiconductor devices. Then, we propose a novel quantum device model based upon a direct solution of the Boltzmann equation for multi-dimensional practical use. In this model, the quantum effects are represented in terms of quantum mechanically corrected potential in the classical Boltzmann equation.

  • Multi-Symbol Detection for Biorthogonal Signals over Rayleigh Fading Channels

    Oui Suk UHM  Jaeweon CHO  

     
    LETTER-Radio Communication

      Vol:
    E82-B No:6
      Page(s):
    967-973

    A new practical coherent detection scheme for biorthogonal signals, which uses multi-symbol observation interval, is proposed and its performances are analyzed and simulated. The technique jointly estimates both the demodulated data and the channel from received signal only while reducing computation complexity by an approximate maximum-likelihood sequence estimation rather than symbol-by-symbol detection as in previous noncoherent detection. The scheme achieves performance close to that of ideal coherent detection with perfect channel estimates when select the appropriate observation symbol interval N in the given symbol alphabet size M. What is particularly interesting is that the required average signal-to-noise ratio per bit γb can be reduced by as much as 1.4 dB and the capacity can be increased by as much as 38% when we use this system in the CDMA cellular reverse link.

  • Performance Analysis of Oversampling Data Recovery Circuit

    Jin-Ku KANG  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    958-964

    In this paper an analysis on the oversampling data recovery circuit is presented. The input waveform is assumed to be non-return-zero (NRZ) binary signals. A finite Markov chain model is used to evaluate the steady-state phase jitter performance. Theoretical analysis enables us to predict the input signal-to-noise ratio (SNR) versus bit error rate (BER) of the oversampling data recovery circuit for various oversampling ratios. The more number of samples per single bit results in the better performance on BER at the same input SNR. To achieve 10-11 BER, 8 times oversampling has about 2 dB input signal penalty compared to 16 times oversampling. In an architectural choice of the oversampling data recovery circuit, the recovered clock can be updated in each data bit or in every multiple bits depending on the input data rate and input noise. Two different clock update schemes were analyzed and compared. The scheme updating clock in every data bit has about 1.5 dB penalty against the multiple bits (4 bits) clock updating scheme with 16 times oversampling in white noise dominant input data. The results were applied to the fabricated circuits to validate the analysis.

  • A Study on Portal Image for the Automatic Verification of Radiation Therapy

    Yoon-Jong KIM  Dong-Hoon LEE  Seung-Hong HONG  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    945-951

    In this paper, near real time digital radiography system was implemented for the automatic verification of local errors between simulation plan and radiation therapy. Portal image could be acquired through video camera, image board and PC after therapy radiation was converted into light by a metal/fluorescent screen. Considering the divergence according to the distance between the source and the plate, we made a 340 340 12 cm3 basis point plate on which five rods of 4 cm height and 8 mm diameter lead (Pb) were built to display reference points on the simulator and the portal image. We converted the portal image into the binary image using the optimal threshold value which was gotten through the histogram analysis of the acquired portal image using the basis point plate. we got the location information of the iso-center and basis points from the binary image, and removed the systematic errors which were from the differences between the simulation plan and the portal image. Field size which was measured automatically by optimal threshold portal image, was verified with simulation plan. Anatomic errors were automatically detected and verified with the normalized simulation and the portal image by pattern matching method after irradiating a part of the radiation. Therapy efficiency was improved and radiation side effects were reduced by these techniques, so exact radiation treatment are expected.

  • A Fixed-Point DSP (MDSP) Chip for Portable Multimedia

    Soohwan ONG  Myung H. SUNWOO  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    939-944

    Existing multimedia processors having millions of transistors are not suitable for portable multimedia services and existing fixed-point DSP chips having fixed data formats are not appropriate for multimedia applications. This paper proposes a multimedia fixed-point DSP (MDSP) chip for portable multimedia services and its chip implementation. MDSP employs parallel processing techniques, such as SIMD, vector processing, and DSP techniques. MDSP can handle 8-, 16-, 32- or 40-bit data and can perform two MAC operations in parallel. In addition, MDSP can complete two vector operations with two data movements in a cycle. With these features, MDSP can handle both 2-D video signal processing and 1-D signal processing. The prototype MDSP chip has 68,831 gates, has been fabricated, and is running at 30 MHz.

  • New Adaptive Vector Filter Based on Noise Estimate

    Mei YU  Gang Yi JIANG  Dong Mun HA  Tae Young CHOI  Yong Deak KIM  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    911-919

    In this paper, quasi-Gaussian filter, quasi-median filter and locally adaptive filters are introduced. A new adaptive vector filter based on noise estimate is proposed to suppress Gaussian and/or impulse noise. To estimate the type and degree of noise corruption, a noise detector and an edge detector are introduced, and two key parameters are obtained to characterize noise in color image. After globally estimating the type and degree of noise corruption, different locally adaptive filters are properly chosen for image enhancement. All noisy images, used to test filters in experiments, are generated by PaintShopPro and Photoshop software. Experimental results show that the new adaptive filter performs better in suppressing noise and preserving details than the filter in Photoshop software and other filters.

  • Spatial Interpolation of Image Sequences Using Truncated Projections onto Convex Sets

    Jeong Ho SHIN  Jung Hoon JUNG  Joon Ki PAIK  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    887-892

    This paper presents a new method for image interpolation based on truncated projections onto convex sets (POCS). By using the convergence property to properly defined convex sets, the proposed algorithm can restore high frequency details in the original high resolution image. In order to apply the POCS method to the interpolation procedure, we first present a two-dimensional separable image degradation model for a low resolution imaging system. According to the model, we propose a truncated POCS-based spatial interpolation algorithm for image sequences. Experimental results with synthetic and real image sequence show that the proposed algorithm gives indiscernible interpolation performance compared with the conventional POCS-base algorithm, while it significantly reduces computational complexity and is suitable for processing image sequences.

  • Roundoff Error Analysis in the Decoding of Fractal Image Coding Using a Simplified State-Space Model

    Choong Ho LEE  Masayuki KAWAMATA  Tatsuo HIGUCHI  

     
    PAPER

      Vol:
    E82-A No:6
      Page(s):
    872-878

    This paper proposes an analysis method of the roundoff error due to finite-wordlength decoding in fractal image coding. The proposed method can be applied to large images such as 256 256 or 512 512 images because it needs no complex matrix computation. The simplified model used here ignores the effect of decimation ratio on the roundoff error because it is negligible. As an analysis result, the proposed method gives the output error variance which consists of grey-tone scaling coefficients and an iteration number. This method is tested on various types of 12 standard images which have 256 256 size or 512 512 size with 256 grey levels. Comparisons of simulation results with analysis results are given. The results show that our analysis method is valid for the fractal image coding.

17601-17620hit(21534hit)