Ordered binary decision diagrams (OBDDs) have been widely used in many CAD applications as efficient data structures for representing and manipulating Boolean functions. For the efficient use of the OBDD, it is essential to find a good variable order, because the size of the OBDD heavily depends on its variable order. Dynamic variable reordering is a promising solution to the variable ordering problem of the OBDD. Dynamic variable reordering with the sifting algorithm is especially effective in minimizing the size of the OBDD and reduces the need to find a good initial variable order. However, it is very time-consuming for practical use. In this paper, we propose two new implementation techniques for fast dynamic variable reordering. One of the proposed techniques reduces the number of variable swaps by using the lower bound of the OBDD size, and the other accelerates the variable swap itself by recording the node states before the swap and the pivot nodes of the swap. By using these new techniques, we have achieved the speed-up ranging from 2.5 to 9.8 for benchmark circuits. These techniques have reduced the disadvantage of dynamic variable reordering and have made it more attractive for users.

The aliasing probability was analyzed for MISRs when the error probability for each input was different. A closed form expression was derived by applying the complete weight distributions of linear codes over a Galois field and its dual codes. The aliasing probability for MISRs characterized by non-primitive polynomials was also analyzed. The inner product for binary representation of symbols was used instead of multiplication over a Galois field. The results show the perfect expression for analyzing the aliasing probability of MISRs.

A continuous-wave ultrasonic Doppler system using wide field ultrasound transducers was applied to telemeter blood velocity from the carotid artery of exercising subjects. Velocity spectrogram was obtained by Hanning windowed fast Fourier transformation of the telemetered data. Distortion caused by a high-pass filter and transducers in the telemetry system was discussed in the paper. As the maximum Reynolds number in our experiment was 1478 which is smaller than the critical level of 2000, the blood flow should be laminar. Spatial velocity profiles were then reconstructed from the velocity spectrogram. In this paper, we defined a converging index Q of the velocity spectrum to measure the bluntness of the spatial velocity distribution across the blood vessel. Greater Q, the blunter the velocity profile will be. Simulation results for spatial velocity distributions of theoretical parabolic flow and Gaussian-distribution spectra with varied Q value showed that the cut-off effect by a high-pass filter of cut-off frequency fc=200Hz in our system could be ignored when the axial velocity is larger than 0.30 m/s and Q is greater than 2.0. Our experimental results, in contrast to those obtained from phantom systems by us and by Hein and O'Brien, indicate that the distribution of blood velocity is much blunter than previously thought. The Q index exceeded 10 during systole, whereas it was 0.5 in parabolic flow. The peak of Q index lagged behind that of axial blood velocity by approximately 0.02s. The phase delay of the Q index curve might be due to the time needed for the red blood cells to form the non-homogeneous distribution.

Though tree covering is an efficient algorithm for technology mapping, phase assignments on tree boundaries are not taken into consideration. Several inverter minimization algorithms have been proposed so far, but they do phase optimization before or after technology mapping, and their cost function is not to minimize the total area but to minimize the number of inverters. This paper describes a new formulation of phase optimization problem aiming to minimize the total area during the technology mapping. Cost function representing area according to each phase assignment is introduced, and tree covering algorithm is modified to handle that cost function. Edge-Valued Binary Decision Diagram is used to represent the function implicitly. Experimental results show that proposed method reduces about 10% area on average compared with a state-of-the-art logic synthesis system sis.

This paper presents testing methods for a logic synthesis system which supports the standard HDL UDL/I, focusing on conformance test to the language specification. Conformance test, to prove that the system completely satisfies the language specification, is very important to provide a unified design environment for users of CAD tools which support the language. The basic idea of our testing methods is using a logic simulator, due to a limited schedule for the test execution. We classified the test into two: unit test and integration test. Unit test is a test of each individual functionality of the system, and integration test is a test to prove that the whole system works correctly and satisfies the language specification. And we prepared and used various kinds of test data. One of them is the UDL/I Test Suite and it was also utilized to observe progress of language coverage by the system during the test execution.

This paper presents an accurate and semi-physical MOSFET substrate current model suitable for analog circuit simulations. The proposed model is valid over a wide range of the electric field present in MOSFET devices and is continuous from cut off region to saturation region. The developed model was implemented into the circuit simulator, SPICE3. Benchmark of the developed model was achieved by making comparisons between the measured data and the simulated data for MOSFET devices, push-pull CMOS inverters, a regulated cascode CMOS operational amplifier. The experimental results showed that the developed model was more accurate and computationally efficient than the conventional models.

The family Pk of graphs with proper-path-width at most k is minor-closed. It is known that the number of minimal forbidden minors for a minor-closed family of graphs is finite, but we have few such families for which all the minimal forbidden minors are listed. Although the minimal acyclic forbidden minors are characterized for Pk, all the minimal forbidden minors are known only for P1. This paper lists 36 minimal forbidden minors for P2, and shows that there exist no other minimal forbidden minors for P2.

If a general Petri net N = (S, T, F, Mo) is transition-live under Mo, it is evident that each maximal structural deadlock SDL(D) in N as well as each minimal structural deadlock MSDL (ND) in each D is also transition-live under Mo. However, since the converse of the latter of the above is not always true, it is important to obtain the conditions for this converse to be true if we want to have a useful necessary and sufficient "initial-marking-based" or "structural" liveness condition for N. Up to now, usefull and well-known structural or initial-marking-based necessary and sufficient liveness conditions of Petri nets have only been those of an asymmetric choice (AC) net and its subclasses such as an EFC net, an FC net, an FCF net, MG, and SM. However, all the above subclasses are activated only by real or virtual deadlock-trap properties which are local liveness for each minimal deadlocks; in other words, the above topics of this paper are unconditionally satisfied in those subclasses because of their special structure of nets. In this paper, a necessary and sufficient structural liveness condition for a general Petri net N with globally structural live minimal structural deadlocks is presented as follows: The next () or () is satisfied. () N has no SDL D. () If N has at least one SDL D, () or () is satisfied under the condition that each MSDL ND in N is transition-live under Mo. () N has no singular MSDL (α) (i.e., (α-) and (α-)). () If N has at least one singular MSDL (α-)((α-), resp.), every semi-MDSL ()((), resp.) NDS = (SDS, TDS, FDS, MoDS with respect to each singular MSDL (α-)((α-), resp.), is transition-live under the MoDS under the condition of "the condition (**)", where the locally structural liveness for this NDS means (1) or (2)((3), resp.) of Lemma 4-4 and "the condition (**)" is defined in Lemma 4-7 of this paper. The relationship between the above results and the liveness problem for N is also shown.

This paper applied the polarimetric filtering principle to Synthetic Aperture Radar (SAR) image sets in three possible polarimetric radar channels and compared the resultant imagery. The polarimetric radar channels in consideration here are Co-Pol, Cross (X)-pol, and Matched (M)-pol channels. Each channel has its own polarimetric characteristics for imaging. Using the formulation of the contrast enhancement factors based on the Stokes vector formalism, polarimetric enhanced images for three channels are shown using NASA JPL DC-8 AIRSAR data sets (CC0045L, Bonanza Creek, AK/USA). It is shown that the optimally enhanced Co- and X-Pol channel images play a decisive role in imaging in a complex featured background.

SEASAT synthetic aperture radar (SAR) echoes from the sea show beautiful images of storms over the ocean. However, the mechanisms by which such storm images are created have not yet been revealed very well. The core of these images is usually an echo-free hole which is attributed to the damping of the radar-detectable short gravity waves by the intense rain in the storm core. The bright area surrounding the core is believed to be caused by strong winds diverging from the downdraft which is collocated with the intense rain. The outer boundary of the bright area has been found to be associated with the classical gust front. During the Tropical Ocean Global Atmosphere/Coupled Ocean-Atmosphere Response Experiment (TOGA/COARE), continuous observations of rain by shipborne radars were carried out. One image of JERS-1 SAR taken in this period contains storms that were within the observation area of a shipborne radar. The SAR image and the rain-radar image are compared. Even though the signal-to-noise ratio of the SAR image is very low, there is good correspondence between heavy rain areas and some of the dark areas in the SAR image. The boundary of a rain-induced dark area is found to correspond approximately to the radar reflectivity factor (Z-factor) of 35dBZ or 5.5mm/h of rain.

In this paper we describe a method for resynthesizing the controller of a design for a fixed datapath with the objective of increasing the design's throughput by minimizing its total execution time. This work has tremendous potential in two important areas: one, design reuse for retargetting datapaths to new libraries, new technologies and different bit-widths; and two, back-annotation of physical design information during High-Level Synthesis (HLS), and subsequent adjustment of the design's schedule to account for realistic physical design information with minimal changes to the datapath. We present our approach using various formulations, prove optimality of our algorithm and demonstrate the effectiveness of our technique on several HLS benchmarks. We have observed improvements of up to 34% in execution time after straightforward application of our controller resynthesis technique to the outputs of HLS.

This paper describes a 600 mV single-chip MPEG2 video decoder, implemented in a 0.5 µm triple metal CMOS technology, which operates with a 3.3-volt power supply. To achieve low power consumption, a low power dual-port RAM has been developed utilizing a selective bit line precharge scheme to reduce bit line current which is suitable for use in the bit-slice array commonly found in parametric ASIC RAM macro modules. This architecture and a non-DC current sense amp make the RAM's read power consumption one-third of that of a conventional dual-port RAM. Various techniques such as multiple-clock architecture and a system clock independent from a display clock make a system clock frequency as low as possible. The video decoder has a syntax parser, so that it can handle the higher syntactic elements of MPEG2 bit streams without any host processor and decode the Main profile at Main level of MPEG2 bit streams.

We have developed a neutron imaging system based on the penumbral imaging technique. The system consists of a penumbral aperture and a sensitive neutron detector. The aperture was made from a thick (6 cm) tungsten block with a toroidal taper. It can effectively block 14-MeV neutrons and provide a satisfactory sharp, isoplanatic (space-invariant) point spread function (PSF). A two-dimensional scintillator array, which is coupled with a gated two-stage image intensifier system and a CCD camera, was used as a sensitive neutron detector. It can record the neutron image with high sensitivity and high signal-to-noise ratio. The reconstruction was performed with a Wiener filter. The spatial resolution of the reconstructed neutron image was estimated to be 31 µm by computer simulation. Experimental demonstration has been achieved by imaging 14-MeV deuterium-tritium neutrons emitted from a laser-imploded target.

CAMs (Content Addressable Memories) are functional memories which have functions such as word-parallel equivalence search, bilateral 1-bit data shifting between consecutive words, and word-parallel writing. Since CAMs can be integrated because of their regular structure, massively parallel CAM functions can be executed. Taking advantage of CAMs, Ishiura and Yajima have proposed a parallel fault simulation algorithm using a CAM. This algorithm, however, requires a large amount of CAM storage to simulate large-scale circuits. In this paper, we propose a new massively parallel fault simulation algorithm requiring less CAM storage, and compare it with Ishiura and Yajima's algorithm. Experimental results of the algorithm on CHARGE --the CAM-based hardware engine developed in our laboratory--are also reported.

In identification of a finite impulse response (FIR) model using noise-corrupted input and output data, the least squares type of estimation schemes such as the ordinary least squares (LS), the corrected least squares (CLS) and the total least squares (TLS) method become often numerically unstable, when the true input signal to the system is strongly correlated. To overcome this ill-conditioned problem, we propose a regularized CLS estimation method by introducing multiple regularization parameters to minimize the mean squares error (MSE) of the regularized CLS estimate of the FIR model. The asymptotic MSE can be evaluated by considering the third and fourth order cross moments of the input and output measurement noises, and an analytical expression of the optimal regularization parameters minimizing the MSE is also clarified. Furthermore, an effective regularization algorithm is given by using the only accessible input-output data without using any true unknown parameters. The effectiveness of the proposed data-based regularization algorithm is demonstrated and compared with the ordinary LS, CLS and TLS estimates through numerical examples.

We have developed a design technique for static logic circuits. Using this technique, we designed 1/2 divider-type 1:4 demultiplexer (DEMUX) and 2:1 selector-type 4:1 multiplexer (MUX) circuits, each of which is a key component in high-speed data multiplexing and demultiplexing. These circuits consist of double rail flip-flops (DR F/F). These flip-flops have a smaller mean internal capacitance than single rail flip-flops, making them suitable for high-speed operation. The DR F/F has a symmetric structure, so the double rail toggle flip-flop can put out an exactly balanced CK/CKN signal, which boosts the speed of the data flip-flops. The double rail structure enables 30% faster operation but consumes only 17% more power (per GHz) than a single rail circuit. In addition, our 0.25-µm process technology provides a 70% higher frequency operation than 0.5-µm process technology. At the supply voltage of 2.2 V, the DEMUX circuit and the MUX circuit operate at 4.55 GHz and 2.98 GHz, respectively. In addition, the 0.25-µm DEMUX circuit and the MUX circuit respectively consume 6.0 mW/GHz and 13.7 mW/GHz (＠1.3 V), which are only 12% of the power consumed by 3.3-V 0.5-µm circuits. Because of its high-speed and low-power characteristics, our design technique will greatly contribute to the progress of large-scale high-speed telecommunication systems.

This paper describes our newly developed intelligent sensor system which comprises two eyes and four ears on a movable head. It can acquire its dynamical visual and auditory image of its surrouding 3-D environment while showing humanlike behavior naturally and autonomously. The most important feature of the sensor system is in an autonomous and optimum sensory architecture of it. This enables the sensor to achieve 1) repid (5 ms) and accurate (2 deg) auditory localization, 2) rapid (0.5 s/65536 pixel) extraction of visual motion in marginal view, 3) rapid (several TV frames' time) eye movement and binocular fixation to a suddenly appeared object, 3) rapid (0.1 s/4096 pixel) extraction of 3-D object profile and image features, which is activated by its own auditory localization and motion detection. We describe in this paper the several key items for realizing this sensor.

This paper proposes a new method to design an optimal pipelined instruction set processor using formal HW/SW codesign methodology. A HW/SW partitioning algorithm for selecting an optimal pipelined architecture is introduced. The codesign task addressed in this paper is to find a set of hardware implemented operations to achieve the highest performance of an ASIP with pipelined architecture under given gate count and power consumption constraints. The problem formalization as well as the proposed algorithm can be considered as an extension of our previous work toward a pipelined architecture. The experimental results show that the proposed method is quite effective and efficient.

We thought that multiple skeletons were inherent in an ordinary three-dimensional object. A thinning method is developed to extract multiple skeletons using 333 templates for boundary deletion based on the hit or miss transformation and 222 templates for checking one voxel thickness. We prepared twelve sets of deleting templates consisting of total 194 templates and 72 one voxel checking templates. One repetitive iteration using one sequential use of the template sets extracts one skeleton. Some of the skeletons thus obtained are identical; however, multiple independent skeletons are extracted by this method. These skeletons fulfill the well-recognized three conditions for a skeleton. We extracted three skeletons from the cube, two from the space shuttle model and four from the L-shaped figure by Tsao and Fu. The digital medial skeleton, which is not otherwise extracted, is extracted by comparing the multiple skeletons with the digital medial-axis-like-figure. One of our skeletons for the cude agreed with the ideal medial axis. The locations of the gravity center of the multiple skeletons are compared with that of the original shape to evaluate how uniform or non-biased skeletons are extracted. For the L-shaped figure, one of our skeletons is found to be most desirable from the medial and uniform points of view.

In order to evaluate quantitatively TMJ sound, TMJ sound in normal subject group, CMD patient group A with palpable sounds unknown to them, CMD patient group B with palpable sounds known to them, and CMD patient group C with audible sounds were detected by a contact microphone, and frequency analysis of the power spectra was performed. The power spectra of TMJ sound of normal subject group and patient group A showed patterns with frequency values below 100 Hz, whereas the power spectra of patient groups B and C showed distinctively different patterns with peaks of frequency component exceeding 100 Hz. As regards the cumulative frequency value, the patterns for each group clearly differed from those of other groups; in particular the 80% cumulative frequency value showed the greatest difference. From these results, it is assumed that the 80% cumulative frequency value can be used as an effective indicator for quantitative evaluation of TMJ sound.