This paper reports experimental results of a media synchronization mechanism which was proposed by the authors, focusing on the graceful recovery scheme. The proposed method consists of intra-stream and inter-stream synchronization mechanisms. The inter-stream synchronization control is performed after the intra-stream synchronization control over each media unit (MU) such as a video frame. Then, whether the intra-stream synchronization is still maintained or not is checked. In the experimental system, video and voice stored in a source workstation are transferred to a destination workstation via an FDDI network, and then they are synchronized and outputted at the destination (i.e., lip-synch). At the transmission of each MU, we simulate network delay jitters by generating a pseudo-delay which is exponentially distributed. Using the system, we have confirmed the validity of the mechanism. We also clarify how to set the threshold and parameter values defined in the mechanism by evaluating mean square error and average MU rate or by subjective assessment. Furthermore, we demonstrate that the intra-stream synchronization control for each streams in addition to the inter-stream control is necessary for high quality synchronization.

We studied effects of 50-200-keV electrons on semiconductor devices using BEASTLI (backscattered electron assisting LSI inspection) method. When irradiating semiconduc-tor devices with such high-energy electrons, we have to note two phenomena. The first is surface charging and the second is device damage. In our study of surface charging, we found that a net positive charge was formed on the device surface. The positive surface charges do not cause serious influence for observation so that we can inspect wafers without problems. The positive surface charging may be brought about because most incident electrons penetrate the device layer and reach the conducting substrate of the semiconductor device. For the device damage, we studied MOS devices which were sensitive to electron-beam irradiation. By applying a 400- annealing to electron-beam irradiated MOS devices, we could restore the initial characteris-tics of MOS devices. However, in order to recover hot-carrier degradation due to neutral traps, we had to apply a 900- annealing to the electron-beam irradiated MOS devices. Thus, BEASTLI could be successfully used by providing an apporopri-ate annealing to the electron-beam irradiated MOS devices.

In order to reduce the ever increasing cost for ULSI manufacturing due to the complexity of integrated circuits, dramatic simplification in the logic LSI architecture as well as the very flexible circuit configuration have been achieved using a highfunctionality device neuron-MOSFET (γMOS).In γMOS logic circuits, however, computations based on the multiple-valued logic is the key for enhancing the functionality. Therefore, much higher accuracy of processing is required. After brief description of the operational principle of γMOS logic, the relationship between the number of multiple logic levels and the functionality enhancement is discussed for further enhancing the functionality of γMOS logic circuits by increasing the number of multiple logic levels, and the accuracy requirements for the manufacturing processes are studied. The order of a few percent accuracy is required for all principal device structural parameters when it is aimed to handle 50-level multiple-valued variable in the γMOS logic circuit.

Many ATM switching modules with high performance have been proposed and analyzed. A development of a large scale ATM switching system (e.g., used as a central switch) is the key to realization of the broadband ISDN. However, the dimension of ATM switching ICs is limited by the technological and physical constraints on VLSI. A multistage switching configuration is one of the promising configurations for a large scale ATM switch. In this paper, we treat a 3-stage switching configuration with no internal bufferes; i.e., bufferless switches are employed at the first and second stages, and output buffered switches at the third stage. A short-term cell loss probability is analyzed in order to examine the influence of bursty traffic on performance of the bufferless switch used at the first two stages. Furthermore, we propose a 4-stage switching configuration with traffic distributors added at the first stage. This switch provides more paths between a pair of input and output ports than the 3-stage switching configuration mentioned above. A few schemes to distribute cells are compared. It is shown that the distributor successfully reduces the deterioration of cell loss probability due to bursty traffic by splitting incoming cells into several switching modules.

A new anti-static technology to neutralize static electricity by high energy photon irradiation has been developed. Ions and electrons required for neutralization are generated by ionization of gas molecules in the vicinity of a charged substance. Gas molecules absorbs photons to become ionized. The wavelength chosen for the irradiation depends on the neutralization atmosphere. Soft X-rays with wavelength over about 1 are effective in air or O2 gas at pressure higher than several hundreds Torr. Vacuum UV-rays with wavelength below about 1350 is effective in N2 gas, Ar gas, or reduced pressure ambients. These methods feature excellent neutralization capa-bility. Electrostatic potential can be reduced to 0 V in a very short time without encountering the problems of which conven-tional corona discharge ionizers.

This paper proposes a new digitized group modulator and demodulator (a group modem) for adaptive frequency hopping and multi-carrier (AFHMC) radio systems. The group modem can flexibly vary the number of carriers handled simultaneously, especially employing a time division multiplexing technique in the demodulator. We discuss the operational principle of the modem. The required operational clock frequency in the group demodulator is also examined and clarified taking into consideration the frequency characteristics of the baseband filter. The basic performance of the proposed configuration is measured experimentally by constructing a π/4-shift QPSK group modulator and a π/4-shift QPSK group demodulator. First, by measuring the output spectrum of the significant parts in the demodulator, we confirm that the basic operational performance conforms to the design specifications. Secondly, investigating the relationship between the number of multiplexed low-pass filter taps and the required CNR when multiple carriers are simultaneously input confirms that more than 40 taps are enough to obtain the best BER performance in this experiment. Next, examining the relationship between the number of carriers simultaneously input, the required CNR, and the input level of these carriers confirm that the required CNR is roughly constant and there is no significant difference among the cases when D/U is more than 0 dB. Finally, an experiment shows that the required number of quantization bits for A/D input in the demodulator is more than 6, which is enough to obtain the best BER even if simultaneous handled carriers are 4.

This paper proposes a method for achieving low-power control-logic modules using a combination of CMOS complex gate reorganization, transistor size optimization, and transistor layout. Complex gate reorganization minimizes transistor count and net count without changing the functionality of the circuit. Transistor sizing and layout are interdependent, the optimization of one results in the optimization of the other. The authors applied the reorganization method to a 10,846-transistor circuit, and succeeded in reducing the transistor count by 10%, and the net count by 9%. Transistor sizing and layout compaction reduced the average transistor size by one tenth, while the same delay was maintained. Total circuit capacitance, which is strongly related to power dissipation, was cut to 36%, even when wiring capacitances were dominant.

This paper presents implicit representation of binary decision diagrams (implicit BDDs) as a new effecient data structure for Boolean functions. A well-known method of representing graphs by binary decision diagrams (BDDs) is applied to BDDs themselves. Namely, it is a BDD representation of BDDs. Regularity in the structure of BDDs representing certain Boolean functions contributes to significant reduction in size of the resulting implicit BDD repersentation. Since the implicit BDDs also provide canonical forms for Boolean functions, the equivalence of the two implicit BDD forms is decided in time proportional to the representation size. We also show an algorithm to maniqulate Boolean functions on this implicit data structure.

This letter proposes evolutionary digital filters (EDFs) as new adaptive digital filters. The EDF is an adaptive filter which is controlled by adaptive algorithm based on the evolutionary strategies of living things. It consists of many linear/time-variant inner digital filters which correspond to individuals. The adaptive algorithm of the EDF controls and changes the coefficients of inner filters using the cloning method (the asexual reproduction method) or the mating method (the sexual reproduction method). Thus, the search algorithm of the EDF is a non-gradient and multi-point search algorithm. Numerical examples are given to show the effectiveness and features of the EDF such that they are not susceptible to local minimum in the multiple-peak performance surface.

This paper proposes a tool to analyze complicated phenomena from a simple hysteresis network. The simple hysteresis network is described by a piecewise liner ordinal differential equation and has only two parameters: self feedback and DC team. Then this simple system exhibits various kinds of attractors: stable equilibria, periodic orbits, tori and chaos. In order to perform the numerical analysis, we derive return map and propose a fast calculation algorithm for the return map and its Lyapunov exponents based on the exact solutions. Using this algorithm, we have clarified chaos generation and related bifurcation phenomena. Also, we give theoretical formula that give fundamental bifurcation set.

This paper reviews Dynamic Channel Allocation (DCA) in TDMA cellular systems. The emphasis is on distributed DCA, which features decentralized control and adaptability to interference. Performance measures are discussed not only from a theoretical viewpoint but also from a practical viewpoint. Major techniques to enhance the capacity of cellular systems are channel segregation, reuse-partitioning, and transmitter power control. In addition to the performance of conventional cellular systems, differing performance in microcellular systems and multi-layer cellular systems is also discussed.

This paper proposed a method of slot allocation in a multislot TDMA system when multiple service priorities are supported. The algorithm is tested both in Variable Rate Reservation Access (VRRA) and Advanced TDMA protocols. We exploit the multislot reservation capability to achieve the delay requirements of each priority level. The channel allocation algorithm assumed that all data terminals are capable of multislot reservation. In this case the delay variance can be controlled based on the packet length information and the accumulated delay of each data user. The performance of the system is evaluated using the cumulative delay distribution and mean overall delays for the different user types.

A new dynamic channel allocation algorithm which is integrated with transmitting power control is proposed. By introducing a new threshold, referred to as TPC threshold (Transmitting Power Control threshold), which is added some margin to the threshold of channel allocation, the subsequent transmitting power control can be performed effectively. This DCA algorithm can achieve a cellular system with both high traffic capacity and high service quality such as interference frequency performance simultaneously. The computer simulation shows that this DCA algorithm improves blocking probability performance 4 times better than that of DECT system at 14 Erlang, while keeping the same interference frequency and forced termination performances.

The dynamic channel assignment (DCA) strategy proposed here uses information on the mobile station speed and direction of motion to reduce the number of forced call terminations and channel changes in micro cellular systems. This SMD (speed and moving direction) strategy is compared with the main DCA strategies by simulating a one-dimensional service area covering a road on which there are high-speed mobile stations (HSMSs) and low-speed mobile stations (LSMSs).The simulation results show that the SMD strategy has the best performance in terms of forced call termination and channel change. The performance difference between the SMD strategy and the other DCA strategies increases as cell size decreases and as HSMS speed increases. While the SMD strategy does not yield the best total call blocking rate, its total carried load is the best when cells are small and HSMS speed is high. Also, the SMD performance improves when the HSMS offered load is small and the LSMS offered load is large. Although the SMD strategy requires information on the speed and direction of each mobile station and it increases call blockings somewhat, it reduces the number of forced call terminations and channel changes considerably, which is important in micro cellular systems.

A novel redundancy method suitable for an ultra-high-speed SRAM with logic gates is proposed. Fuse decoders are used to reduce the number of fuses, thus suppressing the access time degradation. This makes it possible to flip chip bond an SRAM with logic gates, which has a high pin count and operates at a very high frequency. To combine the new redundancy method and an ECL decoder circuit with a BiCMOS inverter, several schemes for disabling a defective cell and enabling a spare one are discussed. A 1-Mb ECL-CMOS SRAM with 120-k logic gates was fabricated using 0.3-µm BiCMOS technology. This SRAM consists of 16 RAM macros, and the RAM macro had an access time of only 0.65 ns. The access time degradation after repair was less than 50 ps.

In order to simulate the mechanism of particle growth by film deposition, imaginary-particle formation method has been newly developed. By using this formation method, the particle size, the particle height and the position of particle on a wafer could be controlled very easily. In this study, the imaginary-particles of various size larger than 0.15 micron and various height were formed on a wafer. By using these imaginary-particles, the effects of a deposition method, a film thickness, a particle size and a particle height upon the particle growth were investigated. As deposition methods, low pressure CVD method, plasma CVD method and sputtering method were compared. As a result, in all deposition method, it's clear that the particle growth doesn't depend on the initial size, and is proportional to the film thickness. Their particle growth rates are characterized by the deposition method, and their values are 1.9, 1.1 and 0.64 in low pressure CVD, plasma CVD and sputtering method, respectively. These values can be explained by the step coverage decided by the deposition method. Furthermore, the particle growth on imaginary-particle was compared with that on the real-particle. It is clear that the growth mechanism of the real-particle is closely similar to that of imaginary-particle, and the study by use of the imaginary-particle is very effective to make clear the mechanism of particle growth. Therefore, the particle size which should be controlled before deposition process is necessary to be decided by counting the particle growth shown in this paper.

A new yield prediction model has been developed, which can successfully describe the actual chip fabrication yield. It basically consists of modeling of particles deposited on wafer surface, considering the change in their size and spatial distribution due to the subsequent processing steps and a new concept of virtual line width in pattern layouts. It is confirmed that this yield prediction model serves as an effective navigator for improvement/optimization of fabrication lines such as pointing out the process step/equipments to be modified for yield improvements.

It has been revealed that ion bombardment energy and ion flux density play an essentially critical role in SiNx deposition process of PECVD in TFT-LCD production. Ion energy and ion flux density bombarding onto substrate surface are known to be extracted from waveform of RF applied to an electrode. Using this method, we investigated film quality of SiNx formed in the conventional parallel plate PECVD equipment. When N2 + H2 or N2 + Ar is employed as a carrier gas in source gas (SiH4 + NH3), we have defined normalized ion flux density as ion flux density divided by deposited SiNx molecule which must be increased to obtain high quality SiNx film while ion energy is suppressed at low level as not giving damages on the film surface. This technique has made it possible to securely form SiNx film (2500 ) featuring dielectric break-down field intensity of 8.5 MV/cm at 250 on a glass substrate with Cr gate interconnects of 1000 having vertical step struc-ture. One of the important factors to improve film quality of SiNx deposited in PECVD is to increase ion flux density while keeping ion bombardment energy low enough to protect growing surface against any damages. Using this technique inverse-staggered TFT-array featuring field effect mobility of 0.96 cm2/Vs has been demonstrated which gate insulator SiNx, non-doped a-Si: H and a-Si: H(n+) were formed continuously at the identical substrate temperature of 250.

To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.

Understanding unknown objects in images is one of the most important fields of the computer vision. We are confronted with the problem of dealing with the ambiguity of the image information about unknown objects in the scene. The purpose of this paper is to propose a new object recognition method based on the fuzzy relation system and the fuzzy integral. In order to deal with the ambiguity of the image information, we apply the fuzzy theory to object recognition subjects. Firstly, we define the degree of similarity based on the fuzzy relation system among input images and object models. In the next, to avoid the uncertainty of relations between the input image and the 2-D aspects of models, we integrate the degree of similarity obtained from several input images by the fuzzy integral. This proposing method makes it possible to recognize the unknown objects correctly under the ambiguity of the image information. And the validity of our method is confirmed by the experiments with six kinds of chairs.