The matrix whose eigenvectors are the basis vectors of the DCT is introduced. This matrix leads to a convolution-product property using the DCT. Based on the property, the parameter of uniform blur, such as motion blur or out-of-focus blur, is estimated from the local minima of the DCT energy spectrum of a blurred image. Computer experiments confirmed that the DCT is superior to the DFT for estimating the parameter.

Reflection mode diffraction tomography is expected to reconstruct a higher resolution image than transmission mode. Its image reconstruction problem, however, in the many cases of practical uses becomes ill-posed one. In this paper, a new reconstruction method of limited angle reflection mode diffraction tomography using maximum entropy method is proposed. Results of simulation showed that the method was able to reconstruct the better quality images than IR method poposed by Kak, et al.

The already reported physical glossiness such as Mirror glossiness, indistinctness-degree glossiness, etc. are not proportional to the psycological glossiness which is the standard of the gloss, in cases of various colored specimens. Thus, in order to obtain a glossiness proportional to the psycological glossiness, first, the brightness distribution of the colored specimens was measured. Then, it was transformed to bring the form of the measured brightness distribution close to the visual distinctness-begree distribution, by the expand-reduce transformation technique. From the transformed distribution curve, the new glossiness G(H, V, C) was defined as functions of hue H, lightness V, saturation C and the indistinctness-degree glossiness GID. This new glossiness G(H, V, C) was applied to the Munsell color atlas papers and the high glossy colored papers, and then it was confirmed to be in proportion to the psychological glossiness GPh.

Recently, there has been increasing interest in Code Division Multiplex (CDM) systems. We reported the CDM system using the -chip shift multiplex operation. So far the performance of this system evaluated under the optimum . In this letter, we evaluate an influence of the phase difference between the groups on BER performance in 2M-plex system.

A least squares approximation method of recursive digital filters for finite interval response with zero value outside the interval is presented. According to the characteristic of the method, the modified Gauss Method is utilized in iteratively determining design parameters. Convergence, together with the stability of the resulting filter, are guaranteed.

This paper presents a new Hypermedia communication platform supported by the new digital image medium of super high definition (SHD) images. This new image communication platform will encourage the integration of all existing media to realize rich and realistic visual communication over B-ISDN. SHD images have a resolution of more than 20482048 pixels and the frame rate is more than 60 frames/sec. To achieve an real-time compression of SHD moving images, parallel signal processing systems with peak performance of 0.5 Tera Flops will be necessary. The specification requirements, signal processing and communication technologies needed to achieve SHD image communication are discussed. The relationship of hypermedia to SHD images is also examined.

In this paper, we discuss to the intermedia synchronization problems for high speed multimedia communication. Especially, we described how software synchronization can be operated, and estimated the skew bound in CNV when considering the network delay. And we applied CNV to the intermedia synchronization and a hybrid model (HSM) is proposed. Furthermore, we used the statistical approach to evaluate the performance of the synchronization mechanisms. The results of performance evaluation show that HSM has good performance in the probability of estimation error.

The performance of processing elements can be improved by the progress of VLSI circuit technology, while the communication overhead can not be negligible in parallel processing system. This paper presents a unified scheduling that allocates tasks having different task processing times in multiple processing elements. The objective function is formulated to measure communication time between processing elements. By employing constraint conditions, the scheduling efficiently generates an optimal solution using an integer programming so that minimum communication time can be achieved. We also propose a VLSI processor for robotics whose latency is very small. In the VLSI processor, the data transfer between two processing elements can be done very quickly, so that the communication cycle time is greatly reduced.

The performance evaluation by analysis of systems employing Reduced State Viterbi decoding is addressed. This type of decoding is characterized by an inherent error propagation effect, which yields a difficulty in the error probability analysis, and has been usually neglected in the literature. By modifying the Full State trellis diagram, we derive for Reduced State schemes, new transfer function bounds with the effects of error propagation. Both the Chernoff and the tight upper bound are applied to the transfer function in order to obtain the bit error probability upper bound. Furthermore, and in order to get a tighter bound for Reduced State decoding schemes with parallel transitions, the pairwise probability of the two sequences involved in an error event is upper bounded, and then the branch metric of a sequence taken from that bound is associated with a truncated instead of complete Gaussian noise probability density function. To support the analysis, particular assessment is done for a Trellis Coded Modulation scheme.

This paper proposes a second order auto-regressive equation with discrete-valued random coefficients. The auto-regressive equation transforms an independent stochastic sequence into a binary sequence, which is a special case of a stationary Markov chain. The power spectrum, correlation function and the transition probability are explicitly obtained in terms of the random coefficients. Some computer results are illustrated in figures.

It has been reported that generalization performance of multilayer feedformard networks strongly depends on the attainment of saturated hidden outputs in response to the training set. Usually standard Backpropagation (BP) network mostly uses intermediate values of hidden units as the internal representation of the training patterns. In this letter, we propose construction of a 3-layer cascaded network in which two 2-layer networks are first trained independently by delta rule and then cascaded. After cascading, the intermediate layer can be viewed as hidden layer which is trained to attain preassigned saturated outputs in response to the training set. This network is particularly easier to construct for linearly separable training set, and can also be constructed for nonlinearly separable tasks by using higher order inputs at the input layer or by assigning proper codes at the intermediate layer which can be obtained from a trained Fahlman and Lebiere's network. Simulation results show that, at least, when the training set is linearly separable, use of the proposed cascaded network significantly enhances the generalization performance compared to BP network, and also maintains high generalization ability for nonlinearly separable training set. Performance of cascaded network depending on the preassigned codes at the intermediate layer is discussed and a suggestion about the preassigned coding is presented.

A cyclic analog-to-digital (A/D) converter is developed which accomplishes an n-b conversion in n/2 clock cycles. The architecture consists of two 1-b quantizers connected in a loop. A CMOS design of the 1-b quantizer is given to evaluate the performance of the A/D converter when implemented using presently available process. Spice simulations and error analyses show that a resolution higher than 10-b and a sampling rate up to 1.4 Msps are attainable with a 3-µm CMOS process. A prototype converter breadboarded using discrete components has confirmed the principles of operation and error analyses. The device count and the power consumption are small compared to those of a successive-approximation A/D converter. A chip area required for the CMOS implementation is also small because only four unit capacitors are involved. Therefore, the architecture proposed herein is most suited for high accuracy, medium speed A/D conversion.

This paper presents ceramic multi-layer substrates for mobile communication using alumina-glass composite ceramics and co-fired copper conductors. Electrical characteristics in GHz frequencies of the substrate, copper conductor, transmission line, via hole and coupling between the striplines were evaluated. The results showed that the ceramic multi-layer substrate had good electrical characteristics enough for GHz-band applications. Using the ceramic multi-layer substrates, one can drastically reduce the size of RF circuit boards for mobile communication equipment.

This paper presents newly developed very small MMIC bandpass filters along with novel positive and negative feedback techniques. In order to maintain the expected Q factor without unwanted oscillations in the positive feedback loop, the unity-coupler principle is proposed to stabilize the constituent amplifier. A prototype bandpass filter is monolithically integrated in a very small area of only 0.1 mm2 on a GaAs substrate. A sharp factor as high as 5.6/1-30 dB is achieved near the frequency range of 1 GHz. The other technique presented in this paper is to achieve the bandpass function without using any positive feedback. This is negative feedback consisting of feedback elements with the unique variable transfer function of b/(1as). A variable bandpass filter based on this design concept is also fabricated in a 1.21.3 mm2 area on a GaAs substrate. It has both a varactor and varistor integrated in the circuit, resulting in an independently controllable center frequency and Q factor. It is shown experimentally that the Q factor is controllable over a remarkable range of 20 to 400 and the center frequency is broader than 100 MHz at the 1 GHz band. By cascading two of the fabricated MMIC chips, a forth-order frequency response is successfully obtained along with a 35-40 dB forward gain and an in-band gain flatness of 0.35 dB.

This paper presents a simple numerical method for calculating the stationary transmission and reflection characteristics of a variety of nonlinear Fably-Perot resonators. In nonlinear media, Maxwell's equations are directly solved by using a numerical integration of complex variables. The input-output characteristics of the Kerr-like nonlinear film without reflection mirrors and with multilayer mirrors have been calculated to demonstrate the usefulness and versatility of the proposed method and to find out resonator configurations exhibiting optical bistability at low incident-power levels. The effects of saturation in the nonlinear permittivity on the input-output characteristics have also been investigated. It has been found that a single nonlinear film with oblique incidence exhibits optical bistability without using reflection mirrors even if the refractive index of the film is low. This offers a simple method for measuring third-order nonlinearities of optical materials.

A dielectric rod waveguide applicator for microwave heating such as microwave hyperthermia is described. The applicator consists of the acrylic cylinder filled with deionized water. By circulating the deionized water, the dielectric rod waveguide applicator acts as a surface cooling device, so that it doesn't need any bolus. This surface cooling device enables the dielectric rod waveguide applicator to control the site of effective heating region along the depth axis. Useful pattern of the circular or spheroidal shape and axially symmetric effective heating region were obtained. Furthermore metal strips provided on the aperture of applicator control the shape of the heating pattern.

A 170-mW class GaAs Power MESFET and a 10-mW class MMIC pre-amplifier operating at very low drain bias have been developed for use in personal handy phones (PHP). The MESFET provided P0(1dB)22.5 dBm, ηadd38.8% at VDS3 V with IDS0.14 A (0.4 IDSS) at 1.9 GHz, and also provided P0(1dB)22.4 dBm, ηadd32.6% at VDS2 V with IDS0.24 A (0.6 IDSS). The MMIC using the same MESFET structure had a linear power gain of 13 dB, a linear output power of more than 10 dBm, and P0(1dB)13.7 dBm, ηadd24.3% at VDD3 V with ID30 mA at 1.9 GHz. The MESFET had a buried p-layer and our improved LDD n self-aligned structure both of which were optimized so as to satisfy a high V(BR)GDO of more than 10 V, a minimized bias dependence of S-parameters and low VK of less than 0.5 V.

The Viterbi algorithm is a well-established technique for channel and source decoding in high performance digital communication systems. However, excessive time consumption makes it difficult to design an efficient high-speed decoder for practical application. This paper describes the implementation of parallel Viterbi algorithm by multi-microprocessors. Internal computations are performed in a parallel fashion. The use of microprocessors allows low-cost implementation with moderate complexity. The software and hardware implementations of the Viterbi algorithm on parallel multi-microprocessors for real-time decoding are presented. The implemented method is based on a combination of forming a set of tables and calculations. For efficient operation under fully parallel Viterbi decoding by microprocessors, we considered: (1) branch metrics processing, path metrics updating, path memory updating and decoding output for microprocessor, (2) efficient decomposition of the sequential Viterbi algorithm into parallel algorithms, (3) minimization of the communication among the microprocessors. The practical solutions for the problems of synchronization among the miroprocessors, interconnection network for communication among the microprocessors and memory management are discussed. Furthermore the performance and the speed of the parallel Viterbi decoding are given. For a fixed processing speed of given hardwares, parallel Viterbi decoding allows a linear speed up in the throughput rate with a linear increase in hardware complexity.

A novel sampling comparator circuit is presented for extending the pull-in range of microwave phase-locked oscillators (PLOs). It performs both phase and frequency detection without any frequency dividers, and a GaAs MMIC prototype is developed and tested. The proposed comparator improves the pull-in range by about 10 times more than is possible with conventional sampling phase detectors.

A circuit emulation technique in the ATM network becomes necessary to guarantee user requirements similar to QOS grade offered by STM network where small bit error rates and constant delay times are offered. The Head-Of-Line method or other priority control schemes may be considered to provide such service in the ATM network, while it is known to give too inferior quality to non-circuit emulation service traffic. In this paper, we propose a new method called a periodical bandwidth allocation method for the circuit emulation technique. The cells of circuit emulation service traffic are transmitted periodically in our proposal. A periodical interval is determined from both the length of limit delay time of circuit emulation traffic in each switching node and the number of cell arrivals during the limit delay time. To evaluate our method, we consider three kinds of arrival patterns (the best case, the moderate case, and the worst case) for the circuit emulation traffic and a two-state MMPP for modeling the non-circuit emulation traffic. We show performance results in terms of the cell loss probability and the mean delay time in our proposal through analytic and simulation approaches.