An SCFL-compatible 40-Gbit/s selector circuit using resonant tunneling diodes (RTDs) and high-electron-mobility transistors (HEMTs) is presented. The circuit comprises two monostable-bistable transition elements (MOBILEs) using RTDs, a HEMT NOR circuit, and a HEMT output buffer based on source-coupled-FET logic (SCFL). The circuit is fabricated by monolithically integrating RTDs and 0.1-µm HEMTs on an InP substrate. The fabricated circuit exhibits clear eye-opening at 40 Gbit/s with an output swing of 800 mVp-p, which is close to the conventional high-speed logic IC interface called SCFL.

We present calculations of the linear-response conductance of a SiGe based single-electron transistor (SET). The conductance and the discrete charging of the quantum dot are calculated by free-energy minimization. The free-energy calculation takes the discrete level-spectrum as well as complex many-body interactions into account. The tunneling rates for tunneling through the source and lead barrier are calculated using Bardeen's transfer Hamiltonian formalism. The tunneling matrix elements are calculated for transitions between the zero-dimensional states in the quantum dot and the lowest subband in the one-dimensional constriction. We compare the results for the conductance peaks with those from calculations with a constant tunneling rate where the shape of the peaks is only due to energetic arguments.

In this paper we report on the modeling and simulation of tunneling current in MOS devices including quantum mechanical effects. The simulation model features an original scheme for the self-consistent solution of Poisson and Schrodinger equations and it is used for the extraction of the oxide thickness, by fitting CV curves, and the calculation of the tunneling current. Simulations and experiments are compared for different device types and oxide thicknesses (1.5-6.5 nm) showing good agreement and pointing out the importance of quantum mechanical modeling and the presence of many tunneling mechanisms in ultra-thin oxide MOS devices.

The gate oxide of sub-0.1 µm MOSFETs channel length is expected to be reduced beyond 3 nm in spite of an increasing direct tunneling gate current. As tunnel injection modeling into SiO2 is expected to depend on the electron transport model adopted for the device description, a critical comparison is made in this paper between gate currents obtained from simulators based on Drift-Diffusion, Energy-Balance, and Monte Carlo models. The studied device is a 0.07 µm channel length n-MOSFET with 1.5 nm thick gate oxide. It is shown that positive drain voltage is responsible for two opposite effects on DT leakage: a carrier heating and a potential barrier hardening along the channel. It is proved by a careful study of Monte Carlo microscopic quantities that, contrary to what holds for thicker gate oxide transistors, the balance is favorable to the potential barrier effect. Injection into SiO2 is then dominated by near-thermal carriers injected at the channel beginning. For this reason, the gate current decreases when increasing the drain bias, with the maximum leakage obtained for (Vgs=Vdd, Vds=0), and a correct agreement is obtained between the Drift-Diffusion, Energy-Balance, and Monte Carlo approaches of gate current calculation, in spite of very different physical descriptions of transport at the microscopic level.

We compare the numerical results for electron direct tunneling currents for single gate oxides, ON- and ONO-structures. We demonstrate that stacked dielectrics can keep the tunneling currents a few orders of magnitude lower than electrostatically equivalent single oxides. We also discuss the impact of gate material and of the modeling of electron transport in silicon.

Simulation of multi-band quantum transport based on a non-equilibrium Green's functions is presented in resonant tunneling diodes (RTD's), where realistic band structures and space charge effect are taken into account. To include realistic band structure, we have used a multi-band (MB) tight binding method with an sp3s* hybridization. As a result, we have found that the multiband nature significantly changes the results of conventional RTD simulations specifically for the case with indirect-gap barriers.

We examined the current-voltage (I-V) characteristic of metal/polyimide/rhodamine-dendorimer/polyimide/ metal junctions prepared by the Langmuir-Blodgett (LB) technique. At a temperature of 32.8 K, a step structure was observed in the I-V characteristic, whereas it was not observed for the junctions without rhodamine-dendorimer. The step structure was very similar to that seen in so-called Coulomb staircase. On the basis of the model of Coulomb blockade, the possibility of single electron tunneling via rhodamine-dendrimer (Rh-G2) molecule as a quantum dot was discussed.

The author's recent research topics of organic monolayer films have been reviewed. The importance of the study of organic monolayers is discussed from the viewpoints of future electronics and dielectric physics, keeping in mind the difference between monolayers and bulk materials.

This paper describes a load carrying test for a concrete pipe designed to study the effectiveness of distributed strain measurement using an optical fiber sensor. We performed a load carrying test on a concrete pipe and attempted to detect the distributed strain inside it using an optical fiber sensor mounted inside the pipe. We confirmed that it was possible to detect the strain in a concrete structure by using an optical fiber sensor after a crack had occurred on the concrete surface. This paper shows that measurement using the optical fiber sensor was effective despite great changes in the strain conditions of the measured object over a short distance.

Recent progress of high-temperature superconductor Josephson junction technology is reviewed in the light of the future application to digital circuits. Among various types of Josephson junctions so far developed, ramp-edge-type junctions with a barrier layer composed of oxide materials in the vicinity of metal-insulator transition seem to offer a unique opportunity to fulfill all the requirements for digital circuit applications by virtue of their small junction dimensions, overdamped properties and relatively high IcRn product values at the temperature of around 30-40 K. Recently developed interface engineered junctions can be classified as junctions of this type. These junctions also raise an interesting problem in physics concerning the possibility of resonant tunneling of Cooper pairs via localized states in the barrier. From the viewpoint of practical applications, the improvement of the spread of the junction parameters is still a serious challenge to the present fabrication technology. Although interface engineered junctions seem to be most promising in this regard at present, 1σ spread of around 8% in the present fabrication technology is far from satisfactory for the fabrication of large-scale integrated circuits. The detailed understanding of the barrier formation mechanism in the interface engineered junction is indispensable not only for advancing this particular fabrication technology but also for improving other junction technology utilizing ramp-edge structures.

We report on progress in the development of high current density NbN/AlN/NbN tunnel junctions for application as submillimeter wave SIS mixers. A ultra-high current density up to 120 kA/cm2, roughly two orders of magnitude larger than any reported results for all-NbN tunnel junctions, was achieved in the junctions. The magnetic field dependence and temperature dependence of critical supercurrents were measured to investigate the Josephson tunneling behaviour of critical supercurrents in the high-Jc junctions. We have developed a low-noise quasi-optical SIS mixer with the high-current density NbN/AlN/NbN junctions and two-junction tuning circuits which employ Al/SiO/NbN microstriplines. The tuning characteristics of the mixer were investigated by measuring the response in the direct detection mode by using the Fourier Transform Spectrometer (FTS) and measuring the response in the heterodyne detection mode with the standard Y-factor method at frequencies from 670 to 1082 GHz. An uncorrected double sideband receiver noise temperature of 457 K (12hν/kB) was obtained at 783 GHz.

We report on the fabrication and operation of all-NbN single flux quantum (SFQ) circuits with resistively shunted NbN/AlN/NbN tunnel junctions fabricated on silicon substrates. The critical current varied by about 5% in 400 NbN/AlN/NbN junction arrays, where the junction area was 88 µm2. Critical current densities of the NbN/AlN/NbN tunnel junctions showed exponential dependence on the deposition time of the AlN barrier. By using the 12-nm-thick Cu film as shunted resistors, non-hysteretic current-voltage characteristics were achieved. From dc-SQUID measurements, the sheet inductance of our NbN stripline was estimated to be around 1.2 pH at 4.2 K. We designed and fabricated circuits consisting of dc/SFQ converters, Josephson transmission lines, and T flip-flop-based SFQ/dc converters. The circuits demonstrated correct operation with a bias margin of more than 15% at 4.2 K.

A resonant-tunneling-diode (RTD) based sense amplifier circuit design has been proposed for the first time to envision a very high-speed and low-power memory system that also includes refresh-free, compact RTD-based memory cells. By combining RTDs with n-type transistors of conventional complementary metal oxide semiconductor (CMOS) devices, a new quantum MOS (Q-MOS) family of logic circuits, having very low power-delay product and good noise immunity, has recently been developed. This paper introduces the design and analysis of a new QMOS sense amplifier circuit, consisting of a pair of RTDs as pull-up loads in conjunction with n-type pull-down transistors. The proposed QMOS sensing circuit exhibits nearly 20% faster sensing time in comparison to the conventional design of a CMOS sense amplifier. The stability analysis done using phase-plot diagram reveals that the pair of back-to-back connected static QMOS inverters, which forms the core of the sense amplifier, has meta-stable and unstable states which are closely related to the I-V characteristics of the RTDs. The paper also analyzes in details the refresh-free memory cell design, known as tunneling static random access memory (TSRAM). The innovative cell design adds a stack of two RTDs to the conventional one-transistor dynamic RAM (DRAM) cell and thereby the cell can indefinitely hold its charge level without any further periodic refreshing. The analysis indicates that the TSRAM cell can achieve about two orders of magnitude lower stand-by power than a conventional DRAM cell. The paper demonstrates that RTD-based circuits hold high promises and are likely to be the key candidates for the future high-density, high-performance and low-power memory systems.

An ultra-fast optoelectronic decision circuit using resonant tunneling diodes (RTD's) and a uni-traveling-carrier photodiode (UTC-PD) is proposed. The circuit employs two cascaded RTD's for ultra-fast logic operation and one UTC-PD that offers a direct optical input interface. This novel configuration is suitable for ultra-fast decision operation. Two types of decision circuits are introduced: a positive-logic type and a negative-logic type. Operations of these circuits were simulated using SPICE with precisely investigated RTD and UTC-PD models. In terms of circuit speed, 40-Gbit/s decision and 80-Gbit/s demultiplexing were expected. Furthermore, the superiority of the negative-logic type in terms of the circuit operating margin and the relationship between input peak photocurrent and effective logic swing were clarified by SPICE simulations. In order to confirm the basic functions of the circuits and the accuracy of the simulations, circuits were fabricated by monolithically integrating InP-based RTD's and UTC-PD's. The circuits successfully exhibited 40-Gbit/s decision operation and 80-Gbit/s demultiplexing operation with less than 10-mW power dissipation. The superiority of the negative-logic type circuit for the circuit operation was confirmed, and the relationship between the input peak photocurrent and the effective logic swing was as predicted.

The current-voltage characteristics of a single electron transistor (SET) in the resonant transport mode are investigated. In the future when SET devices are applied to integrated electronics, the quantum effect will seriously modify their characteristics in ultra-small geometry. The current will be dominated by the resonant transport through narrow energy levels in the dot. The simple case of a two-level system is analyzed and the transport mechanism is clarified. The transport property at low temperatures (higher than the Kondo temperature) in the low tunneling rate limit is discussed, and a current map where current values are classified in the gate bias-drain bias plane is provided. It was shown that the dynamic aspect of electron flow seriously influences the current value.

A clock recovery circuit is a key component in optical communication systems. In this paper, an optoelectronic clock recovery circuit is reported that monolithically integrates a resonant tunneling diode (RTD) and a uni-traveling-carrier photodiode (UTC-PD). The circuit is an injection-locked-type RTD oscillator that uses the photo-current generated by the UTC-PD. Fundamental and sub-harmonic clock extraction is confirmed for the first time with good clock recovery circuit characteristics. The IC extracts an electrical 11.55-GHz clock signal from 11.55-Gbit/s RZ optical data streams with the wide locking range of 450 MHz and low power dissipation of 1.3 mW. Furthermore, the extraction of a sub-harmonic clock from 23.1-Gbit/s and 46.2-Gbit/s input data streams is also confirmed in the wider locking range of 600 MHz. The RMS jitter as determined from a single sideband phase noise measurement is extremely low at less than 200 fs in both cases of clock and sub-harmonic clock extraction. To our knowledge, the product of the output power and operating frequency of the circuit is the highest ever reported for injection-locked-type RTD oscillators. These characteristics indicate the feasibility of the optoelectronic clock recovery circuit for use in future ultra-high-speed fully monolithic receivers.

A clock recovery circuit is a key component in optical communication systems. In this paper, an optoelectronic clock recovery circuit is reported that monolithically integrates a resonant tunneling diode (RTD) and a uni-traveling-carrier photodiode (UTC-PD). The circuit is an injection-locked-type RTD oscillator that uses the photo-current generated by the UTC-PD. Fundamental and sub-harmonic clock extraction is confirmed for the first time with good clock recovery circuit characteristics. The IC extracts an electrical 11.55-GHz clock signal from 11.55-Gbit/s RZ optical data streams with the wide locking range of 450 MHz and low power dissipation of 1.3 mW. Furthermore, the extraction of a sub-harmonic clock from 23.1-Gbit/s and 46.2-Gbit/s input data streams is also confirmed in the wider locking range of 600 MHz. The RMS jitter as determined from a single sideband phase noise measurement is extremely low at less than 200 fs in both cases of clock and sub-harmonic clock extraction. To our knowledge, the product of the output power and operating frequency of the circuit is the highest ever reported for injection-locked-type RTD oscillators. These characteristics indicate the feasibility of the optoelectronic clock recovery circuit for use in future ultra-high-speed fully monolithic receivers.

A gate oxide excess current model is described based on the phonon-assisted tunneling process of electrons into neutral traps. The influence on local electric field of charge of electrons trapped by neutral traps in gate oxide is simulated using a two-dimensional device simulator into which the new model is incorporated. FN current is suppressed with an increase in the neutral trap density to over 1019 cm-3. The calculated results reflect the endurance characteristics of flash memories in which erase/write operation speed depends on FN current.

We study ultrafast operation of multiple-valued quantizers composed of resonant-tunneling diodes (RTDs) and high electron mobility transistors (HEMTs). The operation principle of these quantizers is based on the monostable-multistable transition logic (MML) of series-connected RTDs. The quantizers are fabricated by monolithically integrating InP-based RTDs and 0.7-µm-gate-length HEMTs with a cutoff frequency of 40 GHz. To perform high-frequency experiments, an output buffer and termination resistors are attached to the quantizers, and the quantizers are designed to accommodate high-frequency input signals. Our experiments show that both ternary and quaternary quantizers can operate at clock frequencies of 10 GHz and at input frequencies of 3 GHz. This demonstrates the potential of applying RTD-based multiple-valued quantizers to high-frequency circuits.

Radio waves propagating through tunnels are strongly attenuated in the presence of discontinuities such as bends and branches. The useful structural modifications are requested to get better circumstances for radio waves in tunnels. In this paper, we propose several modifications arranged in a conventional T-junction of two-dimensional tunnels and analyze the transmission characteristics of radio waves by using the finite volume time domain (FVTD) method.