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[Keyword] tunnel(159hit)

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  • A New Simple Method for Extracting the Capacitance Coupling Coefficients of Sub-0.5-µm Flash Memory Cells

    Keiichi HARAGUCHI  Hitoshi KUME  Masahiro USHIYAMA  Makoto OHKURA  

     
    PAPER

      Vol:
    E82-C No:4
      Page(s):
    602-606

    A new simple method for extracting the capacitance coupling coefficients of sub-0.5-µm flash memory cells is proposed. Different from the previously proposed methods, this method is not affected by a dopant profile of source region because a band-to-band tunneling current from the interface between the drain and the substrate is probed. Use of a reference device eliminates the necessity to make assumptions concerning the electron transport mechanism. Comparison with the other methods shows that the proposed method is simple and accurate.

  • Analysis of Structure Dependence of Very Short Channel Field Effect Transistor Using Vertical Tunneling with Heterostructures on Silicon

    Wataru SAITOH  Katsuyuki YAMAZAKI  Masafumi TSUTSUI  Masahiro ASADA  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E81-C No:12
      Page(s):
    1918-1925

    We have analyzed a very short channel tunneling field effect transistor which uses new heterostructures (CoSi2/Si/CdF2/CaF2) lattice-matched to the Si substrate. In device operation, the drain current from source (CoSi2) to drain (CoSi2) through tunnel barriers (Si) and the channel (CdF2) is controlled by a gate electric field applied to the barrier between the source and the channel through the gate insulator (CaF2). Theoretical analysis shows that this transistor has characteristics similar to those of conventional metal-oxide-semiconductor field effect transistors even with channel lengths as short as 5 nm. In addition, we have estimated the theoretical response time of this transistor and showed the possibility of subpicosecond response.

  • Ramp-Edge Josephson Junctions Using Barriers of Various Resistivities

    Masahiro HORIBE  Koh-ichi KAWAI  Akira FUJIMAKI  Hisao HAYAKAWA  

     
    INVITED PAPER-High-Tc Junction Technology

      Vol:
    E81-C No:10
      Page(s):
    1526-1531

    We have studied the effect of Ga and Ca substitution in the PrBa2Cu3Oδ (PBCO) barrier on the parameters of high-temperature-superconductor ramp-edge Josephson junctions. Pr 1-XCa XBa2Cu3Oδ (X=0. 15, 0. 3) had reduced bulk barrier resistivity as small as 10 mΩcm which was close to the metal-insulator transition. Also, PrBa2Cu 3-ZGa ZOδ, written as GaZ-doped PBCO (Z=0. 15, 0. 3, 0. 6), had enhanced resistivity neater than 1 kΩcm at 4. 2 K. The transport mechanisms in these bulk barriers fitted well with the Mott variable hopping model. The critical current density Jc and normalized junction conductance (R nA)-1 decayed exponentially with almost the same decay length, as the barrier thickness increased. The decay length depended on the barrier material, and ranged from 1. 7 nm to 6. 5 nm for Jc, from 1. 9 nm to 7. 2 nm for (Rn A)-1. Because on these experimental results, we conclude that direct tunneling is the dominant transport mechanism for both quasi particles and paired particles in our junctions, while resonant tunneling should be considered as an additional transport mechanism of these two kinds of particles in the junctions with the PBCO-based barriers reported so far. It was also found that Ga doping raised the characteristic voltage Vc while Ca doping reduced it, though the Vc values obtained here were still small compared to the theoretically predicted values. The spacewise metal insulator transition at the interfaces caused by a high density of localized states in the barriers seemed to be responsible for the reduction in Vc. The best Vc value was 0. 32 mV at 77 K and 5. 2 mV at 4. 2 K using a Ga0. 6-PBCO barrier. These Vc values are suitable for electronics applications. Furthermore, superconducting-gap-like structures were observed in the junctions with highly resistive Ga-doped PBCO barriers.

  • Recent Progress in Organic Film Devices for Optics and Electronics

    Keiichi KANETO  Kazuhiro KUDO  Yutaka OHMORI  Mitsuyoshi ONODA  Mitsumasa IWAMOTO  

     
    REVIEW PAPER

      Vol:
    E81-C No:7
      Page(s):
    1009-1019

    Recent technologies of organic film devices are reviewed. New technologies of fabrication and characterization of organic thin films, electro-mechanical conversion materials, and applications for electrical and optical devices are discussed. In this review paper, especially organic light emitting diodes, tunneling junctions using polyimide Langmuir-Blodgett films, tunneling spectroscopy and high-density recording, plastic actuators using conducting polymers, molecular self-assembly process for fabricating organic thin film devices are reviewed.

  • A Simple Digital-to-Analog Conversion Technique Using Single-Electron Transistor

    Su Jin AHN  Dae Mann KIM  

     
    LETTER-Quantum Electronics

      Vol:
    E81-C No:4
      Page(s):
    608-611

    A simple circuit structure implementing digital-to-analog data conversion function is presented. The proposed digital-to-analog converter utilizes the inherent characters of single-electron tunneling which consist of the periodic voltage oscillation and the ability of counting the number of trapped charges. It produces an analog output voltage for a given digital input. We proposed the device structure performing the weighted summation of inputs, which is converted into an analog voltage by the proposed sensing circuit. Monte Carlo simulation results give us the clear performance of the 3-bit digital-to-analog conversion function and the effect of temperature, capacitance variations, and background charge fluctuations. Moreover, we examined the possibility of extending a N-bit digital-to-analog converter with the proposed scheme.

  • Gate Performance in Resonant Tunneling Single Electron Transistor

    Takashi HONDA  Seigo TARUCHA  David Guy AUSTING  

     
    PAPER

      Vol:
    E81-C No:1
      Page(s):
    2-7

    Gate performance for observing Coulomb oscillations and Coulomb diamonds are compared for two types of gated sub-µm double-barrier heterostructures. The first type of device contains modulation-doped barriers, whereas the second type of device contains a narrower band gap material for the well and no barriers with doped impurities. Both the Coulomb oscillations and Coulomb diamonds are modified irregularly as a function of gate voltage in the first type of device, while in the second type of device they are only systematically modified, reflecting atom-like properties of a quantum dot. This difference is explained in terms of the existence of impurities in the first type of device, which inhomogeneously deform the rotational symmetry of the lateral confining potential as the gate voltage is varied. The absence of impurities is the reason why we observe the atom-like properties only in the second type of device.

  • Single-Electron Circuit Simulation

    Shuhei AMAKAWA  Hideaki MAJIMA  Hironobu FUKUI  Minoru FUJISHIMA  Koichiro HOH  

     
    PAPER

      Vol:
    E81-C No:1
      Page(s):
    21-29

    Various techniques of single-electron circuit simulation are presented. The subjects include visualization of state probabilities, accurate yet reasonably fast steady-state analysis and SPICE-based high-speed simulation for circuits composed of Single-Electron Transistors (SETs). The visualized state probabilities allow one to grasp the dynamics of a single-electron circuit intuitively. The new algorithm for steady-state analysis uses the master equation and Monte Carlo method in combination. We suppose this is the best way to perform steady-state analysis. The SPICE-based simulator significantly outperforms the conventional reference simulator in speed. It is, to the best of our knowledge, the only simulator that can simulate SET circuits for real applications. It also facilitates the study of the integration of SETs and MOSFETs.

  • A Stochastic Associative Memory Using Single-Electron Tunneling Devices

    Makoto SAEN  Takashi MORIE  Makoto NAGATA  Atsushi IWATA  

     
    PAPER

      Vol:
    E81-C No:1
      Page(s):
    30-35

    This paper proposes a new associative memory architecture using stochastic behavior in single electron tunneling (SET) devices. This memory stochastically extracts the pattern most similar to the input key pattern from the stored patterns in two matching modes: the voltage-domain matching mode and the time-domain one. In the former matching mode, ordinary associative memory operation can be performed. In the latter matching mode, a purely stochastic search can be performed. Even in this case, by repeating numerous searching trials, the order of similarity can be obtained. We propose a circuit using SET devices based on this architecture and demonstrate its basic operation with a simulation. By feeding the output pattern back to the input, this memory retrieves slightly dissimilar patterns consecutively. This function may be the key to developing highly intelligent information processing systems close to the human brain.

  • Aiming for SIS Mixers Using Ba1-xKxBiO3 Bicrystal Junctions

    Tetsuya TAKAMI  Ken'ichi KURODA  Yukihiko WADA  Morishige HIEDA  Yasuo TAMAI  Tatsuo OZEKI  

     
    INVITED PAPER

      Vol:
    E80-C No:10
      Page(s):
    1265-1268

    A 90 GHz band planar-type superconducting mixer using Ba1-xKxBiO3 (BKBO) bicrystal junctions was fabricated on a MgO bicrystal substrate. The mixer is integrated with microwave circuits and two junctions, but we could not operate the mixer in image rejection mode because of process damage to the junction properties. However we confirmed the mixing operation; the intermediate frequency (IF) signal was observed up to 17K (LO87 GHz, RF92 GHz).

  • Surface Tunnel Transistors with Multiple Interband Tunnel Junctions

    Toshio BABA  Tetsuya UEMURA  

     
    PAPER-Quantum Devices

      Vol:
    E80-C No:7
      Page(s):
    875-880

    New functional surface tunnel transistors (STTs) with multiple interband-tunnel-junctions in a symmetric source-to-drain structure are proposed to reduce the number of fabrication steps and to increase functionality. These devices have p+/n+ interband tunnel junctions in series between a p+ source and a p+ drain through n+ channels. We successfully fabricated GaAs-based multiple-junction STTs (MJ-STTs) using molecular-beam epitaxy regrowth. This fabrication method eliminates the need for two of the photo-masks in the conventional process for asymmetric planar STTs. In the preliminary experiments using multiple-junction p+/n+ diodes, we found that the peak-voltage increment in negative-differential-resistance (NDR) characteristics due to the reverse-biased tunnel junction in negligible, while the first-peak voltage is roughly proportional to the number of forward-biased tunnel junctions. Moreover, the number of NDR characteristics are completely determined by the number of tunnel junctions. The fabricated STTs with multiple junctions, up to eight junctions, exhibited clear transistor operation with multiple NDR characteristics, which were symmetric with the drain bias. These results indicate that any number of gate-controlled NDR characteristics can be realized in MJ-STTs by using an appropriate number of tunnel junctions in series. In addition, as an example of a functional circuit using MJ-STTs, we implemented a tri-stable circuit with a four-junction STT and a load resistor connected in series. The tri-stable operation was confirmed by applying a combination of a reset pulse and a set pulse for each stable point.

  • Theoretical Estimation of the Pick-Up Characteristics of the Fiber Probe Illuminated by Evanescent Field

    Yoshinari ISHIDO  

     
    LETTER-Electromagnetic Theory

      Vol:
    E80-C No:1
      Page(s):
    184-189

    In this letter, a theoretical estimation of pick-up characteristics of the fiber probe of Photon Scanning Tunneling Microscopy based on the Wiener-Hopf technique taken account of the weakly guiding approximation are reported. As a result, it is found that diffracted waves by the extremity of the fiber probe mainly act on the mode excitation rather than transmitted waves, then the pick-up characteristics are well accordance with typical experiments quality and quantity.

  • Proposal and Analysis of a Three-Terminal Photon-Assisted Tunneling Device Operating in the Terahertz Frequency Range

    Masahiro ASADA  

     
    PAPER

      Vol:
    E79-C No:11
      Page(s):
    1537-1542

    A three-terminal quantum device utilizing photon-assisted tunneling in a multilayer structure is proposed and analyzed in terms of its high frequency amplification characteristics. The operation principle of this device includes photonassisted tunneling at the input, formation of a propagating charge wave due to the beat of tunneling electrons and its acceleration, and radiation of electromagnetic waves at the output. Analysis of these operations, discussion of similarities and dissimilarities to classical klystrons, and estimation of the power gain and its frequency dependence are given. A simple example demonstrates that amplification up to the terahertz frequency range is possible using this device.

  • Effects of Simulated Annealing in the Resonant-Tunneling Resistive-Fuse Network for Early Vision

    Koichi MAEZAWA  

     
    PAPER

      Vol:
    E79-C No:11
      Page(s):
    1543-1549

    The resistive-fuse network for early vision was studied using circuit simulation to clarify the potential of implementation with resonant tunneling diodes (RTDs). To over-come the fundamental problem of the RTD network, i.e., the RTDs cannot perform simulated annealing (SA), pseudo SAs were proposed. These methods are based on the time-variation of the input signal strength, and are found to be effective in restoring images. A resistive-fuse network is shown to be one of the most promising applications of RTDs.

  • Coulomb Blockade Effects in Edge Quantum Wire SOI-MOSFETs

    Akiko OHATA  Akira TORIUMI  

     
    PAPER

      Vol:
    E79-C No:11
      Page(s):
    1586-1589

    The edge of a thin SOI (silicon on insulator) film was used to form a very narrow Si-MOS inversion layer. The ultra-thin SOI film was formed by local oxidation of SIMOX wafer. The thickness of the SOI film is less than 15 nm, i.e., the channel width is narrower than 15 nm. At low tempera-tures, clear and large conductance oscillations were seen in this edge channel MOSFET. These oscillations are explained by Coulomb blockade effects in the narrow channel with several effective potential barriers, since the SOI film is so thin that the channel current is seriously affected by small potential fluctuations in the channel. These results suggest that the channel current in edge quantum wire MOSFET can be cut off even with a small controlled potential change. Furthermore, we fabricated a double-gate edge channel Si-MOSFET. In this device, the channel current can be controlled in two ways. One way is to control the electron number inside the isolated electrodes. The other way is to control the threshold voltage of MOSFET. This device enables us to control the phase of Coulomb oscillation.

  • Operation Speed Consideration of Resonant Tunneling Logic Gate Based on Circuit Simulation

    Yutaka OHNO  Shigeru KISHIMOTO  Takashi MIZUTANI  Koichi MAEZAWA  

     
    PAPER

      Vol:
    E79-C No:11
      Page(s):
    1530-1536

    We analyzed the operation speed of the resonant tunneling logic gate, MOBILE, using a simple equivalent circuit model and varying parameters of I-V characteristics and capacitance of RTTs(resonant tunneling transistors). The switching time for large peak-to-valley(P/V)current ratios is smaller at small Vbmax(maximum bias voltage), but larger at large Vbmax than that for small P/V ratios in the case of present I-V characteristics with flat valley current. It is also demonstrated that the MOBILE operation fails if the bias voltage rises too fast, when the capacitance of the load and the driver is different due to the displacement current through the capacitance. These behaviors can be explained by considering the potential diagrams of the circuit.

  • Si Single-Electron Transistors on SIMOX Substrates

    Yasuo TAKAHASHI  Akira FUJIWARA  Masao NAGASE  Hideo NAMATSU  Kenji KURIHARA  Kazumi IWADATE  Katsumi MURASE  

     
    INVITED PAPER

      Vol:
    E79-C No:11
      Page(s):
    1503-1508

    A Si single electron transistor (SET) was fabricated by converting a one-dimensional Si wire on a SIMOX substrate into a small Si island with a tunneling barrier at each end by means of pattern-dependent oxidation. Since the size of the Si island was as small as around 10 nm owing to this novel technique, the total capacitance of the SET was reduced to a value on the order of 1 aF, which guarantees the conductance oscillation of the SET even at room temperature. Furthermore, a linear relation between the designed wire length and the gate capacitance of SETs was obtained, which clearly indicates that the single island was actually formed in the middle of the one dimensional Si wire. These results were achieved owing to the highly reproducible fabrication process based on pattern dependent oxidation of SIMOX-Si layers. In addition, the fluctuation of the electrical characteristics of the SETs Was studied in relation to the wire size fluctuations. It was found that the fluctuatian is caused predominantly by the roughness of the sidewall surface of the resist pattern.

  • Current-Voltage Characteristics of Triple-Barrier Resonant Tunneling Diodes Including Coherent and Incoherent Tunneling Processes

    Riichiro TAKEMURA  Michihiko SUHARA  Yasuyuki MIYAMOTO  Kazuhito FURUYA  Yuji NAKAMURA  

     
    PAPER

      Vol:
    E79-C No:11
      Page(s):
    1525-1529

    Current-voltage characteristics of triple-barrier resonant tunneling diodes are theoretically analyzed taking phase breaking into account. The peak current in predicted using conventional theories is much smaller, typically by a factor of 1/3000 for a coherent length of 100 nm, than that measured because the incoherent tunneling process is neglected. We take both the coherent and the incoherent tunneling processes into account in the analysis and show that the product of the peak current and the voltage width at half maximum of the peak current is almost constant even when the phase coherent length varies between 50 and 1000 nm. The peak current density increases by two orders of magnitude in the model developed here.

  • Josephson Array Oscillators Using Resonant Effects in Shunted Tunnel Junctions

    Akira KAWAKAMI  Zhen WANG  

     
    PAPER-Analog applications

      Vol:
    E79-C No:9
      Page(s):
    1242-1246

    Resonant properties of resistance shunted tunnel junctions have been investigated using the RLCSJ model. We found that an increase in dc current resulted from an increase in impedance of the shunted tunnel junctions. The static and dynamic properties of the shunted tunnel junctions were described in detail by numerical simulations and experiments. The simulated and measured results showed good agreement in I-V characteristics. A Josephson array oscillator has been proposed using the resonant properties for increasing oscillator output impedance. We designed and fabricated the oscillator with 20 shunted tunnel junctions. The output power of the oscillator delivered to the load resistor was estimated to be about 0.5µW at 312 GHz.

  • Tunnel Oxynitride Film Formation for Highly Reliable Flash Memory

    Tomiyuki ARAKAWA  Ryoichi MATSUMOTO  Takahisa HAYASHI  

     
    PAPER-Nonvolatile memories

      Vol:
    E79-C No:6
      Page(s):
    819-824

    A tunnel film(9 nm thick) formed by a rapid thermal oxidation in dry oxygen-rapid thermal nitridation in NH3-rapid thermal oxynitridation in N2O (ONN) sequence is applied to a stacked-gate flash memory cell, in which writing and erasing are carried out by Fowler-Nordheim tunneling at a drain and at a channel, respectively. The writing, erasing, endurance, disturbance and retention characteristics of the memory cells with ONN tunnel films are, for the first time, compared to those of the memory cells with conventional tunnel films such as dry oxide, N2O-oxynitride and reoxidized nitrided oxide tunnel films. No significant difference of the writing and erasing characteristics was observed among the memory cells with the various tunnel films. However, the amount of Vth window narrowing in the endurance characteristics of the memory cells with ONN (-12.9%) and reoxidized nitrided oxide(-11.4%) tunnel films were much smaller than those of the memory cells with RTO(-34.0%) and NO (-38.2%) after 106 write/erase cycles. Furthermore, the decrease in Vth in the drain disturbance characteristics of the memory cells with ONN tunnel films (21.2%) after weak electron-ejecting stress of 105 cycles was smaller than those of the memory cells with the other films(51.4-64.4%). The retention characteristics of the memory cells with ONN tunnel films under the thermal stress of 200, 5.9105 sec were superior(ΔVth=-2.1%) to those of the memory cells with the other films(ΔVth=-5.4 - -8.2%). The reasons of these findings are because ONN films exhibit smaller number of charge traps and interface states induced by write/erase cycle stress, and suppress leakage curent stimulated by the weak electron-ejecting bias and the thermal stress, compared to the dry oxide, the N2O-oxynitride and the reoxidized nitrided oxide. ONN films are found to be suitable for use as tunnel films of fiash memory cells.

  • Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme

    Katsutaka KIMURA  Toshihiro TANAKA  Masataka KATO  Tetsuo ADACHI  Keisuke OGURA  Hitoshi KUME  

     
    PAPER

      Vol:
    E78-C No:7
      Page(s):
    832-837

    Programming and program-verification methods for low-voltage flash memories using the Fowler-Nordheim tunneling mechanism for both programming and erasure are described. In these memories, a great many memory cells on a selected word line, such as 512-bytes worth of cells, are programmed at the same time for high-speed programming. The bit-by-bit programming/verification method can precisely control threshold-voltage deviation of programmed memory cells on the selected word line for low voltage operation. By using an internal program-end detection circuit, the completion of program mode can be checked for in one clock cycle, without reading out 512-bytes of data from the memory chip to the external controller. Moreover, the variable pulse-width programming method reduces the total number of verifications.

121-140hit(159hit)