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81-100hit(5768hit)

  • Single UAV-Based Wave Source Localization in NLOS Environments Open Access

    Shinichi MURATA  Takahiro MATSUDA  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2023/08/01
      Vol:
    E106-B No:12
      Page(s):
    1491-1500

    To localize an unknown wave source in non-line-of-sight environments, a wave source localization scheme using multiple unmanned-aerial-vehicles (UAVs) is proposed. In this scheme, each UAV estimates the direction-of-arrivals (DoAs) of received signals and the wave source is localized from the estimated DoAs by means of maximum likelihood estimation. In this study, by extending the concept of this scheme, we propose a novel wave source localization scheme using a single UAV. In the proposed scheme, the UAV moves on the path comprising multiple measurement points and the wave source is sequentially localized from DoA distributions estimated at these measurement points. At each measurement point, with a moving path planning algorithm, the UAV determines the next measurement point from the estimated DoA distributions and measurement points that the UAV has already visited. We consider two moving path planning algorithms, and validate the proposed scheme through simulation experiments.

  • Optimization Algorithm with Automatic Adjustment of the Number of Switches in the Order/Radix Problem

    Masaki TSUKAMOTO  Yoshiko HANADA  Masahiro NAKAO  Keiji YAMAMOTO  

     
    PAPER

      Pubricized:
    2023/06/12
      Vol:
    E106-D No:12
      Page(s):
    1979-1987

    The Order/Radix Problem (ORP) is an optimization problem that can be solved to find an optimal network topology in distributed memory systems. It is important to find the optimum number of switches in the ORP. In the case of a regular graph, a good estimation of the preferred number of switches has been proposed, and it has been shown that simulated annealing (SA) finds a good solution given a fixed number of switches. However, generally the optimal graph does not necessarily satisfy the regular condition, which greatly increases the computational costs required to find a good solution with a suitable number of switches for each case. This study improved the new method based on SA to find a suitable number of switches. By introducing neighborhood searches in which the number of switches is increased or decreased, our method can optimize a graph by changing the number of switches adaptively during the search. In numerical experiments, we verified that our method shows a good approximation for the best setting for the number of switches, and can simultaneously generate a graph with a small host-to-host average shortest path length, using instances presented by Graph Golf, an international ORP competition.

  • FPGA-based Garbling Accelerator with Parallel Pipeline Processing

    Rin OISHI  Junichiro KADOMOTO  Hidetsugu IRIE  Shuichi SAKAI  

     
    PAPER

      Pubricized:
    2023/08/02
      Vol:
    E106-D No:12
      Page(s):
    1988-1996

    As more and more programs handle personal information, the demand for secure handling of data is increasing. The protocol that satisfies this demand is called Secure function evaluation (SFE) and has attracted much attention from a privacy protection perspective. In two-party SFE, two mutually untrustworthy parties compute an arbitrary function on their respective secret inputs without disclosing any information other than the output of the function. For example, it is possible to execute a program while protecting private information, such as genomic information. The garbled circuit (GC) — a method of program obfuscation in which the program is divided into gates and the output is calculated using a symmetric key cipher for each gate — is an efficient method for this purpose. However, GC is computationally expensive and has a significant overhead even with an accelerator. We focus on hardware acceleration because of the nature of GC, which is limited to certain types of calculations, such as encryption and XOR. In this paper, we propose an architecture that accelerates garbling by running multiple garbling engines simultaneously based on the latest FPGA-based GC accelerator. In this architecture, managers are introduced to perform multiple rows of pipeline processing simultaneously. We also propose an optimized implementation of RAM for this FPGA accelerator. As a result, it achieves an average performance improvement of 26% in garbling the same set of programs, compared to the state-of-the-art (SOTA) garbling accelerator.

  • Energy-Efficient One-to-One and Many-to-One Concurrent Transmission for Wireless Sensor Networks

    SenSong HE  Ying QIU  

     
    LETTER-Information Network

      Pubricized:
    2023/09/19
      Vol:
    E106-D No:12
      Page(s):
    2107-2111

    Recent studies have shown that concurrent transmission with precise time synchronization enables reliable and efficient flooding for wireless networks. However, most of them require all nodes in the network to forward packets a fixed number of times to reach the destination, which leads to unnecessary energy consumption in both one-to-one and many-to-one communication scenarios. In this letter, we propose G1M address this issue by reducing redundant packet forwarding in concurrent transmissions. The evaluation of G1M shows that compared with LWB, the average energy consumption of one-to-one and many-to-one transmission is reduced by 37.89% and 25%, respectively.

  • A SAT Approach to the Initial Mapping Problem in SWAP Gate Insertion for Commuting Gates

    Atsushi MATSUO  Shigeru YAMASHITA  Daniel J. EGGER  

     
    PAPER-Algorithms and Data Structures

      Pubricized:
    2023/05/17
      Vol:
    E106-A No:11
      Page(s):
    1424-1431

    Most quantum circuits require SWAP gate insertion to run on quantum hardware with limited qubit connectivity. A promising SWAP gate insertion method for blocks of commuting two-qubit gates is a predetermined swap strategy which applies layers of SWAP gates simultaneously executable on the coupling map. A good initial mapping for the swap strategy reduces the number of required swap gates. However, even when a circuit consists of commuting gates, e.g., as in the Quantum Approximate Optimization Algorithm (QAOA) or trotterized simulations of Ising Hamiltonians, finding a good initial mapping is a hard problem. We present a SAT-based approach to find good initial mappings for circuits with commuting gates transpiled to the hardware with swap strategies. Our method achieves a 65% reduction in gate count for random three-regular graphs with 500 nodes. In addition, we present a heuristic approach that combines the SAT formulation with a clustering algorithm to reduce large problems to a manageable size. This approach reduces the number of swap layers by 25% compared to both a trivial and random initial mapping for a random three-regular graph with 1000 nodes. Good initial mappings will therefore enable the study of quantum algorithms, such as QAOA and Ising Hamiltonian simulation applied to sparse problems, on noisy quantum hardware with several hundreds of qubits.

  • Numerical Derivation of Design Guidelines for Tightness and Shaking Amplitude of Vibrating Intrinsic Reverberation Chamber by Method of Moment

    Makoto HARA  Jianqing WANG  Frank LEFERINK  

     
    PAPER-Electromagnetic Compatibility(EMC)

      Pubricized:
    2023/06/02
      Vol:
    E106-B No:11
      Page(s):
    1173-1181

    Vibrating intrinsic reverberation chamber is being used as an in-situ EMC test equipment for large and complex systems such as automobiles and aircrafts. In this paper, the stirring conditions, such as tightness and shaking amplitude of the walls, of a vibrating intrinsic reverberation chamber have been analyzed using the method of moments. From the viewpoint of quantitative evaluation of the flexible moving walls configuration, it was found that the random electromagnetic environment can be generated under the stirring conditions of loose configuration and a shaking amplitude more than one eighth of the wavelength at the test frequency above the lowest usable frequency.

  • Overloaded MIMO Bi-Directional Communication with Physical Layer Network Coding in Heterogeneous Multihop Networks Open Access

    Satoshi DENNO  Tomoya TANIKAWA  Yafei HOU  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2023/07/24
      Vol:
    E106-B No:11
      Page(s):
    1228-1236

    This paper proposes overloaded multiple input multiple output (MIMO) bi-directional communication with physical layer network coding (PLNC) to enhance the transmission speed in heterogeneous wireless multihop networks where the number of antennas on the relay is less than that on the terminals. The proposed overloaded MIMO communication system applies precoding and relay filtering to reduce computational complexity in spite of the transmission speed. An eigenvector-based filter is proposed for the relay filter. Furthermore, we propose a technique to select the best filter among candidates eigenvector-based filters. The performance of the proposed overloaded MIMO bi-directional communication is evaluated by computer simulation in a heterogeneous wireless 2-hop network. The proposed filter selection technique attains a gain of about 1.5dB at the BER of 10-5 in a 2-hop network where 2 antennas and 4 antennas are placed on the relay and the terminal, respectively. This paper shows that 6 stream spatial multiplexing is made possible in the system with 2 antennas on the relay.

  • A Compact Fully-Differential Distributed Amplifier with Coupled Inductors in 0.18-µm CMOS Technology

    Keisuke KAWAHARA  Yohtaro UMEDA  Kyoya TAKANO  Shinsuke HARA  

     
    PAPER

      Pubricized:
    2023/04/19
      Vol:
    E106-C No:11
      Page(s):
    669-676

    This paper presents a compact fully-differential distributed amplifier using a coupled inductor. Differential distributed amplifiers are widely required in optical communication systems. Most of the distributed amplifiers reported in the past are single-ended or pseudo-differential topologies. In addition, the differential distributed amplifiers require many inductors, which increases the silicon cost. In this study, we use differentially coupled inductors to reduce the chip area to less than half and eliminate the difficulties in layout design. The challenge in using coupled inductors is the capacitive parasitic coupling that degrades the flatness of frequency response. To address this challenge, the odd-mode image parameters of a differential artificial transmission line are derived using a simple loss-less model. Based on the analytical results, we optimize the dimensions of the inductor with the gradient descent algorithm to achieve accurate impedance matching and phase matching. The amplifier was fabricated in 0.18-µm CMOS technology. The core area of the amplifier is 0.27 mm2, which is 57% smaller than the previous work. Besides, we demonstrated a small group delay variation of ±2.7 ps thanks to the optimization. the amplifier successfully performed 30-Gbps NRZ and PAM4 transmissions with superior jitter performance. The proposed technique will promote the high-density integration of differential traveling wave devices.

  • Class-E Synchronous RF Rectifier: Circuit Formulation, Geodesic Trajectory, Time-Domain Simulation, and Prototype Experiment

    Ryoya HONDA  Minoru MIZUTANI  Masaya TAMURA  Takashi OHIRA  

     
    PAPER

      Pubricized:
    2023/05/10
      Vol:
    E106-C No:11
      Page(s):
    698-706

    This paper formulates a class-E synchronous RF rectifier from a new viewpoint. The key point is to introduce a matrix and convolute the DC terms into RF matrices. The explicit expression of input impedance is demonstrated in plane geometry. We find out their input impedance exhibits a geodesic arc in hyperbolic geometry under ZVS operation, where the theoretical RF-DC conversion efficiency results in 100%. We verify the developed theory both numerically (circuit simulation) and experimentally (6.78MHz, 100W). We confirm that the input impedance becomes a geodesic arc for a wide range of DC load resistance. The presented theory is quite elegant since it is based on a matrix-based formulation and plane-geometrical expression.

  • A Low-Phase-Noise RF Up/Down-Converter for Cost-Effective 5G Millimeter-Wave Test Solutions

    Jaeyong KO  Namkyoung KIM  Kyungho YOO  Tongho CHUNG  

     
    BRIEF PAPER

      Pubricized:
    2023/04/19
      Vol:
    E106-C No:11
      Page(s):
    713-717

    The increasing demand for millimeter-wave (mmWave) frequencies with wider signal bandwidths, such as 5G NR, requires large investments on test equipment. This work presents a 5G mmWave up/down-converter with a 40 GHz LO, fabricated in custom PCBs with off-the-shelf components. The mmWave converter has broad IF and RF bandwidths of 1∼5 GHz and 21∼45 GHz, and the built-in LO generates 20∼29.5 GHz and 33.5∼40 GHz of output. To achieve high linearity of the converter simultaneously, the LO must produce low-phase-noise and be capable of high harmonics/spur rejection, and design techniques related to these features are demonstrated. Additionally, a reconfigurable IF amplifier for bi-directional conversion is included and demonstrates low gain variation to maintain the linearity of the wideband modulation signals. The final designed converter is tested with 5G OFDM 64-QAM 100 MHz 1-CC (4-CC) signals and shows RF/IF output power of -3/8 dBm with a linear range of 35 (30)/38 (33) dB at an EVM of 25 dB.

  • 300-GHz-Band Diplexer for Frequency-Division Multiplexed Wireless Communication

    Yuma KAWAMOTO  Toki YOSHIOKA  Norihiko SHIBATA  Daniel HEADLAND  Masayuki FUJITA  Ryo KOMA  Ryo IGARASHI  Kazutaka HARA  Jun-ichi KANI  Tadao NAGATSUMA  

     
    BRIEF PAPER

      Pubricized:
    2023/04/19
      Vol:
    E106-C No:11
      Page(s):
    722-726

    We propose a novel silicon diplexer integrated with filters for frequency-division multiplexing in the 300-GHz band. The diplexer consists of a directional coupler formed of unclad silicon wires, a photonic bandgap-based low-pass filter, and a high-pass filter based on frequency-dependent bending loss. These integrated filters are capable of suppressing crosstalk and providing >15dB isolation over 40GHz, which is highly beneficial for terahertz-range wireless communications applications. We have used this diplexer in a simultaneous error-free wireless transmission of 300-GHz and 335-GHz channels at the aggregate data rate of 36Gbit/s.

  • Hybrid Electromagnetic Simulation Using 2D-FDTD and Ray-Tracing Methods for Airport Surfaces

    Ryosuke SUGA  Megumi WATANABE  Atsushi KEZUKA  

     
    PAPER-Electromagnetic Theory

      Pubricized:
    2023/06/05
      Vol:
    E106-C No:11
      Page(s):
    774-779

    In this paper, a hybrid electromagnetic simulation method of two-dimensional FDTD and ray-tracing methods suitable for an airport surface was proposed. The power variation due to ground reflection, refraction and creeping is calculated by two-dimensional FDTD method and ray-tracing method is used to calculate the reflecting and diffracted powers from buildings. The proposed approach was validated by measurement using a 1/50 scale-model of an airport model with a building model in various positions at 5 GHz. The proposed method allowed measured power distributions to correlate with simulated figures to within 4.8 dB and their null positions were also estimated to an error tolerance of within 0.01 m.

  • Enhancing VQE Convergence for Optimization Problems with Problem-Specific Parameterized Quantum Circuits

    Atsushi MATSUO  Yudai SUZUKI  Ikko HAMAMURA  Shigeru YAMASHITA  

     
    PAPER-Fundamentals of Information Systems

      Pubricized:
    2023/08/17
      Vol:
    E106-D No:11
      Page(s):
    1772-1782

    The Variational Quantum Eigensolver (VQE) algorithm is gaining interest for its potential use in near-term quantum devices. In the VQE algorithm, parameterized quantum circuits (PQCs) are employed to prepare quantum states, which are then utilized to compute the expectation value of a given Hamiltonian. Designing efficient PQCs is crucial for improving convergence speed. In this study, we introduce problem-specific PQCs tailored for optimization problems by dynamically generating PQCs that incorporate problem constraints. This approach reduces a search space by focusing on unitary transformations that benefit the VQE algorithm, and accelerate convergence. Our experimental results demonstrate that the convergence speed of our proposed PQCs outperforms state-of-the-art PQCs, highlighting the potential of problem-specific PQCs in optimization problems.

  • Gaussian Mixture Bandpass Filter Design for Narrow Passband Width by Using a FIR Recursive Filter

    Yukihiko YAMASHITA  

     
    PAPER-Digital Signal Processing

      Pubricized:
    2023/04/11
      Vol:
    E106-A No:10
      Page(s):
    1277-1285

    Bandpass filters (BPFs) are very important to extract target signals and eliminate noise from the received signals. A BPF of which frequency characteristics is a sum of Gaussian functions is called the Gaussian mixture BPF (GMBPF). In this research, we propose to implement the GMBPF approximately by the sum of several frequency components of the sliding Fourier transform (SFT) or the attenuated SFT (ASFT). Because a component of the SFT/ASFT can be approximately realized using the finite impulse response (FIR) recursive filters, its calculation complexity does not depend on the length of the impulse response. The property makes GMBPF ideal for narrow bandpass filtering applications. We conducted experiments to demonstrate the advantages of the proposed GMBPF over FIR filters designed by a MATLAB function with regard to the computational complexity.

  • Recursive Probability Mass Function Method to Calculate Probability Distributions of Pulse-Shaped Signals

    Tomoya FUKAMI  Hirobumi SAITO  Akira HIROSE  

     
    PAPER-Digital Signal Processing

      Pubricized:
    2023/03/27
      Vol:
    E106-A No:10
      Page(s):
    1286-1296

    This paper proposes an accurate and efficient method to calculate probability distributions of pulse-shaped complex signals. We show that the distribution over the in-phase and quadrature-phase (I/Q) complex plane is obtained by a recursive probability mass function of the accumulator for a pulse-shaping filter. In contrast to existing analytical methods, the proposed method provides complex-plane distributions in addition to instantaneous power distributions. Since digital signal processing generally deals with complex amplitude rather than power, the complex-plane distributions are more useful when considering digital signal processing. In addition, our approach is free from the derivation of signal-dependent functions. This fact results in its easy application to arbitrary constellations and pulse-shaping filters like Monte Carlo simulations. Since the proposed method works without numerical integrals and calculations of transcendental functions, the accuracy degradation caused by floating-point arithmetic is inherently reduced. Even though our method is faster than Monte Carlo simulations, the obtained distributions are more accurate. These features of the proposed method realize a novel framework for evaluating the characteristics of pulse-shaped signals, leading to new modulation, predistortion and peak-to-average power ratio (PAPR) reduction schemes.

  • Theoretical Analysis of Fully Wireless-Power-Transfer Node Networks Open Access

    Hiroshi SAITO  

     
    PAPER-Fundamental Theories for Communications

      Pubricized:
    2023/05/10
      Vol:
    E106-B No:10
      Page(s):
    864-872

    The performance of a fully wireless-power-transfer (WPT) node network, in which each node transfers (and receives) energy through a wireless channel when it has sufficient (and insufficient) energy in its battery, was theoretically analyzed. The lost job ratio (LJR), namely, is the ratio of (i) the amount of jobs that cannot be done due to battery of a node running out to (ii) the amount of jobs that should be done, is used as a performance metric. It describes the effect of the battery of each node running out and how much additional energy is needed. Although it is known that WPT can reduce the probability of the battery running out among a few nodes within a small area, the performance of a fully WPT network has not been clarified. By using stochastic geometry and first-passage-time analysis for a diffusion process, the expected LJR was theoretically derived. Numerical examples demonstrate that the key parameters determining the performance of the network are node density, threshold switching of statuses between “transferring energy” and “receiving energy,” and the parameters of power conversion. They also demonstrate the followings: (1) The mean energy stored in the node battery decreases in the networks because of the loss caused by WPT, and a fully WPT network cannot decrease the probability of the battery running out under the current WPT efficiency. (2) When the saturation value of power conversion increases, a fully WPT network can decrease the probability of the battery running out although the mean energy stored in the node battery still decreases in the networks. This result is explained by the fact that the variance of stored energy in each node battery becomes smaller due to transfer of energy from nodes of sufficient energy to nodes of insufficient energy.

  • Virtual Network Function Placement Model Considering Both Availability and Probabilistic Protection for Service Delay

    Shinya HORIMOTO  Eiji OKI  

     
    PAPER-Network

      Pubricized:
    2023/04/13
      Vol:
    E106-B No:10
      Page(s):
    891-902

    This paper proposes a virtual network function (VNF) placement model considering both availability and probabilistic protection for the service delay to minimize the service deployment cost. Both availability and service delay are key requirements of services; a service provider handles the VNF placement problem with the goal of minimizing the service deployment cost while meeting these and other requirements. The previous works do not consider the delay of each route which the service can take when considering both availability and delay in the VNF placement problem; only the maximum delay was considered. We introduce probabilistic protection for service delay to minimize the service deployment cost with availability. The proposed model considers that the probability that the service delay, which consists of networking delay between hosts and processing delay in each VNF, exceeds its threshold is constrained within a given value; it also considers that the availability is constrained within a given value. We develop a two-stage heuristic algorithm to solve the VNF placement problem; it decides primary VNF placement by solving mixed-integer second-order cone programming in the first stage and backup VNF placement in the second stage. We observe that the proposed model reduces the service deployment cost compared to a baseline that considers the maximum delay by up to 12%, and that it obtains a feasible solution while the baseline does not in some examined situations.

  • Experimental Evaluation of 920 MHz Band Air-to-Ground Radio Wave Propagation in Mountainous Areas

    Tekkan OKUDA  Hiraku OKADA  Chedlia BEN NAILA  Masaaki KATAYAMA  

     
    PAPER-Antennas and Propagation

      Pubricized:
    2023/04/24
      Vol:
    E106-B No:10
      Page(s):
    949-958

    In this study, aiming at clarifying the characteristics of air-to-ground radio wave propagation in mountainous areas, a transmission experiment was performed between a drone equipped with a transmitter and three receivers set up on the ground using a 920MHz band wireless system at Uchigatani forest, which is located in Yamato-cho, Gujo-shi, Gifu Prefecture. In the experiment, we simultaneously measured the received signal strength indicator (RSSI) and the drone's latitude, longitude, and height from the ground. Then, we verified whether the measured data has the line-of-sight between the transmitter and receivers using a geographic information system and analyzed characteristics of the RSSI, packet loss rate, and fading concerning the height from the ground and distance between the transmitter and receivers. The results showed that increasing the drone's altitude to 90m or more makes the link more stable and that the fading distribution in mountainous terrains is different from in other terrains.

  • Experimental Investigation on Electromagnetic Immunity and Conduction Immunity of Digital Control Circuit Based on ARM

    Yang XIAO  Zhongyuan ZHOU  Xiang ZHOU  Qi ZHOU  Mingjie SHENG  Yixing GU  Mingliang YANG  

     
    PAPER-Electromagnetic Compatibility(EMC)

      Pubricized:
    2023/05/19
      Vol:
    E106-B No:10
      Page(s):
    969-978

    This paper analyzes the typical functions of digital control circuit and its function modules, and develops a set of digital control circuit equipment based on Advanced RISC Machines (ARM) with typical function modules, including principle design, interference injection trace design, function design, and study the failure mode and threshold of typical function modules. Based on continuous wave (CW) and pulse wave, the direct power injection (DPI) method is used to test the conduction immunity of the digital control circuit, and the failure mode and sensitivity threshold of the digital control circuit are quantitatively obtained. This method can provide experimental verification for the immunity ability of the digital control circuit to different electromagnetic interference.

  • Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging

    Takuya WADATSUMI  Kohei KAWAI  Rikuu HASEGAWA  Kikuo MURAMATSU  Hiromu HASEGAWA  Takuya SAWADA  Takahito FUKUSHIMA  Hisashi KONDO  Takuji MIKI  Makoto NAGATA  

     
    PAPER

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    556-564

    This paper presents on-chip characterization of electrostatic discharge (ESD) impacts applied on the Si-substrate backside of a flip-chip mounted integrated circuit (FC-IC) chip. An FC-IC chip has an open backside and there is a threat of reliability problems and malfunctions caused by the backside ESD. We prepared a test FC-IC chip and measured Si-substrate voltage fluctuations on its frontside by an on-chip monitor (OCM) circuit. The voltage surges as large as 200mV were observed on the frontside when a 200-V ESD gun was irradiated through a 5kΩ contact resistor on the backside of a 350μm thick Si substrate. The distribution of voltage heights was experimentally measured at 20 on-chip locations among thinned Si substrates up to 40μm, and also explained in full-system level simulation of backside ESD impacts with the equivalent models of ESD-gun operation and FC-IC chip assembly.

81-100hit(5768hit)