A simple algorithm is proposed for representing nonseparable functions by equivalent separable functions. In this algorithm, functions are first represented by computational graphs, which are directed graphs representing the computational process of the functions. Then, the vertices of the computational graphs are searched in preorder or postorder, and the transformation to separable forms is performed at the places where it is necessary. By this repetition of the transformation, nonseparable functions are represented by separable functions automatically. The proposed algorithm will be useful in various fields of science and engineering because funcutions of one variable are easy to deal with.

In packet radio networks with TDMA, the throughput performance of network should be degraded due to the unequal traffic of each user. To overcome this problem, Mini-Slotted Alternating Priorities (MSAP) and TDMA with Parallel Transmission (TDMA/PT) were proposed. Especially, TDMA/PT can attain the thorughput performance more than one, even under unequal traffic. However, TDMA/PT cannot be used for mobile networks, because each terminal should know the location of every other terminal. In this paper, we propose an entirely new protocol named Slot Reservation TDMA with Parallel Transmissino: SR-TDMA/PT," which is suitable for mobile networks because a central station is able to locate every terminal easily. The central station also reserves time slots for each terminal so as to transmit packets in parallel as much as possible. Therefore, the throughput performance of SR-TDMA/PT is higher than TDMA/PT. We describe SR-TDMA/PT in detail and evaluate the performance of this protocol by simulation under various conditions.

The paper deals with the evaluation of performance of current cellular systems which are required to accommodate in an already operating system a wide range of new services, with different quality requirements (on delays, retransmission rates, etc.), and often characterised by a high burstiness (i. e. with relatively short traffic bursts, interleaved by comparatively long silence periods). To this end, an extension of packet communications is appealing for its inherent flexibility; standardisation of packet protocols for data transmission over idle GSM channels is in progress, and a similar service exploiting AMPS radio and network resources is already specified as Cellular Digital Packet Data. In both cases voice traffic retains a higher priority. The paper focuses on the evaluation of the effect of this additional traffic on existing voice traffic in a GSM Phase 2+ system. Although voice calls experience the same channel availability, their performance are worsened by the higher co-channel interference due to the higher average channel occupancy. This impairment cannot be tackled, as a matter of course, by increasing the re-use distance as this would affect the overall system capacity. The paper suggests the use of smart planning strategies capable to ease control of interference levels with a negligible impact on system complexity and signalling load.

Reduction of the complexity of the NLMS algorithm has recceived attention in the area of adaptive filtering. A processing cost reduction method, in which the component of the weight vector is updated when the absolute value of the sample is greater than or equal to an arbitrary threshold level, has been proposed. The convergence analysis of the processing cost reduction method with white Gaussian data has been derived. However, a convergence analysis of this method with correlated Gaussian data, which is important for an actual application, is not studied. In this paper, we derive the convergence cheracteristics of the processing cost reduction method with correlated Gaussian data. From the analytical results, it is shown that the range of the gain constant to insure convergence is independent of the correlation of input samples. Also, it is shown that the misadjustment is independent of the correlation of input samples. Moreover, it is shown that the convergence rate is a function of the threshold level and the eigenvalues of the covariance matrix of input samples as well as the gain constant.

In this paper, a feasible optical code-division multiple-access (CDMA) technique is proposed for high-speed computer networks using prime codes and optical signal processing to guarantee real-time data communications. All-optical architectures for fastly tunable CDMA encoders and decoders are presented, which can be feasibly implemented in the optical domain by using electrooptic switches and optical delay lines. This can support an ultrahigh throughput and a very fast reconfiguration time. Furthermore, we present a self-synchronized sample technique to ensure the correct phase synchronization between optical clock stream and asynchronous electronic data at each electrooptic modulator of an optical CDMA transmitter.

In this paper, we propose a timing constrained database system which accesses a database at a host computer via a mobile support server with a wireless portable computer running in mobile computing environments, so that we can provide seamless database access between a communication cell and the host computer even if the user of the portable computer moves from one communication cell to another. Then, we also provide some new kind of database cache algorihm, such as all-cell-cache, neighbour-cell-cache, 1-cell-skip-cache, 2-cell-skip-cache and 3-cell-skip-cache methods, each of which manages the data downloading and uploading among the host database and some cell databases at the mobile support servers so as to minimize the database access fault probability when the user moves from one communication cell to another. And, we show the averaged database access time and the averaged database cache hit ratio which are computed by simulating each of the above database cache algorithms with random variables generation method. Finally, we conclude that each above cache alogorithm is advantageous to the database in mobile computineg einvironments.

This paper designs recursive least-squares fixed-point smoother and filter, which use the observed value, the probability that the signal exists, and the covariance information relevant to the signal and observation noises, on the estimation problem associated with the uncertain observations in linear continuous-time systems.

A structural active-object system (SAOS) is a transition-based object-oriented system suitable for rapid development of hardware logic simulators. A SAOS consists of a collection of interacting structural active objects (SAOs), whose behaviors are determined by the transition statements provided in their class definitions. Furthermore, SAOs can be structurally and hierarchically composed from their component SAOs like hardware components. These features allow SAOs to model components for circuit simulation more naturally than passive objects used in ordinary object-oriented programming. Also, we can easily create new kinds of components by using the inheritance mechanism. Executions of transition statements may be event-and/or time-driven, and hence digital, analog, and mixed-mode simulation is possible. Prototype simulation programs with graphical user interfaces have been developed as SAOS programs for digital, analog, and mixed-mode circuit simulation.

We have compared the various raindrop-size distributions (DSD) with the recent experimental data collected by the distrometer. It is shown that the Weibull distribution is the best fit to the experimental data for drizzle, widespread and thunderstorm rain cases. By using this Weibull DSD, we obtained a new expression of the radar reflectivity factor (Z) and the rainfall rate (R) relation, that is Z=285R1.48, which gives few errors comparing to some measurements in TRMM frequency of 14GHZ.

Full-search block-matching motion estimation is a popular method to reduce temporal redundancies in video sequence. Due to its excessive computational load, parallel processing architectures are often required for real-time processing. One of the architectures is Hsieh's architecture based on systolic array processor and shift register arrays. Serial input characteristic of his scheme can reduce the number of pixel inputs to one, at the expense of significantly increasing the initialization time. This paper presents a modified and generalized Hsieh's architecture to reduce the initialization time. The proposed architecture can easily control data flows by rearranging shift register arrays and input-pin counts by using multiplexers on input stage, while retaining good properties of Hsieh's. The proposed architecture has the following advantages: (1) it allows controllable data inputs to save the pin counts, (2) it is flexible to the dimensional change of the search area via simple control, (3) it can operate in real time for video conference applications, and (4) it has simple and modular structure which is quite suitable for VLSI implementation. For verification of the proposed architecture, VHDL simulations are performed and some results are given.

A system based on application of Fuzzy Cognitive Map (FCM) to perform on-line fault diagnosis is presented. The diagnostic part of the system is composed of two diagnostic schemes. The first one (basic diagnostic algorithm) can be considered as a simple transition of Shiozaki's signed directed graph approach to FCM framework. The second one is an extended version of the basic diagnostic algorithm where an important concept, the temporal associative memories (TAM) recall of FCM, is adopted. In on-line application, self-generated fault FCM model generates predicted pattern sequence through the TAM recall process, which is compared with observed pattern sequence to declare the origin of fault. As the resultant diagnosis scheme takes short computation time, it can be used for on-line fault diagnosis of large and complex processes, and even for incipient fault diagnosis. In practical case, since real observed pattern sequence may be different from predicted one through the TAM recall owing to propagation delay between process variables, the time indexed fault FCM model incorporating delay time is proposed. The utility of the proposed system is illustrated in fault diagnosis of a tank-pipe system.

In this paper,novel techniques for designing Finite Impulse Response (FIR) digital integrators have been given. The design is based on analytical approach for computing the weights required in the structures. Exact mathematical formulas for computing these weights have been derived.

This paper describes a new hierarchical bit line organization utilizing a T-shaped bit line(H-BLT) and its practical implementation in a 4-Mb SRAM using a 0.4µm CMOS process. The H-BLT has reduced the number of I/O circuits for multiplexers, sense amplifiers and write drivers, resulting in an efficient multiple blockdivision of the memory cell array. The size of the SRAM die was reduced by 14% without an access penalty. The active current is 30mA at 5 V and 10 MHz. The typical address access time is 35 ns with a 4.5 V supply voltage and a 30 pF load capacitance. The operating voltage range is 2.5 V to 6.0 V. H-BLT is a bright and useful architecture for the high density SRAMs of the future.

Special memory and embedded memories used in a newly designed MPEG2 decorder LSI are described. Orthogonal memory, which has a functionality of parallel-to-serial transposition, is employed in a IDCT(Inverse Discrete Cosine Transform) block for small area and low-power. The orthogonal memory realizes the special pupose with 50% of the area and the power compared with using flip-flop array. FIFO's and other dual-port memories are designed by using a single-port RAM operated twice in one clock cycle to reduce cost. Flip-Flop cell is one of the important memory elements in the MPEG environment, and is also improved for the low-cost optimizing functionality for video processing. The area and power of the fabricated MPEG2 decoder chip are reduced by 20% using these techniques. As for testability, direct test mode is implemented for small area. An instruction RAM is placed outside the pad area in parallel to a normal instruction ROM and activated by Al-masterslice for extensive debugging and an early sampling. Other memory related techniques and the key features of the decoder LSI are also described.

In this paper we propose a new medical image processing system called Virtualized Endoscope System (VES)", which can examine the inside of a virtualized human body. The virtualized human body is a 3-D digital image which is taken by such as X-ray CT scanner or MRI scanner. VES consists of three modules; (1) imaging, (2) segmentation and reconstruction and (3) interactive operation. The interactive operation module has following thee major functions; (a) display of, (b) measurement from, and (c) manipulation to the virtualized human body. The user of the system can observe freely both the inside and the outside of a target organ from any point and any direction freely, and can perform necessary measurement interactively concerning angle and length at any time during observation. VES enables to observe repeatedly an area where the real endoscope can not enter without pain from any direction which the real endoscope can not. We applied this system to real 3-D X-ray CT images and obtained good result.

In order to produce high quality multimedia contents efficiently, DTPP -desktop program production system- has been proposed. The DTPP is capable of supporting all the necessary procedures of program production, from planning to broadcasting, by molding each process into the desktop environment of program producers. The DTPP system consists of multimedia terminals, a media server, a computing server, and network system. In the DTPP, new technological concepts such as cooperative program production, indexing and utilization of attribute information of images, and video components and spatio-temporal editing will be installed.

Several major aircraft accidents have been attributed to low-altitude wind shears, which are normally caused by microbursts or gust fronts. Terminal Doppler Weather Radar (TDWR) systems are being installed near major airports for the detection of low-altitude wind shears. In order to develop a TDWR system further, low-altitude wind shears were numerically simulated in this study. The basic equations, which contain prognostic equations for air velocity, pressure, temperature, water vapor, and rainwater, were solved using a finite difference scheme. A terrain-following coordinate transformation was employed to simulate terrain effects. The simulation results are presented in this paper.

To develop human interface for virtual environment, we have constructed a tensed strings based interface device called SPIDAR, which allow us to manipulate virtual object directly just like in real space. SPIDAR can both measure the movement of user's finger tip and offer force display. Since proper force feedback comes out of the proper position measurement, in this paper, we will analyze the possible reasons that may cause position measurement error, and propose an algorithm which can revise the error and improve position measurement precision.

A maximum diameter (Dmax) of raindrop should be assumed when rainfall rate (R) is estimates from the differential reflectivity (ZDR) and the horizontal reflectivity (ZH) measured with dual-polarization radar. If the assumed Dmax is different from actual Dmax, the estimated R contains errors. Using distrometer data, it was found that ZDR correlates with Dmax, and it was verified that when Dmax is adaptively determined by an empirical relationship between ZDR and Dmax, errors in estimated R can be reduced.

Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.