Under the assumption that clock can be inputted to each register at an arbitrary timing, the minimum feasible clock period can be determined if delays between registers are given. This minimum feasible clock period might be reduced by register relocation maintaining the circuit behavior and topology. In this paper, we propose a gate-level register relocation method to reduce the minimum feasible clock period. The proposed method is a greedy local circuit modification method. We prove that the proposed method achieves the clock period achieved by retiming with delay decomposition, if the delay of each element in the circuit is unique. Experiments show that the computation time of the proposed method and the number of registers of a circuit obtained by the proposed method are smaller than those obtained by the retiming method in the conventional synchronous framework.

We propose a new tableau construction which builds an FSM, instead of a Kripke structure, from a formula in a class of temporal logic named ASTL. This FSM is a maximal model of the formula under the preorder derived from simulation relations. Additionally, we propose a method using the tableaus to build controllers in a certain topology of interconnected FSMs. We can use ASTL to describe the desired behaviors of the control system. This method is applicable to generating digital circuits. Moreover, this method accepts a wider range of specifications than conventional methods.

This paper deals with WF-net based modeling and verification of interorganizational workflows (interworkflows for short) based on the protocol of WfMC. In the protocol, there are three patterns of interoperability: Chained, Nested, and Parallel synchronized; and an interworkflow is constructed by using those interoperability patterns. We first give a WF-net based modeling method. In this modeling method, the three interoperability patterns are respectively expressed in terms of WF-nets. They enable us to model a given interworkflow as a WF-net by connecting WF-nets representing its constituent workflows. We also indicate that if free choice WF-nets are connected by means of any combination of the three patterns then the resultant WF-net is asymmetric choice. Next we discuss verification of WF-nets obtained through the modeling method. Intuitively, a WF-net is said to be sound if, for any case, the initial state is always transformed to the final state. Unfortunately, even if every constituent WF-net is sound FC, the resultant WF-net is not always sound. We give a sufficient condition of non-soundness checkable in polynomial time. We also show that if they are connected by only the Nested pattern then the resultant WF-net is sound.

We have successfully applied Generalized Multiprotocol Label Switching (GMPLS) architecture to the Wavelength Assignment Photonic Switching System (WAPS) to create an internet access system that can provide, between terminals, not only conventional best-effort type of IP packet forwarding, but also high-speed and Quality of Service (QoS)-guaranteed IP forwarding. In this paper the system architecture, system specifications, and system hardware/software implementations are described.

This paper addresses the issue of deafness in MAC (Medium Access Control) protocols for wireless ad hoc networks using directional antennas. Directional antennas are expected to provide significant improvements over omni-directional antennas in ad hoc networks, such as high spatial reuse and range extension. Recently, several MAC protocols using directional antennas, typically referred to as directional MAC protocols, have been proposed for ad hoc networks. However, directional MAC protocols inherently introduce new kinds of problems arising from directivity. One major problem is deafness, caused by a lack of state information of neighbor nodes, whether idle or busy. This paper proposes DMAC/DA (Directional MAC with Deafness Avoidance) to overcome the deafness problem. DMAC/DA modifies the previously proposed MAC protocol, MDA (MAC protocol for Directional Antennas), to reduce the number of control messages and also maintain the ability to handle deafness. In DMAC/DA, WTS (Wait To Send) frames are simultaneously transmitted by the transmitter and the receiver after the successful exchange of directional RTS (Request To Send) and CTS (Clear To Send) to notify the on-going communication to potential transmitters that may experience deafness. The experimental results show that DMAC/DA outperforms existing directional MAC protocols, such as DMAC (Directional MAC) and MDA, in terms of throughput, control overhead and packet drop ratio under the different values of parameters such as the number of flows and the number of beams. In addition, qualitative evaluation of 9 MAC protocols is presented to highlight the difference between DMAC/DA and existing MAC protocols.

This paper proposes a new identifier scheme for Internet Indirection Infrastructure (i3). i3 is an overlay network on top of IP, and realizes rendezvous-based communications. It provides a general solution to deal with communication primitives such as host mobility, multicast and anycast. Although i3 provides flexible communication mechanisms, it is not optimized for mobile and wireless communications. Thus, three key problems still remain to be addressed: header overhead, multiple trigger updates and detection of a close i3 server after handover. The proposed identifier scheme, called local ID, significantly reduces the overhead without sacrificing the flexibility of i3. In a typical case, the local ID makes the total header size nearly half that of the original protocol. This paper also discusses how to adapt the local ID to various types of i3 primitives, so that a mobile host can receive all the benefits of i3 communications.

Some major P2P file distribution systems adopt Tit-For-Tat exchange strategy, which means "initially cooperate, then respond in kind to a previous opponent's action, i.e. cooperative or not." However, when sharing a file on such P2P systems, the random peer selection has a problem in that each peer cannot download the file enough efficiently. The peer selection method that groups peers according to their rate has been proposed to solve this problem. This method is supposed to be able to alleviate the difference in performance among peers because it lets peers with similar transmitting rate connect to each other. However, when reduction in peer performance or link one occurs, which is often observed on today's Internet, some problems will emerge, such as it takes a long time for the existing method to reconfigure groups; 2) immediate reconstruction of neighbor peers has not been taken into account when peers detect deterioration in downloading performance. Therefore, we propose a method that reconfigures the group of neighbor peers once a peer notices that the performance of connected peers decreases. The proposed method is evaluated through simulation experiments using BitTorrent as an instance of Tit-For-Tat strategy. The download time of all peers and that of the peer with performance deterioration are estimated focusing on the effect of switching a degraded peer to another immediately. As a result, we confirm that our proposal can distribute files among all peers faster than the existing method keeping incentives for users to some extent. We believe that the proposal which can adapt to the sudden network deterioration is one of the most important technologies for evolution of network software.

This paper discusses issues in the design of analog-to-digital converters (ADCs) in nanoscale CMOS and introduces some experimental designs incorporating techniques to solve these issues. Technology scaling increases the maximum conversion rate, but it decreases the gain and the SNR. To maintain a high SNR level despite the low-voltage operation, the power consumption needs to be increased. Because of lowered supply voltages, the design of circuits based on operational amplifiers (OpAmps) has become more difficult. Designs without OpAmps have therefore received more attention. One way of realizing low-voltage pipeline ADCs is by using comparator-controlled current sources, instead of conventional OpAmps. Furthermore, successive approximation ADCs and sub-ranging ADCs do not require OpAmps and are therefore suitable for low-voltage operation. ADC designers are now searching for suitable architectures for future nanoscale CMOS processes.

In the age of pervasive computing, ubiquitous collaboration has become an every-day life paradigm. Without an ideal computing infrastructure, issues with ubiquitous collaboration, such as network unreliability, platform heterogeneity, and client's resource constraints, are inevitable. The traditional replication scheme copes with network unreliability by replicating all the objects of a shared application together at once. This is, however, suitable for neither cooperative applications nor mobile computing devices. These problems can be naturally addressed by using a fine-grained replication scheme that enables a portion of the application objects to be replicated. This paper presents an object-oriented middleware that is capable of dynamically and transparently replicating remotely shared Java applications in a partially and on-demand incremental manner. It is also able to maintain various consistency semantics and enables the coexistence of fine-grained replications and conventional remote method invocations. Empirical results indicate several practical benefits of the middleware.

A Multi-Functional unit has several functions and these can be changed with a control signal. For High-Level Synthesis, using Multi-Functions units in operation chaining make it possible to obtaining the solution with the same number of control steps and less resources compared to that without them. This paper proposes an operation chaining method considering Multi-Functional units. The method formulates module selection, scheduling, and functional unit allocation with operation chaining as a 0/1 integer linear problem and obtains optimal solution with minimum number of control steps under area and clock-cycle type constraints. The first contribution of this paper is to propose the global search for operation chaining with Multi-Functional units having multiple outputs as well as with single output. The second contribution is to condier the area constraint as a resource constraint instead of the type and number of functional units. Experimental results show that chaining with Multi-Functional units is effective and the proposed method is useful to evaluate heuristic algorithms.

MC-CDMA is an attractive multi-access method for the next generation high-speed mobile communication systems. The uplink transmission performance is limited by the multi-access interference (MAI) from other users since all users share the same bandwidth. Adaptive antenna array can be used to suppress the MAI and to improve the uplink transmission performance. In this paper, we propose a frequency-domain adaptive antenna array for multi-code MC-CDMA. The proposed frequency-domain adaptive antenna array uses a simple normalized LMS (NLMS) algorithm. Although the NLMS algorithm is used, very fast weight convergence within one MC-CDMA symbol duration is achieved since the weight updating is possible as many times as the number of subcarriers within one MC-CDMA symbol duration.

In this letter, the effects of transmit beamforming on downlink performance in DS-CDMA communication systems are examined. We present a simple-to-use expression for the conditional instantaneous SINR after Rake combining. Assuming BPSK modulation, the performance of average bit error rate is evaluated. We compare the average BER performance obtained by different beamforming methods under frequency selective multipath fading channels.

A lossless data embedding method that inserts data in images in the spatial domain is proposed in this paper. Though a lossless data embedding method once distorts an original image to embed data into the image, the method restores the original image as well as extracts hidden data from the image in which the data are embedded. To guarantee the losslessness of data embedding, all pixel values after embedding must be in the dynamic range of pixels. Because the proposed method modifies some pixels to embed data and leaves other pixels as their original values in the spatial domain, it can easily keep all pixel values after embedding in the dynamic range of pixels. Thus, both the capacity and the image quality of generated images are simultaneously improved. Moreover, the proposed method uses only one parameter based on the statistics of pixel blocks to embed and extract data. By using this parameter, this method does not require any reference images to extract embedded data nor any memorization of the positions of pixels in which data are hidden to extract embedded data. In addition, the proposed method can control the capacity for hidden data and the quality of images conveying hidden data by controlling the only one parameter. Simulation results show the effectiveness of the proposed method; in particular, it offers images with superior image quality to conventional methods.

A supply voltage (VDD) independent temperature sensor circuit, which can be realized by the optimum combination of three current modes of n-MOSFETs including the subthreshold current using the feedback scheme from the temperature dependent voltage (VTD) output to the gates of three n-MOSFETs, was proposed and fabricated by a standard 1.2 µm n-well CMOS process. The circuit consists of only 17 MOSFETs without high resistors resulting in a small die area of 0.18 mm2. The temperature coefficient TC of the sensor circuit can be controlled by the channel length ratio L4/L3 of two n-MOSFETs. The average temperature sensor voltage VTS and its typical TC are 1.77 V at VDD=5.0 V (20) and 5.1 mV/ for VDD=5.01.0 V in the temperature range of -20-100 in case of L4/L3=9, respectively.

In this letter, we propose a new State Model for IPv6 Interfaces, which can help the administrator in determining the status of the IPv6 Interface at any instant. This State Model is superior to the current model as it provides additional information as to why an IPv6 Interface is unavailable for performing the provisioned service and, it is also flexible to define new Secondary State and Secondary State Qualifiers in the future. This State Model helps the administrator to decide what actions he may need to take to bring the Interface UP. Ths State Model is based on the Control State Machine implemented in the Samsung's IPv6 Protocol Stack.

The device design of future nanoscale MOSFETs is reviewed. Major challenges in the design of the nanometer MOSFETs and the possible solutions are discussed. In this paper, special emphasis is placed on the combination of new transistor structures that suppress the short channel effect and on back-gate voltage control that suppresses the characteristics variations. Two new device architectures, variable-body-factor FD SOI MOSFET and multigate MOSFET with low aspect ratio, have been proposed and their advantages are discussed.

We present a scenario-aware bus functional modeling method which improves the accuracy of traditional methods without sacrificing the simulation run time. Existing methods focused on the behavior of individual IP (Intellectual Property) components and neglected the interplay effects among them, resulting in accuracy degradation from the system perspective. On the other hand, our method thoroughly considers such effects and increases the analysis accuracy by adopting control signal modeling and hierarchical stochastic modeling. Furthermore, our method minimizes the additional design time by reusing the simulation results of each IP component and an automated design flow. The experimental results show that the accuracy of our method is over 90% of RTL simulation in a multimedia SoC (System-on-Chip) design.

A novel interconnect design concept named "ASIS (Appilication-specific Interconnect Structure)" is presented for 45 nm CMOS performance maximization. Basic scheme of ASIS is that corresponding to applications, such as high-performance, low-power, or high reliability, interconnect structure as well as metal thickness is individually optimized in order to maximize chip-level performance matched to the application. Our investigation shows that for low-power application, the increased resistivity of scaled-down Cu-wire is not a main issue, so that thinner wire is more advantageous. For high-performance application, partially double pitch structure for local and intermediate layers is advantageous. For high-reliability requirement, Cu-Al alloy or CoWP cap-metal is quite effective for boosting reliability.

This paper presents two steganographic methods for JPEG2000 still images which approximately preserve histograms of discrete wavelet transform coefficients. Compared with a conventional JPEG2000 steganography, the two methods show better histogram preservation. The proposed methods are promising candidates for secure JPEG2000 steganography against histogram-based attack.

This paper proposes a novel signal estimation method that uses a tensor product expansion. When a bivariable function, which is expressed by two-dimensional matrix, is subjected to conventional tensor product expansion, two single variable functions are calculated by minimizing the mean square error between the input vector and its outer product. A tensor product expansion is useful for feature extraction and signal compression, however, it is difficult to separate global noise from other signals. This paper shows that global noise, which is observed in almost all input signals, can be estimated by using a tensor product expansion where absolute error is used as the error function.