For the purpose of realizing a new intelligent system and its simplified VLSI implementation, we propose a new nonvolatile analog memory called "switched diffusion analog memory with feedback circuit (FBSDAM). " FBSDAM has linear writing and erasing characteristics. Therefore, FBSDAM is useful for memorizing an analog value exactly. We also propose a new analog content-addressable memory (CAM) which has neural-like learning and discriminating functions which discriminate whether an incoming pattern is an unknown pattern or a stored pattern. We design and fabricate the CAM using FBSDAM by means of the 4µm double-poly single-metal CMOS process and nonvolatile analog memory technology which are developed by us. The chip size is 3.1 mm3.1 mm. We estimate that the CAM is composed of 50 times fewer transistors and requires 70 times fewer calculation steps than a typical digital computer implemented using similar technology.

Given two terms and their rewriting rules, an unreachability problem proves the non-existence of a reduction sequence from one term to another. This paper formalizes a method for solving unreachability problems by abstraction; i. e. , reducing an original concrete unreachability problem to a simpler abstract unreachability problem to prove the unreachability of the original concrete problem if the abstract unreachability is proved. The class of rewriting systems discussed in this paper is called β rewriting systems. The class of β rewriting systems includes very important systems such as semi-Thue systems and Petri Nets. Abstract rewriting systems are also a subclass of β rewriting systems. A β rewriting system is defined on axiomatically formulated base structures, called β structures, which are used to formalize the concepts of "contexts" and "replacement," which are common to many rewritten objects. Each domain underlying semi-Thue systems, Petri Nets, and other rewriting systems are formalized by a β structure. A concept of homomorphisms from a β structure (a concrete domain) to a β structure (an abstract domain) is introduced. A homomorphism theorem (Theorem1)is established for β rewriting systems, which states that concrete reachability implies abstract reachability. An unreachability theorem (Corollary1) is also proved for β rewriting systems. It is the contraposition of the homomorphism theorem, i. e. , it says that abstract unreachability implies concrete unreachability. The unreachability theorem is used to solve two unreachability problems: a coffee bean puzzle and a checker board puzzle.

We experimentally demonstrate the ultrafast and high-repetition capabilities of a polarization-discriminating symmetric Mach-Zehnder (PD-SMZ) all-optical switch. This switch, as well as an original symmetric Mach-Zehnder (SMZ) all-optical switch, is based on a highly efficient but slowly relaxing band-filling effect that is resonantly excited in a passive InGaAsP bulk waveguide. By using a mechanism that cancels out the effect of the slow relaxation, ultrafast switching is attained. We achieve a switching time of 200 fs and demultiplexing of 1.5 Tbps, showing the applicability of the SMZ or PD-SMZ all-optical switches to optical demultiplexing of well over 1 Tbps for the first time. High-repetition capability, which is another important issue apart from the switching speed, is also verified by using control pulses at a repetition rate of 10.5 GHz. We also discuss the use of nonlinearity in a semiconductor optical amplifier to further reduce the control-pulse energy.

An optical cell buffer (OCB) for use in photonic ATM switch, is needed in order to resolve contention between optical cells. A 320-Gb/s-throughput switch system with 32 wavelength channels requires a buffer size of 13 and a wavelength bandwidth of 25 nm. We developed an optical cell buffer with a four-nested-taps configuration and fabricated it with electroabsorption gates and gain clamped optical amplifiers. The output level variation, which determines the stability of operating condition, is less than 2.4 dB under typical conditions and the insertion loss variation is suppressed to within 5 dB. This OCB can be used in a 320-Gb/s photonic ATM switch.

To enhance the extinction ratio (ER) of NRZ-to-inverted-RZ converter based on cross-gain compression of a semiconductor optical amplifier (SOA), a modified terahertz optical asymmetric demultiplexer (TOAD) is cascaded. ER is improved from 1.6-6.7 dB to 5.4-14.5 dB, depending on the intensity of input optical NRZ signal. The proposed NRZ-to-inverted-RZ converter enhances and regulates ER to a high value (14.5 dB) for very wide optical NRZ signal intensity range.

This paper proposes a fast synchronization scheme with a short preamble signal for high data rate wireless LAN systems using orthogonal frequency division multiplexing (OFDM). The proposed OFDM burst format for fast synchronization and the demodulator for the proposed OFDM burst format are described. The demodulator, which offers automatic frequency control and symbol timing detection, enables us to shorten the preamble length to one quarter that of a conventional one. Computer simulation results show that the degradation in required Eb/N0 due to the synchronization scheme is less than 1 dB in a selective Rayleigh fading channel.

By adopting a network architecture in which not only a calling but also a called terminal can select a wavelength, a novel WDM network becomes possible. This we call Wavelength Assignment Photonic Network (WAPN). In this network wavelengths are a kind of network resources and according to requests from terminals, wavelengths are allocated or assigned to calls. In the system a wavelength used for a call is to be used for another call after the call is terminated. By supplying wavelengths to the home, a bitrate-free, protocol free or even transmission method free network can be realized. In this paper, from a viewpoint of S/N or Q factor, WAPN is evaluated with special focus on the node architecture--i. e. , from the viewpoint of node size, number of switching stages, crosstalk level,and losses, because the allowable node size is the crucial issue to decide the whole network capacity. After brief explanations of this proposed system, the model for system evaluations will be established and a node system is to be evaluated for some practical parameter values considering especially traffic characteristics of a node. As a result of this study a node system with capacity more than 100 thousands erl (about 20 Tbps throughput) can be constructed using present available technologies, which will enable us to construct large WAPN network with radius of 2,000 km and subscribers of about 50 millions.

This paper proposesd a non-blocking multi-stage ATM switch based on a hierarchical-cell-resequencing (HCR) mechanism and high-speed WDM interconnection and reports on its feasibility study. In a multi-stage ATM switch, cell-based routing is effective to make the switch non-blocking, because all traffic is randomly distributed over intermediate switching stages. But due to the multi-path conditions, cells may arrive out of sequence at the output of the switching fabric. Therefore, resequencing must be performed either at each output of the final switching stage or at the output of each switching stage. The basic HCR switch performs cell resequencing in a hierarchical manner when switching cells from an input-lines to a output-line. As a result, the cell sequence in each output of the basic HCR switch is recovered. A multi-stage HCR switch is constructed by interconnecting the input-lines and output-lines of these basic HCR switches in a hierarchical manner. Therefore, the cell sequence in each final output of the switching fabric is conserved in a hierarchical manner. In this way, cell-based routing becomes possible and a multi-stage ATM switch with the HCR mechanism can achieve 100% throughput without any internal speed-up techniques. Because a large-capacity multi-stage HCR switch needs a huge number of high-speed signal interconnections, a breakthrough in compact optical interconnection technology is required. Therefore, this paper proposes a WDM interconnection system with an optical router arrayed waveguide filter (AWGF) that interconnects high-speed switch elements effectively and reports its feasibility study. In this architecture, each switch element is addressed by a unique wavelength. As a result, a switch in a previous stage can transmit a cell to any switch in the next stage by only selecting its cell transmission wavelength. To make this system feasible, we developed a wide-channel-spacing optical router AWGF and compact 10-Gbit/s optical transmitter and receiver modules with a compact high-power electroabsorption distributed feedback (EA-DFB) laser and a new bit decision circuit. Using these modules, we confirmed stable operation of the WDM interconnection. This switch architecture and WDM interconnection system should enable the development of high-speed ATM switching systems that can achieve throughput of over 1 Tbit/s.

Spot-size-converter integrated semiconductor optical amplifiers have been developed as gate elements for optical switch matrices. An S-shape waveguide has been introduced to prevent re-coupling of unguided light to the output fiber. An angled-facet structure effectively suppressed light reflection at the end facets. Consequently, a high extinction ratio of 70 dB and a high fiber-to-fiber gain of 20 dB were achieved. Sufficient optical coupling characteristics to a flat-ended single-mode fiber with a coupling loss of 3.5 dB were also demonstrated.

We propose a real-time low-rate video compression algorithm using fixed-rate multi-stage hierarchical vector quantization. Vector quantization is suitable for mobile computing, since it demands small computation on decoding. The proposed algorithm enables transmission of 10 QCIF frames per second over a low-rate 29.2 kbps mobile channel. A frame is hierarchically divided by sub-blocks. A frame of images is compressed in a fixed rate at any video activity. For active frames, large sub-blocks for low resolution are mainly transmitted. For inactive frames, smaller sub-blocks for high resolution can be transmitted successively after a motion-compensated frame. We develop a compression system which consists of a host computer and a memory-based processor for the nearest neighbor search on VQ. Our algorithm guarantees real-time decoding on a poor CPU.

This paper describes a new reconfigurable processor architecture called REMARC (Reconfigurable Multimedia Array Coprocessor). REMARC is a small array processor that is tightly coupled to a main RISC processor. It consists of a global control unit and 64 16-bit processors called nano processors. REMARC is designed to accelerate multimedia applications, such as video compression, decompression, and image processing. These applications typically use 8-bit or 16-bit data therefore, each nano processor has a 16-bit datapath that is much wider than those of other reconfigurable coprocessors. We have developed a programming environment for REMARC and several realistic application programs, DES encryption, MPEG-2 decoding, and MPEG-2 encoding. REMARC can implement various parallel algorithms which appear in these multimedia applications. For instance, REMARC can implement SIMD type instructions similar to multimedia instruction extensions for motion compensation of the MPEG-2 decoding. Furthermore, the highly pipelined algorithms, like systolic algorithms, which appear in motion estimation of the MPEG-2 encoding can also be implemented efficiently. REMARC achieves speedups ranging from a factor of 2.3 to 21.2 over the base processor which is a single issue processor or 2-issue superscalar processor. We also compare its performance with multimedia instruction extensions. Using more processing resources, REMARC can achieve higher performance than multimedia instruction extensions.

In this paper, the computational issue in the problem of learning Bayesian belief networks (BBNs) based on the minimum description length (MDL) principle is addressed. Based on an asymptotic formula of description length, we apply the branch and bound technique to finding true network structures. The resulting algorithm searches considerably saves the computation yet successfully searches the network structure with the minimum value of the formula. Thus far, there has been no search algorithm that finds the optimal solution for examples of practical size and a set of network structures in the sense of the maximum posterior probability, and heuristic searches such as K2 and K3 trap in local optima due to the greedy nature even when the sample size is large. The proposed algorithm, since it minimizes the description length, eventually selects the true network structure as the sample size goes to infinity.

Wavelength conversion is important since it ensures full flexibility of the WDM network layer. Progress in optical wavelength converter technology is reviewed with emphasis on all-optical wavelength converter types based on semiconductor optical amplifiers.

This paper presents an algorithm for viewpoint-based similarity discernment of linguistic concepts on Semantic Network Array Processor (SNAP). The viewpoint-based similarity discernment plays a key role in retrieving similar propositions. This is useful for advanced knowledge processing areas such as analogical reasoning and case-based reasoning. The algorithm assumes that a knowledge base is constructed for SNAP, based on information acquired from the WordNet linguistic database. The algorithm identifies paths on the knowledge base between each given concept and a given viewpoint concept, then computes a similarity degree between the two concepts based on the number of nodes shared by the paths. A small scale knowledge base was constructed and an experiment was conducted on a SNAP simulator that demonstrated the feasibility of this algorithm. Because of SNAP's scalability, the algorithm is expected to work similarly on a large scale knowledge base.

We experimentally demonstrate the ultrafast and high-repetition capabilities of a polarization-discriminating symmetric Mach-Zehnder (PD-SMZ) all-optical switch. This switch, as well as an original symmetric Mach-Zehnder (SMZ) all-optical switch, is based on a highly efficient but slowly relaxing band-filling effect that is resonantly excited in a passive InGaAsP bulk waveguide. By using a mechanism that cancels out the effect of the slow relaxation, ultrafast switching is attained. We achieve a switching time of 200 fs and demultiplexing of 1.5 Tbps, showing the applicability of the SMZ or PD-SMZ all-optical switches to optical demultiplexing of well over 1 Tbps for the first time. High-repetition capability, which is another important issue apart from the switching speed, is also verified by using control pulses at a repetition rate of 10.5 GHz. We also discuss the use of nonlinearity in a semiconductor optical amplifier to further reduce the control-pulse energy.

We have been working on a project called ParaBIT (for parallel inter-board optical interconnection technology) to achieve large-capacity switching systems. The ParaBIT module being developed as the first step in this project is a front-end module with 40 channels providing throughput of 28 Gb/s, cost-effectiveness and compactness. To realize the module, this project has developed five novel technologies: (1) 850-nm 10-ch Vertical-cavity Surface-emitting laser (VCSEL) arrays as very cost-effective light sources, (2) new high-density multiport bare fiber connectors that do not need a ferrule and spring, (3) passive optical alignment using polymeric optical waveguide film with a 45-degree mirror for coupling to the optical array chips and the waveguide, (4) transferred multichip bonding to mount optical array chips on a substrate with a positioning error of only a few micrometers, and (5) simple electronic circuits with a fixed-decision-level receiver and an APC-less transmitter, and low power consumption. Experimental results show that the design targets of throughput of 700 Mb/s per channel and a compact and cost-effectiveness structure were met. Thus, ParaBIT is a promising technology for large-capacity switching systems.

By adopting a network architecture in which not only a calling but also a called terminal can select a wavelength, a novel WDM network becomes possible. This we call Wavelength Assignment Photonic Network (WAPN). In this network wavelengths are a kind of network resources and according to requests from terminals, wavelengths are allocated or assigned to calls. In the system a wavelength used for a call is to be used for another call after the call is terminated. By supplying wavelengths to the home, a bitrate-free, protocol free or even transmission method free network can be realized. In this paper, from a viewpoint of S/N or Q factor, WAPN is evaluated with special focus on the node architecture--i. e. , from the viewpoint of node size, number of switching stages, crosstalk level,and losses, because the allowable node size is the crucial issue to decide the whole network capacity. After brief explanations of this proposed system, the model for system evaluations will be established and a node system is to be evaluated for some practical parameter values considering especially traffic characteristics of a node. As a result of this study a node system with capacity more than 100 thousands erl (about 20 Tbps throughput) can be constructed using present available technologies, which will enable us to construct large WAPN network with radius of 2,000 km and subscribers of about 50 millions.

Since the inception of optical networking, a goal has been to create an all-optical network. The rapid breakthrough for WDM in point to point links has brought this prospect considerably closer, however, at the same time, questions regarding the scalability of the all-optical network remain. In this paper, we review our recent research in this area, partly performed within the European Union project METON (METropolitan Optical Network), and discuss the all-optical approach and different optoelectronic alternatives, mainly of the 2R (reamplify and reshape) type.

A new low voltage high-speed CMOS composite transistor is presented. It lowers supply voltage down to |Vt|+2 Vds,sat and considerably extends input voltage operating range and achieves high speed operation. As an application example, it is used in the design of a high-speed four quadrant analog multiplier. Simulations results using MOSIS 2µm N-well process with a 3 V supply are given.

A problem of obtaining an optimal file transfer on a file transmission net N is to consider how to distribute, with a minimum total cost, copies of a certain file of information from some vertices to others on N by the respective vertices' copy demand numbers. This paper proves such a problem to be NP-hard in general.