Electron and hole transport in polymethylphenylsilane (PMPS) containing anthracene units in the polymer backbone (PMPS-AN) has been studied by time-of-flight and electrophotographic measurements. It is found that the hole transport of PMPS-AN is non-dispersive and exhibits thermally activated behavior. The anthracene incorporation to the polymer backbone of PMPS slightly decreases the hole drift mobility of PMPS-AN because of the increase in energetic disorder. In PMPS-AN, the electron transport, which has not been observed in organic polysilanes, is clearly seen. In contrast to the hole transport, the electron transport exhibits anomalous dispersion of the transit times and the electron drift mobility is independent of temperature. It is suggested that the electron transport is due to geometrical disorder of electron hopping sites (anthracene units). From the electrophotographic measurements, we discuss the applicability of PMPS-AN to photoreceptors and estimate the Schubweg of electrons in PMPS-AN.

This paper describes methods used in the design of a high speed burst modem applied for mobile communication systems. The modem has burst mode operations including burst mode AGC (automatic gain control), burst mode BTR (bit timing recovery), adaptive equalization, and diversity based on a selection algorithm to achieve a higher performance in multipath fading channels. Moreover, the performance of the burst modem, which is developed using analog signal processing devices, DSPs (digital signal processors), and FPGAs (field programmable gate arrays), is analyzed experimentally. Results show that the modem can suppress irreducible BER values below 1. 0e-6 and attains a 2 dB implicit diversity gain over multipath fading channels modeled by a two-ray impulse response system with independent Rayleigh fading.

Two new algorithms are introduced, respectively called syndrome erasing and double syndrome decoding, which permit to achieve fast error correction with a wide class of cyclic codes.

One-dimensional Cellular Automata (CA's) are considered as potential pseudorandom pattern generators to generate highly random parallel patterns with simple hardware configurations. A class of linear, binary, and of nearest neighbor (radius = 1) CA's is referred to here as elementary ones. This paper investigates operations of such CA's with fixed boundary conditions when non-null boundary values are applied to them. By modifying transition matrices of elementary CA's to include the influence of boundary values, structures of state transition diagrams are determined.

Comparative performance evaluation between parallel combinatory CDMA (PC-CDMA) and Direct Sequence CDMA (DS-CDMA) has been conducted for high speed radio communication up to 2 Mbps under a multipath Rayleigh fading environment. For both DS-CDMA and PC-CDMA, user information rate per code of 128 kbps, convolutional code with 1/2 coding rate, the same bit interleaving and QPSK data modulation are applied to get transmission symbol rate of 128 ksps. The chip rate of 4. 096 Mcps is used to investigate the possibility of 2 Mbps transmission using only 5 MHz bandwidth. So the spreading factor of the spreading code is 32 for DS-CDMA. In PC-CDMA, 128 ksps data stream is divided into four 32 ksps data streams and according to the every four bits pattern, corresponding spreading code of spreading factor of 128 and its polarity are selected out of eight candidate spreading codes. In soft decision Viterbi decoding applied to PC-CDMA, branch metric is calculated for every bit by weighting the output levels of the PC-CDMA correlators for eight candidate spreading codes. By computer simulation under vehicular environment model with six multipaths, it has been shown that PC-CDMA can offer more capacity approximately by double than DS-CDMA for both downlink and uplink under the condition such as for vehicular for BER of 10-3, and 2 Mbps transmission per cell for downlink is possible not only in isolated cell condition but also in omni cell condition by PC-CDMA.

Future satellite communication systems will be developed at Ka-band (20/30 GHz) owing to the relatively wide frequency allocation and current freedom from terrestrial interference for multimedia services. A serious disadvantage of the Ka-band, however, is the very high atmospheric attenuation in rainy weather. Quasi-synchronous CDMA drastically reduces the effect of self-noise with several interesting features of CDMA for mobile communications such as flexible frequency reuse, the capability of performing soft-handover and a lower sensitivity to interference. This paper evaluates the performance of a quasi-synchronous CDMA return link for a Ka-band geostationary satellite communication system. For a fixed satellite channel whose characteristics depend on weather conditions, the signal envelope and phase for this channel is modeled as Gaussian. The bit error and outage probability, and the detection loss due to imperfect chip timing synchronization is analytically evaluated and the system capacity degradation due to the weather condition is estimated. Two cases of general and worst conditions are evaluated, in which i) rain attenuation ii) nonlinearity of transponder are considered. The two cases consist of the general case in which all users are affected by rainy weather, and the worst case in which only the user of interest, not multiple access interferers, is affected by rain attenuation. The results for the two cases of rainy weather clearly show that quasi-synchronous CDMA eases the power control requirements and has less sensitivity to imperfect power control. When dealing with the impact of the satellite transponder nonlinearity in addition to the rain attenuation, the shift of optimum amplifier operating point is shown so that [Eb/N0]sat, defined as the sum of the Eb/N0 value required to obtain a BER equal to Pb at a given output backoff (OBO) and the value of the OBO itself, tends to decrease, and higher BER impairment is given, since the rain attenuation results in the same effect as the additive input backoff (IBO) at the satellite transponder input. As the BER increases, the optimum [Eb/N0]sat and IBO decrease that result in the shift of optimum operating point.

Unique characteristics such as quenching of photoluminescence and improvement of photovoltaic effect were observed in acceptor polymer, (cyano-substituted poly (p-phenylene vinylene)), CN-PPV/donor polymer (poly(3-hexylthiophene), P3HT composites. By taking account of the difference in electronic energy states of both CN-PPV and P3HT, these characteristics are interpreted in terms of photoinduced charge transfer between CN-PPV and P3HT and formation of fractal network.

We fabricated a tunable and polarization-insensitive arrayed-waveguide grating (AWG) 1616 multiplexer that operates around the wavelength of 1. 55 µm using fluorinated polyimides. The wavelength channel spacing was 0. 8 nm, and the 3-dB passband width was 0. 26 nm. The insertion loss at each channel was from 8 to 12 dB, and the crosstalk was less than -28 dB. The transmission pass wavelength was tuned over a wide range of 6 nm by heating from 24 to 64. The slope of the temperature dependence of the pass wavelength was -0. 15 nm/, which is ten times that of a silica-based multiplexer. Polarization-insensitivity was achieved by fabricating a film AWG multiplexer, which was formed by removing the silicon substrate and annealing at 350. The polarization-dependent wavelength shift was smaller than the spectrum analyzers wavelength resolution of 0. 1 nm.

In order to improve the running durability of organic electroluminescent devices (OELDs), the doping sites of molecular OELDs were optimized, and the frequency responses of the optimized devices were examined for Mg-In/bis (10-hydroxybenzo[h]quinolinate) beryllium (BeBq2)/N, N'-diphenyl-N, N'-(3-methylphenyl)-1, 1'-biphenyl-4, 4'-diamine (TPD)/4, 4', 4"-tris (3-methylphenylphenylamino) triphenylamine (MTDATA)/ITO. The TPD hole transport layer was the optimum doping site for 5, 6, 11, 12-tetraphenylnaphthacene (rubrene) dopant, and a very high efficiency of 13 cd/A at 0. 13 kcd/m2 was obtained for yellow emission. Half-decay times under a constant direct current density of 1. 0 mA/cm2 from an initial luminance of 0. 13 kcd/m2 extended to longer than 26,000 hours. The luminance of the optimized device decreases lineally with respect to the logarithm of the frequency as the frequency increases in the range from 1 kHz to 0. 3 MHz when a square wave with a duty ratio of 50% and a maximum voltage of 5.0 V is applied. A new driving method involving frequency modulation is proposed. This may offer accurate control of pixel luminance, and enable simple driving circuits adapted to highly integrated digital LSI chips, or the concept of system on glass.

The doping effect of acceptor molecule tetracyanoquinodimethane (TCNQ) and donor molecule tetramethyltetraselenafulvalene (TMTSF) in an organic semiconductor was investigated by field effect measurements in merocyanine (MC) films. The electrical conductivity and carrier concentration of TCNQ-doped MC films were increased compared with those of undoped MC film. An efficient doping effect was observed at the doping concentration of approximately 9%. The electrical conductivity, on the other hand, was decreased by doping of the donor molecule TMTSF in MC film. However, no inversion of the conduction type was obtained. Furthermore, the transport mechanism of TCNQ-doped MC film and undoped film was elucidated from the temperature dependence of electrical parameters. These results demonstrate that TCNQ and TMTSF molecules act as acceptor and donor impurities in MC film, respectively, and the doping of these molecules is effective to control the electrical properties of organic semiconductors.

Thin films of PTFE (mean molecular weight of source material 8500) were deposited by ionization-assisted deposition (IAD) method at different ion acceleration voltages Va on substrates kept at room temperature. The molecular chains in the film were found to be oriented in parallel with the substrate, and the film has preferential crystal orientation to (100) plane. Although the ion acceleration did not give significant influence on the film orientation and chemical structure, IAD was effective to improve the surface smoothness. The Cu decoration test revealed that the pinhole density in the film is reduced and the insulating capability is improved by depositing the film at Va = 500 V. The result of dielectric loss measurement for Al/PTFE/Al capacitors was in consistency. However, excessive ion acceleration deteriorated the insulating property, probably due to the dielectric breakdown that occurred in the course of deposition.

In order to develop high-speed ICs, it is important to clarify the relationship between circuit speed and device parameters. An analytical expression for circuit performance is effective for this purpose. This paper describes an analytical toggle frequency expression for Source-Coupled FET Logic (SCFL) frequency dividers. The proposed equation is expressed as the sum of the product of sensitivity coefficients of FET parameters and time constants which are extracted through a small signal transfer function analysis. These sensitivity coefficients are extracted using SPICE simulations. The equation is a simple formula with only five coefficients, which is much smaller than conventional sensitivity analyses. Furthermore, the accuracy of the proposed equation is improved compared to an analytical method based on the small signal transfer function which we previously proposed. The equation can be easily extended to consider interconnection delay time. The calculated maximum toggle frequencies using the equation show good agreement with SPICE simulations and experimental results for a wide gate-length variation range of 0. 12-µm to 0. 24-µm GaAs MESFETs. By re-extraction of another set of sensitivity coefficients, the proposed equation can be widely applied to shorter gate-length GaAs MESFETs and other FET devices such as HEMT devices. The expression clearly shows the relationship between the circuit performance and intrinsic FET parameters. According to the equation, the key parameters for high-speed circuit operation are high transconductance with a low drain conductance, and a low gate-drain capacitance. The equation can be used as a criterion for the optimization of the FET structure to realize high speed circuit performance.

Multicolor light emitting diodes (LEDs) which emit red (R), green (G) and blue (B) light have been realized by stacking a two-color emission part on a single-color emission part. The former part consists of two emissive layers of red and blue light, which can be selected by changing the polarity of applied field. The latter part consists of a single-color emission part which emits green light. The emission from the diode in the whole visible spectral range can be modulated by the combination of applying various voltages to the two-color and to the single-color emission parts, separately.

A novel method for the guided-probe diagnosis of high-performance LSIs containing macrocells, which have no internal netlist essential to the diagnosis, has been developed. In this method, the macrocell netlist is derived from its layout by extracting a leaf-cell-level netlist and is combined with the original one. Logic models for the leaf cells in the extracted netlist are also generated to obtain the logic-simulation data in the macrocells. The logic modeling is extended for application to memory macrocells, based on the idea that analog-behavior leaf cells in the memory macrocells are converted into logically equivalent circuits for logic simulation. Specifically, sense amplifiers and wired-or connections on bit lines are replaced with the corresponding logic-behavior models. The proposed method has been successfully applied to actual design data of LSIs containing macrocells, and it has been verified that it enables fault paths inside macrocells to be accurately traced and that the logic models give good timing resolution in the logic simulation. Using the proposed method, LSIs containing macrocells will be able to be diagnosed regardless of the macrocell types, without the need for a "golden" device, by an electron-beam guided probe system.

This paper presents an acceleration of test points selection for circuits designed by a full-scan based BIST scheme. In order to accelerate the test points selection based on cost minimization, and reflecting random pattern testability, we introduce three techniques, the simultaneous selection of plural test points, the simplified selection of test points by the cost reduction factor, and the reduction of the number of test point candidates. We implement a program based on the proposed techniques and evaluate its efficiency experimentally using large scale circuits (26 k-420 k gates).

The advantage of random testing is that test application can be performed at a low cost in the BIST scheme. However, not all circuits are random pattern testable due to the existence of random pattern resistant faults. In this paper, we present a method for improving the random pattern testability of logic circuits by partial circuit duplication approach. The basic idea is to detect random pattern resistant faults by using the difference between the duplicated part of a circuit and the original part. Experimental results on benchmark circuits show that high fault coverage can be achieved with a very small amount of hardware overhead.

We will present a partial scan design method based on n-fold line-up structures in order to achieve high fault efficiency and reduce test pattern generation time for practical LSIs. We will also present a partial scan design method based on the state justification of pure load/hold FFs in order to achieve high fault efficiency and reduce the number of scan FFs for practical LSIs with lots of load/hold FFs. Experimental results for practical LSIs show that our presented methods can achieve high fault efficiency (more than 99%) and reduce the number of scan FFs for the LSI with lots of load/hold FFs.

This paper presents a new methodology for diagnosing transistor leakage faults in a CMOS circuit by using both IDDQ and logic value information. A hierarchical procedure is used to identify and delete impossible fault candidates efficiently and a procedure is employed to generate diagnostic tests for improving diagnostic resolution. A novel approach for handling the intermediate output voltage of a faulty gate is used in new methods for fault simulation and diagnostic test generation based on primary output values. Experimental results on ISCAS85 circuits show the effectiveness of the proposed methodology.

Three types of ternary decision diagrams (TDDs) are considered: AND -TDDs, EXOR-TDDs, and Kleene-TDDs. Kleene-TDDs are useful for logic simulation in the presence of unknown inputs. Let N(BDD:f), N(AND-TDD:f), and N(EXOR-TDD:f) be the number of non-terminal nodes in the BDD, the AND-TDD, and the EXOR-TDD for f, respectively. Let N(Kleene-TDD:) be the number of non-terminal nodes in the Kleene -TDD for , where is the regular ternary function corresponding to f. Then N(BDD:f) N(TDD:f). For parity functions, N(BDD:f)=N(AND-TDD:f)=N(EXOR-TDD:f)=N(Kleene-TDD:). For unate functions,N(BDD:f)=N(AND-TDD:f). The sizes of Kleene-TDDs are O(3n/n), and O(n3) for arbitrary functions, and symmetric functions, respectively. There exist a 2n-variable function, where Kleene-TDDs require O(n) nodes with the best order, while O(3n) nodes in the worst order.

The logic optimization based on redundancy addition and removal is one of methods which can deal with large-scale logic circuits. In this logic optimization a few redundant elements are added to a logic circuit, and then many other redundant elements which are generated by the redundancy addition are identified and removed. In this paper an optimization method based on redundancy addition and removal using implication relations is proposed. The advantage of the proposed method is to identify removable redundant elements with short time, because the proposed method directly identifies redundant elements using implication relations from two illegal signal assignments which are produced by redundancy addition. The experimental results compared this method with another method show that this method is faster than the another method without declining the optimization ability.