An extended harmonic disturbance observer is designed for speed (or position) sensorless current control of DC motor subject to a biased sinusoidal disturbance and parameter uncertainties. The proposed method does not require the information on the mechanical part of the motor equation. Theoretical analysis via the singular perturbation theory is performed to verify that the feedforward compensation using the estimation can improve the robust transient performance of the closed-loop system. A stability condition is derived against parameter uncertainties. Comparative experimental results validate the robustness of the proposed method against the uncertainties.

We describe a calculation tool and modeling methods to find self and mutual inductance and current distribution in superconductive multilayer circuit layouts. Accuracy of the numerical solver is discussed and compared with experimental measurements. Effects of modeling parameter selection on calculation results are shown, and we make conclusions on the selection of modeling parameters for fast but sufficiently accurate calculations when calibration methods are used. Circuit theory for the calculation of branch impedances from the output of the numerical solver is discussed, and compensation for solution difficulties is shown through example. We elaborate on the construction of extraction models for superconductive integrated circuits, with and without resistive branches. We also propose a method to calculate current distribution in a multilayer circuit with multiple bias current feed points. Finally, detailed examples are shown where the effects of stacked vias, bias pillars, coupling, ground connection stacks and ground return currents in circuit layouts for the AIST advanced process (ADP2) and standard process (STP2) are analyzed. We show that multilayer inductance and current distribution extraction in such circuits provides much more information than merely branch inductance, and can be used to improve layouts; for example through reduced coupling between conductors.

Maneuvering target tracking under mixed line-of-sight/non-line-of-sight (LOS/NLOS) conditions has received considerable interest in the last decades. In this paper, a hierarchical interacting multiple model (HIMM) method is proposed for estimating target position under mixed LOS/NLOS conditions. The proposed HIMM is composed of two layers with Markov switching model. The purpose of the upper layer, which is composed of two interacting multiple model (IMM) filters in parallel, is to handle the switching between the LOS and the NLOS environments. To estimate the target kinetic variables (position, speed and acceleration), the unscented Kalman filter (UKF) with the current statistical (CS) model is used in the lower-layer. Simulation results demonstrate the effectiveness and superiority of the proposed method, which obtains better tracking accuracy than the traditional IMM.

A connector model expressed as an inductance is proposed for use in a previously reported common-mode antenna model. The common-mode antenna model is an equivalent model for estimating only common-mode radiation from a printed circuit board (PCB) more quickly and with less computational resources than a calculation method that fully divides the entire structure of the PCB into elemental cells, such as narrow signal traces and thin dielectric layers. Although the common-mode antenna model can estimate the amount of radiation on the basis of the pin configuration of the connector between two PCBs, the calculation results do not show the peak frequency shift in the radiation spectrum when there is a change in the pin configuration. A previous study suggested that the frequency shift depends on the total inductance of the connector, which led to the development of the connector model reported here, which takes into account the effective inductance of the connector. The common-mode antenna model with the developed connector model accurately simulates the peak frequency shift caused by a change in the connector pin configuration. The results agree well with measured spectra (error of 3 dB).

Virtualization is no longer an emerging research area since the virtual processor and memory operate as efficiently as the physical ones. However, I/O performance is still restricted by the virtualization overhead caused by the costly and complex I/O virtualization mechanism, in particular by massive exits occurring on the guest-host switch and redundant processing of the I/O stacks at both guest and host. A para-virtual device driver may reduce the number of exits to the hypervisor, whereas the network stacks in the guest OS are still duplicated. Previous work proposed a socket-outsourcing technique that bypasses the redundant guest network stack by delivering the network request directly to the host. However, even by bypassing the redundant network paths in the guest OS, the obtained performance was still below 60% of the native device, since notifications of completion still depended on the hypervisor. In this paper, we propose vCanal, a novel network virtualization framework, to improve the performance of network access in the virtual machine toward that of the native machine. Implementation of vCanal reached 96% of the native TCP throughput, increasing the UDP latency by only 4% compared to the native latency.

Patch clamp measurement technique is one of the most important techniques in the field of electrophysiology. The elucidation of the channels, nerve cells, and brain activities as well as contribution of the treatment of neurological disorders is expected from the measurement of ion current. A current-to-voltage converter, which is the front end circuit of the patch clamp measurement system is fabricated using 0.18µm CMOS technology. The current-to-voltage converter requires a resistance as high as 50MΩ as a feedback resistor in order to ensure a high signal-to-noise ratio for very small signals. However, the circuit becomes unstable due to the large parasitic capacitance between the poly layer and the substrate of the on-chip feedback resistor and the instability causes the peaking at lower frequency. The instability of a current-to-voltage converter with a high-resistance as a feedback resistor is analyzed theoretically. A compensation circuit to stabilize the amplifier by driving the N-well under poly resistor to suppress the effect of parasitic capacitance using buffer circuits is proposed. The performance of the proposed circuit is confirmed by both simulation and measurement of fabricated chip. The peaking in frequency characteristic is suppressed properly by the proposed method. Furthermore, the bandwidth of the amplifier is expanded up to 11.3kHz, which is desirable for a patch clamp measurement. In addition, the input referred rms noise with the range of 10Hz ∼ 10kHz is 2.09 Arms and is sufficiently reach the requirement for measure of both whole-cell and a part of single-channel recordings.

One of the patterns that the design of parallel file systems has to solve stems from the difficulty of handling the metadata-intensive I/O generated by parallel applications accessing a single large directory. We demonstrate a middleware design called SFS to support existing parallel file systems for distributed and scalable directory service. SFS distributes directory entries over data servers instead of metadata servers to offer increased scalability and performance. Firstly, SFS exploits an adaptive directory partitioning based on extendible hashing to support concurrent and unsynchronized partition splitting. Secondly, SFS describes an optimization based on recursive split-ordering that emphasizes speeding up the splitting process. Thirdly, SFS applies a write-optimized index structure to convert slow, small, random metadata updates into fast, large, sequential writes. Finally, SFS gracefully tolerates stale mapping at the clients while maintaining the correctness and consistency of the system. Our performance results on a cluster of 32-servers show our implementation can deliver more than 250,000 file creations per second on average.

A high frequency approximation method is proposed to obtain the scattering from rectangular dielectric cuboids. Our formulation is based on a Kirchhoff type aperture integration of the equivalent current sources over the surface of the scattering bodies. The derived formulae have been used to get the radar cross section of cuboids, and the results are compared with those by other methods, such as physical optics, geometrical theory of diffraction, the HFSS simulation and measurements. Good agreement has been observed to confirm the validity of our method.

This paper presents new Binary Converters (or current-mode compressors) by the usage of carbon nanotube field effect transistors. The new designs are made of three parts: 1) the input currents which are converted to voltage; 2) threshold detectors; and 3) the output current flow paths. In addition, an 8×8-bit multiplier is considered as a bench mark to estimate their efficiency degrees. The first approach is based on high-order Binary Converters, and the second one is only composed of 4BCs and Half Adders.

To investigate electrostatic discharge (ESD) immunity testing for wearable electronic devices, the worst scenario i.e., an ESD event occurs when the body-mounted device approaches a grounded conductor is focused in this paper. Discharge currents caused by air discharges from a charged human through a hand-held metal bar or through a semi-sphere metal attached to the head, arm or waist in lieu of actual wearable devices are measured. As a result, it is found that at a human charge voltage of 1kV, the peak current from the semi-sphere metal is large in order of the attachment of the waist (15.4A), arm (12.8A) and head (12.2A), whereas the peak current (10.0A) from the hand-held metal bar is the smallest. It is also found that the discharge currents through the semi-sphere metals decrease to zero at around 50ns regardless of the attachment positions, although the current through the hand-held metal bar continues to flow at over 90ns. These discharge currents are further characterized by the discharge resistance, the charge storage capacitance and the discharge time constant newly derived from the waveform energy, which are validated from the body impedance measured through the hand-held and body-mounted metals. The above finding suggests that ESD immunity test methods for wearable devices require test specifications entirely different from the conventional ESD immunity testing.

A novel dynamic element matching (DEM) method, called binary-tree random DEM (BTR-DEM), is presented for a Nyquist-rate current-steering digital-to-analog converter (DAC). By increasing or decreasing the number of unit current sources randomly at the same time, the BTR-DEM encoding reduces switch transition glitches. A 5-bit current-steering DAC with the BTR-DEM technique is implemented in a 65-nm CMOS technology. The measured spurious free dynamic range (SFDR) attains 42 dB for a sample rate of 100 MHz and shows little dependence on signal frequency.

This paper describes the circuit design and measurement results of a new GaAs-HBT RF power detector proposed for use in WiMAX and wireless LAN transmitter applications. The detector, which is based on a simple current-mirror topology, occupies a small die area. It is, therefore, not only easy to implement together with a GaAs-HBT power amplifier, but can also offer approximately logarithmic (linear-in-dB) characteristics. Because it can also be driven with small voltage amplitudes, it is suitable for base-terminal monitoring at an HBT power stage. When the detector is used as a base-terminal power monitor, an appropriate base resistance added to the detection HBT effectively suppresses frequency dispersion of the detected voltage characteristics. Measurements of a prototype detector incorporated into a single-stage HBT power amplifier fabricated on the same die are as follows. The detector is capable of delivering a detected voltage of 0.35-2.5 V with a slope of less than 0.17 V/dB over a 4-to-24-dBm output power range at 3.5 GHz while drawing a current of less than 1.8 mA from a 2.85-V supply. While satisfying a log conformance error of less than 1 dB over an amplifier output power range from 4 dBm to 24 dBm, it can also suppress the detected power dispersion within 0.18 dB at approximately 15 dBm of output power over a 3.1-3.9-GHz-wide frequency range. This dispersion value is approximately one-tenth that of a conventional collector-terminal-monitor-type diode detector.

In this paper, a new single soft switched forward converter with a self driven synchronous rectification (SDSR) is introduced. In the proposed converter, a soft switching condition (ZCS turn on and ZVS turn off) is provided for the switch, by an auxiliary circuit without any extra switch. In additional, this auxiliary circuit does not impose high voltage or current stresses on the converter. Since the proposed converter uses SDSR to reduce conductive loss of output rectifier, the rectifier switches are switched under soft switching condition. So, the conductive and switching losses on the converter reduce considerably. Also, implementing control circuit of this converter is very simple, due to the self-driven method employed in driving synchronous rectification and the converter is controlled by pulse width modulation (PWM). The experimental results of the proposed converter are presented to confirm the theoretical analysis.

Radio channel modeling is fundamental for designing wireless communication systems. In millimeter or sub-millimeter wave short range communication, shadowing effect by electrically-large objects is one of the most important factors determining the field strength and thus the coverage. Unfortunately, numerical methods like MoM, FDTD, FEM are unable to compute the field scattered by large objects due to their excessive time and memory requirements. Ray theory like geometrical theory of diffraction (GTD) by Keller is an effective and popular solution but suffers various kinds of singularities at geometrical boundaries such as incidence shadow boundary (ISB) or reflection shadow boundary (RSB). Modified edge representation (MER) equivalent edge current (EEC) is an accurate and a fast high frequency diffraction technique which expresses the fields in terms of line integration. It adopts classical Keller-type knife-edge diffraction coefficients and still provides uniform and highly accurate fields everywhere including geometrical boundaries. MER is used here to compute the millimeter-wave field distribution in compact range communication systems where shadowing effects rather than multi-path ones dominate the radio environments. For further simplicity, trigonometric functions in Keller's diffraction coefficients are replaced by the path lengths of source to the observer via the edge point of integration of the scatterers in the form of Fresnel zone number (FZN). Complexity, Computation time and the memory were reduced drastically without degrading the accuracy. The dipole wave scattering from flat rectangular plates is discussed with numerical examples.

This paper describes 0.8-/1.5-GHz-band GaAs-HBT power amplifier modules with a newly designed analog bias control scheme. This scheme has two features. One is to achieve approximately linear quiescent current control using not a BiFET process but only the usual HBT process. The other is to help improve linearity under reduced supply voltage and lower quiescent current operation. The following two key techniques are incorporated into the bias scheme. The first is to employ two different kinds of bias circuits: emitter follower bias and current injection bias. The second is the unique current injection bias block, based on the successful combination of an input buffer with an emitter resistance load and a current mirror. These techniques allow quiescent current control that is almost proportional to an externally applied analog control voltage. To confirm the effectiveness of the scheme, 0.8-GHz-band and 1.5-GHz-band power amplifier modules were designed and fabricated using the usual HBT process. Measurements conducted under the conditions of a 3.4V supply voltage and an HSDPA WCDMA modulated signal are as follows. The 0.8-GHz-band amplifier can deliver a 28-dBm output power (Pout), a 28.4-dB power gain (Gp), and 42% PAE while restricting the ACLR to less than -40dBc. For the 1.5-GHz-band amplifier, 28dBm of Pout, 29dB of Gp, and 41% of PAE are obtained with the same ACLR levels. The measurements also confirm that the quiescent current for the second stage in the amplifiers is approximately linearly changed from 14mA to 58mA over a control voltage ranging from 1.1V to 2.2V. In addition, our measured DG.09-based current dissipation with both supply voltage and analog bias controls is as low as 16.9mA, showing that the analog bias control scheme enables an average current reduction of more than 20%, as compared to a conventional supply voltage and two-step quiescent current control.

This paper provides a method based on electromagnetic (EM) analysis to predict conducted currents in the bulk current injection (BCI) test system for automotive components. The BCI test system is comprised of an injection probe, equipment under test (EUT), line impedance stabilization networks (LISNs), wires and an electric load. All components are modeled in full-wave EM analysis. The EM model of the injection probe enables us to handle multi wires. By using the transmission line theory, the BCI setup model is divided into several parts in order to reduce the calculation time. The proposed method is applied to an actual BCI setup of an automotive component and the simulated common mode currents at the input terminals of EUT have a good accuracy in the frequency range of 1-400MHz. The model separation reduces the calculation time to only several hours.

As semiconductor manufacturing processing scaling down, leakage current of CMOS circuits is becoming a dominant contributor to power dissipation. This paper provides an efficient leakage current reduction (LCR) technique for low-power and low-frequency circuit designs in terms of design rules and layout parameters related to layout dependent effects. We address the LCR technique both for analog and digital circuits, and present a design case when applying the LCR techniqe to a successive-approximation-register (SAR) analog-to-digital converter (ADC), which typically employs analog and digital transistors. In the post-layout simulation results by HSPICE, an SAR-ADC with the LCR technique achieves 38.6-nW as the total power consumption. Comparing with the design without the LCR technique, we attain about 30% total energy reduction.

Novel multi-band mixers that can receive multiple band signals concurrently are proposed and evaluated. The mixers achieve independent gain control through novel relative power control method of the multiple local oscillator (LO) signals. Linear control is also achieved through multiple LO signal input with total LO power control. Theoretical analysis shows that odd-order nonlinearity components of the multiple LO signals support linear conversion gain control. Dual- and triple-band tests are conducted using typical three MOSFET mixers fabricated by a 0.25 µm SiGe BiCMOS process. Measurements confirm over 40 dB independent control of conversion gain, linear control achieved through LO input power control. The proposed mixers have high input linearity with a 5 dBm output third intercept point. A method is also proposed to reduce interference caused by mixing between multiple LO signals.

A current mode buck/boost DC-DC converter with automatic mode transition is presented in this paper. At heavy load, a control scheme adaptively changes operation mode between peak and valley current modes to achieve high efficiency, small output voltage ripple, and fast transient response. The switching loss is reduced by operating in pure modes, and the conduction loss is reduced by decreasing the average inductor current in transition modes. At light load, the equivalent switching frequency is decreased to reduce the switching loss. An automatic mode transition between heavy load PWM mode and light load PFM mode is achieved by introducing an average load current sensing method. The converter has been implemented with a standard 0.5,$mu$m CMOS process. The output voltage ripple is less than 10,mV in all modes, and the peak efficiency is 95%.

An imbalance difference model has been developed to estimate the common-mode radiated emission of a PCB with an attached cable. This model, however, requires significant computation time for full-wave simulation, especially if the attached cable is long, even with a powerful computer configuration. To solve this problem, a method that approximates the imbalance difference model as an equivalent asymmetrical dipole antenna is proposed in this paper. The common-mode radiated emission can be predicted using a line integration of the common-mode current distribution which is directly estimated by the asymmetrical antenna model. Unlike existing methods, the proposed method avoids the circuit construction normally used to measure the common-mode current, and is still able to accurately predict the maximum common-mode radiation. The effectiveness of the proposed method is verified by comparing the predicted results with the 3D full-wave simulation and the measured data gathered in an anechoic chamber.