This paper reports on clich and related mechanisms appearing in a process of human design of software. During studies on human design knowledge, the authors found frequent instance of same pattern of detailing, named clich. In our study, clich is an intermediate level of design knowledge, during a hierarchical detailing step, residing in between simple reuse and creation by micro design rules, which have already been reported. These three kinds of design knowledge are of various types and have different complexities. Discussions on them, focusing on clich type, with procedures of formation of a simple clich skeleton and generation of a clich are given. The studies show a working model of Zipf's principle, and are some trials to reveal a more detail of human designs.

In this paper, we propose a method to reconstruct current distributions in the human brain from neuromagnetic measurements. The proposed method is based on the weighted lead-field synthetic (WLFS) filtering technique with the weighting factors calculated from the results of previous source space scanning. In this method, in addition to the depth normalization technique, weighting factors of the WLFS are determined by the cost values previously calculated based on the multiple signal classification (MUSIC) scan. We performed computer simulations of this method under noisy measurement conditions and compared the results to those obtained with the conventional WLFS method. The results of the simulations indicate that the proposed method is effective for the reconstruction of the current distributions in the human brain using magnetoencephalographic (MEG) measurements, even if the signal-to-noise ratio of the measured data is relatively low. We applied the proposed method to the magnetoencephalographic data obtained during a mental image processing task that included object recognition and mental rotation operations. The results suggest that the proposed method can extract the neural activity in the extrastriate visual region and the parietal region. These results are in agreement with the results of previous positron emission tomography (PET) and functional magnetic resonance imaging (fMRI) studies.

We have introduced the first electronic cash scheme with unconditional security. That is, even malicious users with unlimited computational ability cannot forge a coin and cannot change user's identity secretly embedded in each coin. While, the spender's anonymity is preserved by our new blind signature scheme based on unconditionally secure signature proposed in [7]. But the anonymity is preserved only computationally under the assumption that Decisional Diffie-Hellman Problem is intractable.

There were researches that measured effort required to understand and adapt components based on the complexity of the component, which is some general criterion related to the intrinsic quality of the component to be adapted and understood. They, however, don't consider significance of the measurement attributes and user must decide reusability of similar components for himself. Therefore, in this paper, we propose a new method that can measure the DOR (Degree Of Reusability) of the components by considering the significance of the measurement attributes. We calculates the relative significance of them by using rough set and integrate the significance with the measurement value by using Sugeno's fuzzy integral. Lastly, we apply our method to the source code components and show through statistical technique that it can be used as the ordinal and ratio scale.

In this paper we discuss how one can delegate his power to authenticate or sign documents to others who, again, can delegate the power to someone else. A practical cryptographic solution would be to issue a certificate that consists of one's signature. The final verifier checks verifies the chain of these certificates. This paper provides an efficient and provably secure scheme that is suitable for such a delegation chain. We prove the security of our scheme against an adaptive chosen message attack in the random oracle model. Though our primary application would be agent systems where some agents work on behalf of a user, some other applications and variants will be discussed as well. One of the variants enjoys a threshold feature whereby one can delegate his power to a group so that they have less chance to abuse their power. Another application is an identity-based signature scheme that provides faster verification capability and less communication complexity compared to those provided by existing certificate-based public key infrastructure.

The reverse link signal power required for multimedia traffic in multipath faded single-code (SC-) and multi-code CDMA (MC-CDMA) systems is investigated. The effect of orthogonality loss among multiple spreading code channels is characterized by introducing the orthogonality factor. The required signal power in both CDMA systems is analyzed with varying system parameters of spreading bandwidth, the orthogonality factor, and the number of spreading codes. Analytical results show that MC-CDMA users transmitting only a single traffic type require significantly more power than SC-CDMA users with only a single traffic type. On the other hand, MC-CDMA users transmitting multimedia traffic require power levels approximately identical to SC-CDMA users with multimedia traffic.

In Chirp-Pulse Microwave Computed Tomography (CP-MCT) the images are affected by the blur which is inherent to the measurement principle and is described by a space-variant Point Spread Function (PSF). In this paper we investigate the PSF of CP-MCT including the space dependence both experimentally and computationally. The experimental evaluation is performed by measuring the projections of a target consisting of a thin low-loss dielectric rod surrounded by a saline solution and placed at various positions in the measuring region. On the other hand, the theoretical evaluation is obtained by computing the projections of the same target via a numerical solution of Maxwell's equations. Since CP-MCT uses a chirp signal, the numerical evaluation is carried out by the use of a FD-TD method. The projections of the rod could be obtained by computing the field during the sweep time of the chirp signal for each position of the receiving antenna. Since this procedure is extremely time consuming, we compute the impulse response function of the system by exciting the transmitting antenna with a wide-band Gaussian pulse. Then the signal transmitted in CP-MCT is obtained by computing the convolution product in time domain of the input chirp pulse with the impulse response function of the system. We find a good agreement between measured and computed PSF. The rationality of the computed PSF is verified by three distinct ways and the usefulness of this function is shown by a remarkable effect in the restoration of CP-MCT images. Knowledge on the space-variant PSF will be utilized for more accurate image deblurring in CP-MCT.

In this paper a different view on Viterbi's method for the estimation of the reverse link capacity of a single cell of CDMA based mobile communications systems is given. Viterbi's approach is well-known and of great importance for the capacity estimation. However, the interpretation of Viterbi's result on the system capacity is not that clear. Thus, we introduce a new approach giving accurate reasons for Viterbi's capacity estimation. When neglecting the noise power, both methods provide nearly the same result. We conclude that Viterbi's finding relates to the average capacity, which is an important statistical parameter. However, we should note that this average capacity will be not available all the time. The improvements discussed in this paper focus on the specification of a certain reliability about the availability of the average capacity.

This paper addresses the problem to extract moving object from the moving background in the mixed domain (MixeD), which makes it possible to carry the filtering in one dimension. Since the velocities of moving object and background are necessary for moving object extraction, we first estimate the velocities based on the appropriate spatial frequency point selection method in the MixeD. Then an optimal filter used for 1-D signal filtering is designed. By filtering 1-D signals over all spatial frequencies, signals with certain velocity vector are extracted, while the extracted image is obtained by applying the 2-D IDFT to the filtered signals. The simulation results show that the method can extract moving object based both on the correctly estimated velocity and the proposed optimal 1-D filter.

This paper presents an application-specific, heterogeneous multiprocessor synthesis system, named HeMPS, that combines a form of Evolutionary Computation known as Differential Evolution with a scheduling heuristic to search the design space efficiently. We demonstrate the effectiveness of our technique by comparing it to similar existing systems. The proposed strategy is shown to be faster than recent systems on large problems while providing equivalent or improved final solutions.

Reverse link performance analyses of single-code (SC) and multi-code (MC) CDMA systems in multipath fading environments are presented. The degree of orthogonality loss among multiple spreading code channels is characterized by introducing the orthogonality factor. This factor depends on the multipath delay power profiles of the propagation channel and the number of paths resolved at a Rake receiver. The link capacity and the signal power of both CDMA systems are then analyzed according to varying system parameters, including spreading bandwidth, traffic load, the orthogonality factor, and the number of spreading codes assigned to a user. Analytical results show that the SC-CDMA system provides a larger link capacity and MC users require more power than SC users. The dominant parameters affecting the performance difference are the spreading bandwidth and multipath delay power profiles.

The concept of stochastic association has originally been proposed in relation to single-electron devices having stochastic behavior due to quantum effects. Stochastic association is one of the promising concepts for future VLSI systems that exceed the conventional digital systems based on deterministic operation. This paper proposes a CMOS stochastic associative processor using PWM (pulse-width modulation) chaotic signals. The processor stochastically extracts one of the stored binary patterns depending on the order of similarity to the input. We confirms stochastic associative processing operation by experiments for digit pattern association using the CMOS test chip.

The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.

This paper aims to provide a robust multiuser detection structure that adaptively tracks signature waveform distortion for CDMA multipath signals. In practical wireless environment, multipath fading leads to signature waveform distortion that severely degrades the performance of the linear multiuser detectors (LMDs) designed by exploiting the original signature waveform. In what follows, an iterative algorithm is proposed to track the signature waveform perturbation. The rationale of adaptive processing is based on the subspace method and the Minimum Variance Distortionless Response (MVDR) beamforming concept. Performance evaluation reveals that the proposed adaptive multiuser detection structure reduces the impact of signature waveform perturbation on the performance of the LMDs to a great extent. Moreover, the proposed iterative algorithm is near-far resistant since both the subspace method and the MVDR beamforming technique are energy independent to the interferers.

An automated analog circuit synthesis based on reuse of topological features of 'prototype circuits' is proposed. The prototype circuits are designed by humans and suggested to the synthesis system as hints of configurations of new analog circuits to be synthesized by the system. The connections of elements in analog circuits are not generally systematic, but they would have some similarities to a circuit which has similar behaviors or functionalities. In the proposed process, the information on circuit connections is stored as sub-circuits extracted from the prototype circuits. And then, genetic algorithm is used to search for an optimum combination of the sub-circuits that achieves the desired electronic specifications. The combinations of sub-circuits are performed with a novel technique where the terminals of the sub-circuits are shared. The capabilities of the proposed method are demonstrated through an example of the synthesis.

In this paper, a design of Programmable Logic Device (PLD) and a synthesis approach are proposed. Our PLD is derived from traditional Programmable Logic Array (PLA). The key extension is that programmable AND devices in PLA is replaced by Look-Up Tables (LUTs). A series of cascaded LUTs in the array can generate more complex terms, which we call generalized complex terms (GCTs), than product terms. In order to utilize the capability, a synthesis approach to map a given function into the array is also proposed. Our approach generates a expression of the sum of GCTs aiming to minimize the number of terms. A number of experimental results demonstrate that the number of terms for our PLD generated by our approach is 14.9% fewer than that by an existing approach. We design our PLD based on a fundamental unit named nGCT cell which can be used as LUTs in multiple sizes or random access memories. Implementation of the PLD based on a fundamental unit named nGCT cell which can be used as LUTs or random access memories is also described.

In this paper, we present an RTL design-space exploration method for high-level applications. We formulate the RTL design-space exploration into a performance-driven module selection problem. We devise a dynamic-programming algorithm to solve the problem. We present an exploration flow by integrating commercial synthesis and layout tools with our proposed method. Experimental results have demonstrated that generating AT-curve for all modules is the most time consuming task in the design-space exploration process. Using the proposed 3-point AT projection approach, our method can achieve on an average of 80% speed-up in run time and 90% accuracy in design estimation.

We propose a transistor sizing method that downsizes MOSFETs inside a cell to eliminate redundancy of cell-based circuits as much as possible. Our method reduces power dissipation of detail-routed circuits while preserving interconnects. The effectiveness of our method is experimentally evaluated using 3 circuits. The power dissipation is reduced by 75% maximum and 60% on average without delay increase. Compared with discrete cell sizing, the proposed method reduces power dissipation furthermore by 30% on average.

This letter proposes a hardware/software partitioning algorithm for digital signal processor cores with two register files. Given a compiled assembly code and a timing constraint of execution time, the proposed algorithm generates a processor core configuration with a new assembly code running on the generated processor core. The proposed algorithm considers two register files and determines the number of registers in each of register files. Moreover the algorithm considers two or more types of functional units for each arithmetic or logical operation and assigns functional units with small area to a processor core without causing performance penalty. A generated processor core will have small area compared with processor cores which have a single register file or those which consider only one type of functional units for each operation. The experimental results demonstrate the effectiveness and efficiency of the proposed algorithm.

In this paper, we propose a unified high-radix division algorithm for high-speed signal and data processing applications, and present the design and evaluation of high-radix parallel dividers based on the proposed algorithm. By prescaling the input operands and converting some significant digits of a partial remainder into non-redundant representation, the quotient digit can be obtained directly from the partial remainder without using quotient digit selection tables. Performance evaluation shows that the proposed radix-4 and radix-8 divider architectures achieve faster computation with the same level of hardware complexity than the binary counterparts. We also show an experimental fabrication of a radix-4 divider chip in 0.35 µm CMOS technology.