A new design hierarchy in TCAD is discussed with emphasis on a design of IC interconnects and gate patterns. Two design methodologies for gate patterns at a CMOS cell level and multilevel interconnect scheme at a chip level are proposed. This approach generates the layout design rules of gate patterns, considering the fabrication process and pattern layout dependency, and allows a design of multilevel interconnect scheme at the initial phase of technology development.

A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.

From our previous studies, we derived the worst case cell delay within an ATM switch and thus can find the worst case end-to-end delay for a set of real-time connections. We observed that these delays are sensitive to the priority assignment of the connections. With a better priority assignment scheme within the switch, the worst case delay can be reduced and provide a better network performance. We extend our previous work on the closed form analysis to conduct more experimental study of how different priority assignments and system parameters may affect the performance. Furthermore, from our worst case delay analysis on a regulated ATM switch, network traffic can be smoothed by a leaky bucket at the output controller for each connection. With the appropriate setting on the leaky bucket parameter, the burstiness of the network traffic can be reduced without increasing the delay in the switch. Therefore, fewer buffers will be required for each active connection within the switch. In this paper, our experimental results have shown that the buffer requirement can be reduced up to 5.75% for each connection, which could be significant, when hundreds of connections are passing through the switches within a regulated ATM network.

This paper discusses the classification of targets buried in the underground by radar polarimetry. The subsurface radar is used for the detection of objects buried beneath the ground surface, such as gas pipes, cables and cavities, or in archeological exploration operation. In addition to target echo, the subsurface radar receives various other echoes, because the underground is inhomogeneous medium. Therefore, the subsurface radar needs to distinguish these echoes. In order to enhance the discrimination capability, we first applied the polarization anisotropy coefficient to distinguish echoes from isotropic targets (plate, sphere) versus anisotropic targets (wire, pipe). It is straightforward to find the man-made target buried in the underground using the polarization anisotropy coefficient. Second, we tried to classify targets using the polarimetric signature approach, in which the characteristic polarization state provides the orientation angle of an anisotropic target. All of these values contribute to the classification of a target. Field experiments using an ultra-wideband (250 MHz to 1 GHz) FM-CW polarimetric radar system were carried out to show the usefulness of radar polarimetry. In this paper, several detection and classification results are demonstrated. It is shown that these techniques improve the detection capability of buried target considerably.

In practical logic design circuits are built by composing certain types of gates. Each gate itself is a simple circuits with one, two or three inputs and one output, which implements an elementary logic function. These functions are called the generators. For the general purpose the set of generators is considered to be functionally complete, i. e. , it is able to express any logic function under chosen rules compositions. A basis is a functionally complete set of logic functions that contains no complete proper subset. Providing compactness and expressibility of the generators the notion of a basis, however, ignores the optimality of implementations. Efficiently irreducible generating set, termed ε-basis, is an irreducible set of generators which guarantees an optimal implementation of every function, with respect to the number of literals in its formal expression. The notion of ε-basis is significant in the composition of functions, since the classical definition of basis does not consider the efficiency of implementation. In case of Boolean functions, for two-input (dyadic) generators it has been shown that an ε-basis consists of all monadic functions, constants, and only two dyadic functions from certain classes. In this paper, expanding the domain of basic operations from dyadic to triadic, we study the efficiency of sets of 3-input gates as generators. This expansion decreases the complexity of functions (hence, the complexity of functional circuits to be designed). Gaining an evident merit in the complexity, we have to pay a price by a considerable increase of the number of such generators for the multiple valued circuits. However, in the case of Boolean operations this number is still very small, and it will certainly be useful to consider this approach in the practical circuit design. This paper provides a criterion for a generating set of triadic operations of k-valued logic to be efficiently irreducible. In the case of Boolean functions it is shown that there exist exactly five types of classes of triadic operations which constitute an ε-basis. A typical example of generator set which forms a triadic ε-basis, is also shown.

This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constant-coefficient multipliers.

A new method of designing a microphone array with two outputs preserving binaural information is proposed in this paper. This system employs adaptive beamforming using multiple constraints. The binaural cues may be preserved in the two outputs by use of these multiple constraints with simultaneous beamforming to enhance target signals is also available. A computer simulation was conducted to examine the performance of the beamforming. The results showed that the proposed array can perform both the generation of the binaural cues and the beamforming as intended. In particular, beamforming with double-constraints exhibits the best performance; DI is around 7 dB and good interchannel (interaural) time/phase and level differences are generated within a target region in front. With triple-constraints, however, the performance of the beamforming becomes poorer while the binaural information is better realized. Setting of the desired responses to give proper binaural information seems to become critical as the number of the constraints increases.

An Acoustic echo canceller has problems adaptating under noisy or double-talk conditions. The adaptation process requires a precise identification of the temporarily changed room impulse response. To do this, both minimizing the step size parameter of the Least Mean Square (LMS) method to be as small as possible and giving up on updating the adaptive filter coefficients have been considered. This paper describes an adaptive cross-spectral technique that is robust to adaptive filtering under noisy or double-talk conditions and for colored signals such a speech signal. The cross-spectral technique was originally developed to measure the impulse response in a linear system. Here we apply in the adaptive cross-spectral technique to solve the acoustic echo cancelling problem. This cross-spectral technique takes the ensemble average of the cross spectrum between input and error signals and the averaged cross spectrum is divided by the averaged power spectrum of the input signal to update the filter coefficients. We have confirmed that the echo signal is suppressed by about 15 dB even under double-talk conditions. We also explain that this method has a systematic error due to using a short time block for estimating the room impulse response. Then we investigate overlapping every last half block by the following first half block in order to reduce the effect of the systematic error. Finally, we compare our method with the Frequency-domain Block LMS (FBLMS) method because both methods are implemented in the frequency domain using a short time block.

A compact new test structure using shift register circuits for extracting components of the capacitance matrix of the multi-layer interconnections has been proposed. An extraction method of the capacitance matrix is also presented. As a result of fabrication, capacitance values obtained by measurement are in good agreement with the numerical calculation. We also showed an estimation method of the measurement errors.

This paper proposes an adaptive microphone array using blind deconvolution. The method realizes an signal enhancement based on the combination of blind deconvolution, synchronized summation and DSA (Delay-and-Sum Array) method. The proposed method improves performance of estimation by the iterative operation of blind deconvolution using a cost-function based on the coherency function.

In highly reliable communication network design, disjoint paths between pairs of nodes are often needed in the design phase. The problem of finding k paths which are as diverse as possible and have the lowest total cost is called a k-best paths problem. We propose an algorithm for finding the k-best paths connecting a pair of nodes in a graph G. Graph extension is used to transfer the k-best paths problem to a problem which deploits well-known maximum flow (MaxFlow) and minimum cost network flow (MCNF) algorithms. We prove the k-best paths solution of our algorithm to be an optimal one and the time complexity is the same as MCNF algorithm. Our computational experiences show that the proposed algorithm can solve k-best paths problem for a large network within reasonable computation time.

This paper proposes a new robust adaptive beamformer applicable to microphone arrays. The proposed beamformer is a generalized sidelobe canceller (GSC) with a variable blocking matrix using coefficient-constrained adaptive filters (CCAFs). The CCAFs, whose common input signal is the output of a fixed beamformer, minimize leakage of the target signal into the interference path of the GSC. Each coefficient of the CCAFs is constrained to avoid mistracking. In the multiple-input canceller, leaky adaptive filters are used to decrease undesirable target-signal cancellation. The proposed beamformer can allow large look-direction error with almost no degradation in interference-reduction performance and can be implemented with a small number of microphones. The maximum allowable look-direction error can be specified by the user. Simulation results show that the proposed beamformer, when designed to allow about 20of look-direction error, can suppress interference by more than 17 dB.

We have investigated the operation of a reflection type magnetostatic wave signal-to-noise enhancer in detail. It has good enhancement characteristics, low insertion loss, and low operating power. It is also composed of a transducer using a ceramic substrate having a high dielectric constant and an LaGa-YIG film with low saturation magnetization to enable direct operation in the 400-MHz band (the IF band of current DBS receivers). Enhancement of 8 dB was achieved over a 40-MHz bandwidth. Although its operating frequency range depends critically on device temperature, we can compensate for the temperature dependence by adjusting the bias magnetic field. Experiments showed that the enhancer improved the received carrier-to-noise ratio by 2 to 3 dB, providing good noise reduction in DBS reception.

In order that the speech recognition system might have a high performance in the noisy environment, the directional microphone arrays at the input of the system have been broadly investigated. The purpose of this study is to develop a new wide-band directional microphone system in view of advancing to an adaptive one afterwards. In the proposed system, three microphones are arranged on a straight line and the beamforming is accomplished in such a way that the output value of the middle microphone is added to the integrated value of the difference between two microphones at both sides. In this study, the signal processing of microphone outputs is implemented by using active RC circuits. Finally, the objective directivity can be experimentally obtained in wide frequency ranges required for the speech recognition.

This paper proposes a novel sequential coherent preambleless demodulator that uses phase signals instead of complex signals in the automatic frequency control (AFC) and carrier recovery circuits. The proposed demodulator employs a phase-combined frequency error detection circuit and dual loop AFC circuit to achieve fast frequency acquisition and low frequency jitter. It also adopts an open loop carrier recovery scheme with a sample hold circuit after the carrier filter to ensure carrier signal stability within a packet. It is shown that the frame error rate performance of the proposed demodulator is superior, by 30%, to that offered by differential detection in a frequency selective Rayleigh fading channel. The hardware size of the proposed demodulator is about only 1/10 that of a conventional coherent demodulator employing complex signals.

This paper presents a heuristic algorithm that minimizes the delay of the given circuit through a two-pass cell selection in cell-based design. First, we introduce a new graph, called candidate web, which conveniently represents all cell combinations available for the implementation of the given circuit. We, then, present an efficient method to obtain a tentative set of optimal cells, while estimating the delay of the longest path between each cell and the primary output on the candidate web. In this step, multiple cells are allowed to bind the same logic gate. Finally, we describe how the proposed approach actually selects the optimal cells from the tentative set, which would minimize the circuit delay. Experimental results on a set of benchmarks show that the proposed approach is effective and efficient in minimizing the delay of the given circuit.

In this paper, we propose a method to detect a road sign from a road scene image in the daytime. In order to utilize color feature of sign efficiently, color distribution of sign is examined, and then color similarity map is constructed. Additionally, color similarity shown on the map is incorporated into image energy of an active net model. A road sign is extracted as if it is wrapped up in an active net. Some experimental results obtained by applying an active net to images are presented.

This paper analyzes the performance of direct-detection optical CDMA systems with single optical hard-limiter using equal-weight orthogonal (EWO) signaling. Moreover, this paper clarifies the basic structure and the performance of the system using time-shifted versions of optical orthogonal code (OOC's) as EWO signaling. The system assigns the time-shifted versions of OOC's to the transmission of bits "0" and "1," respectively. Thus, the system does not require dynamic estimation of the receiver threshold. The performance is analyzed under the Gaussian approximation of an avalanche photodiode (APD) output where the effects of APD noise, thermal noise and interference are included. From the theoretical analysis and numerical results, it is shown that the system has good performance without dynamic estimation of the receiver threshold.

This paper proposes a novel CMOS analog multiplier. As its significant merit, it is free from mobility reduction and body effect. Thus, the proposed multiplier is expected to have good linearity, comparing with conventional multipliers. Four transistors operating in the linear region constitute the input cell of the multiplier. Their sources and backgates are connected to the ground to cancel the body effect. eTheir gates are fixed to the same bias voltage to remove the effect of the mobility reduction. Input signals are applied to the drains of the input cell transistors through modified nullors. The simulation results show that THD is less than 0.8% for 0.6 V p-p input signal at 2.5-V supply voltage, and that the 3-dB bandwidth is up to about 13.3 MHz.

In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 hours, making this method 5 times more efficient than conventional methods