Two algorithms for minimum cut linear arrangement of a class of graphs called p-q dags are proposed. A p-q dag represents the connection scheme of an adder tree, such as Wallace tree, and the VLSI layout problem of a bit slice of an adder tree is treated as the minimum cut linear arrangement problem of its corresponding p-q dag. One of the two algorithms is based on dynamic programming. It calculates an exact minimum solution within nO(1) time and space, where n is the size of a given graph. The other algorithm is an approximation algorithm which calculates a solution with O(log n) cutwidth. It requires O(n log n) time.

This paper presents an efficient algorithm to compute the characteristic polynomial of a polynomial matrix. We impose the following condition on given polynomial matrix M. Let M0 be the constant part of M, i. e. M0 M ( mod (y,,z)), where y,,z are indeterminates in M. Then, all eigenvalues of M0 must be distinct. In this case, the minimal polynomial of M and the characteristic polynomial of M agree, i. e. the characteristic polynomial f(x,y,,z) | x E M | is the minimal degree (w. r. t. x) polynomial satisfying f(M,y,,z) 0. We use this fact to compute f(x,y,,z). More concretely, we determine the coefficients of f(x,y,,z) little by little with basic matrix operations, which makes the algorithm quite efficient. Numerical experiments are given to compare the algorithm with conventional ones.

This paper describes a high-power and low-distortion AlGaAs/GaAs HFET amplifier developed for digital cellular base station system. We proved experimentally that distortion characteristics such as IMD (Intermodulation Distortion) or NPR (Noise Power Ratio) are drastically degraded when the absolute value of the drain bias circuit impedance at low frequency are high. Based on the experimental results, we have designed the drain bias circuit not to influence the distortion characteristics. The developed amplifier employed two pairs of pre-matched GaAs chips mounted on a single package and the total output-power was combined in push-pull configuration with a microstrip balun circuit. The push-pull amplifier demonstrated state-of-the-art performance of 140 W output-power with 11.5 dB linear gain at 2.2 GHz. In addition, it exhibited extremely low distortion performance of less than 30 dBc at two-tone total output-power of 46 dBm. These results indicate that the design of the drain bias circuit is of great importance to achieve improved IMD characteristics while maintaining high power performance.

This paper proposes a thresholding based segmentation method aided by Kleene Algebra. For a given image including some regions of interest (ROIs for short) with the coherent intensity level, assume that we can segment each ROI on applying thresholding technique. Three segmented states are then derived for every ROI: Shortage denoted by logic value 0, Correct denoted by 1 and Excess denoted by 2. The segmented states for every ROI in the image can be then expressed on a ternary logic system. Our goal is then set to find "Correct (1)" state for every ROI. First, unate function, which is a model of Kleene Algebra, based procedure is proposed. However, this method is not complete for some cases, that is, correctly segmented ratio is about 70% for three and four ROI segmentation. For the failed cases, Brzozowski operations, which are defined on De Morgan algebra, can accommodate to completely find all "Correct" states. Finally, we apply these procedures to segmentation problems of a human brain MR image and a foot CT image. As the result, we can find all "1" states for the ROIs, i. e. , we can correctly segment the ROIs.

This paper proposes a new distortion analysis method for frequency-dependent FET amplifiers, which uses a novel Frequency-Dependent Complex Power Series (FDCPS) model. This model consists of a frequency-independent nonlinear amplifier represented by an odd-order complex power series and frequency-dependent input and output filters. The in-band frequency characteristics of the saturation region are represented by the frequency-dependent output filter, while the in-band frequency characteristics of the linear region are represented by the frequency-dependent input and output filters. In this method, the time-domain analysis is carried out to calculate the frequency-independent nonlinear amplifier characteristics, and the frequency-domain analysis is applied to calculate the frequency-dependent input and output filter characteristics. The third-order intermodulation (IM3) calculated by this method for a GaAs MESFET amplifier is in good agreement with the numerical results obtained by the Harmonic Balance (HB) method. Moreover, the IM3 calculated by this method also agrees well with the measured data for an L-band 3-stage GaAs MESFET amplifier. It is shown that this method is effective for calculating frequency-dependent distortion of a nonlinear amplifier with broadband modulation signals.

Following our former works on regular sampling in wavelet subspaces, the paper provides two algorithms to estimate the truncation error and aliasing error respectively when the theorem is applied to calculate concrete signals. Furthermore the shift sampling case is also discussed. Finally some important examples are calculated to show the algorithm.

In this paper we study n-input m-output Boolean functions (abbr. (n,m)-functions) with high nonlinearity. First, we present a basic construction method for a balanced (n,m)-function based on a primitive element in GF(2m). With an iterative procedure, we improve some lower bounds of the maximum nonlinearity of balanced (n,m)-functions. The resulting bounds are larger than the maximum nonlinearity achieved by any previous construction method for (n,m)-functions. Finally, our basic method is developed to construct an (n,m)-bent function and discuss its maximum algebraic degree.

In practical logic design circuits are built by composing certain types of gates. Each gate itself is a simple circuits with one, two or three inputs and one output, which implements an elementary logic function. These functions are called the generators. For the general purpose the set of generators is considered to be functionally complete, i. e. , it is able to express any logic function under chosen rules compositions. A basis is a functionally complete set of logic functions that contains no complete proper subset. Providing compactness and expressibility of the generators the notion of a basis, however, ignores the optimality of implementations. Efficiently irreducible generating set, termed ε-basis, is an irreducible set of generators which guarantees an optimal implementation of every function, with respect to the number of literals in its formal expression. The notion of ε-basis is significant in the composition of functions, since the classical definition of basis does not consider the efficiency of implementation. In case of Boolean functions, for two-input (dyadic) generators it has been shown that an ε-basis consists of all monadic functions, constants, and only two dyadic functions from certain classes. In this paper, expanding the domain of basic operations from dyadic to triadic, we study the efficiency of sets of 3-input gates as generators. This expansion decreases the complexity of functions (hence, the complexity of functional circuits to be designed). Gaining an evident merit in the complexity, we have to pay a price by a considerable increase of the number of such generators for the multiple valued circuits. However, in the case of Boolean operations this number is still very small, and it will certainly be useful to consider this approach in the practical circuit design. This paper provides a criterion for a generating set of triadic operations of k-valued logic to be efficiently irreducible. In the case of Boolean functions it is shown that there exist exactly five types of classes of triadic operations which constitute an ε-basis. A typical example of generator set which forms a triadic ε-basis, is also shown.

The formulation of the wall admittance of a circular microstrip antenna by the spectral domain method is presented. The circular microstrip antenna is calculated using the cavity model. The electromagnetic fields within the antenna cavity are determined from the impedance boundary condition at the side aperture. The contribution from the region outside the antenna is taken into account by the wall admittance. The wall admittance is defined by the magnetic field produced by the equivalent magnetic current at the aperture. The magnetic field is calculated by the spectral domain method. The wall admittances obtained by this method are compared with the results calculated by Shen. The calculated input impedances of the microstrip antenna agree fairly well with the experimental data for the substrate thickness of up to 0.048λg. The formulation of wall admittance presented here is easily applicable to arbitrarily shaped microstrip antennas.

In universal personal telecommunication (UPT) environments, UPT networks retain information related to incall/outcall registration in UPT user service profiles in order to provide incoming UPT calls for UPT users in any location who have registered at a terminal. As UPT networks support incall registration, terminal users can be different from terminal owners, and several UPT users can register for incoming calls on a single terminal. Therefore, appropriate third-party protection procedures are needed to protect the rights of terminal owners. A terminal profile database can be used to store information regarding terminal states and incall UPT users registered on a terminal in order to enable third-party protection procedures. In order to manage information within both the terminal profile and the service profile, we propose a request-based scheme for incall registration/deregistration of UPT users and incall registration resets of terminal owners. We evaluate the performance of the scheme in terms of; 1) total cost and, 2) the number of terminal profile accesses per unit time for a terminal.

Frequency chirping induced in an electorabsorption (EA) modulator can degrade transmission performance because of the chromatic dispersion of fiber. This letter studies the frequency chirping in an EA modulator from the viewpoint of the influence of the modulation bandwidth. Both simulations and experiments, in which fiber transmission was carried out applying modulation signals of different bandwidths to an EA modulator, show that a large bandwidth causes small degradation in the transmission performance. This result is attributed to the short chirping time that occurs when a large bandwidth signal is applied.

We propose an H-plane manifold-type triplexer with closely arranged junctions. Broadband characteristics for each bands are obtained by arranging filters closely near the end of the common waveguide. Three fundamental and sufficient parameters are introduced for numerical optimizations to determine the configuration of the broadband triplexer. The configuration including closely arranged junctions requires an generalized scattering matrix (GS matrix) of an asymmetric cross junction to simulate and design. We expand the mode matching technique (MMT) to be able to analyze this kind of discontinuities by joining two asymmetric steps discontinuities to a symmetric cross junction. This is suitable expressions for numerical calculations. The characteristics of the whole triplexer are obtained by cascading GS matrices of the corresponding discontinuities. The experimental results of the fabricated triplexer were compared with the simulated data, and the results agree well with the simulated one. The characteristics of the fabricated triplexer satisfy the request of the broad band operation and high power-handling capability.

The architecture and control procedure for a direct conversion receiver are investigated for a linear modulation scheme. The proposed design techniques maintain receiver linearity despite various types of signal distortion. The techniques include the fast gain control procedure for receiving a control channel for air interface connection, DC offset canceling in both analog and digital stages, and 2nd-order intermodulation distortion canceling in an analog down-conversion stage. Experimental and computer simulation results on PHS (Personal Handy-phone System) parameters, showed that required linear modulation performance was achieved and thus the applicability of the proposed techniques was demonstrated.

IP multicast is very useful mechanism to deliver data to a large number of receivers such as interactive multimedia sessions. It can not accommodate the heterogeneity of the receivers including network heterogeneity. We propose a multicast traffic controller(s) in a router to solve such situation. A traffic controller has a filter to moderate the output data rate to a link. It makes use of Time-to-Live (TTL) threshold to specify the minimum requirement of a packet. Multimedia data are encoded into multiple layers; basic layer and enhanced layers. By associating TTLs of data layers and the threshold of the filter, we can moderate the traffic by dropping the data of less significant layer. The threshold is dynamically modified according to the local network traffic and link traffic. Our scheme also helps a network and a link(s) avoid from congestion and accommodate other types of traffic at the same time.

In this paper, a four-quadrant analog multiplier consisting of four neuron-MOS transistors and two load resistors is proposed. The proposed multiplier can be operated at only 1 V. Furthermore, the input range of the multiplier is equal to 100% of the supply voltage. The theoretical harmonic distortion caused by mobility degradation and device mismatchs is derived in detail. The performance of the proposed multiplier is characterized through HSPICE simulations with a standard 2.0 µm CMOS process with a double-poly layer. Simulations of the proposed multiplier demonstrate that the linearity error of 0.77% and a total harmonic distortion of 0.62% are obtained with full-scale input conditions. The maximum power consumption and 3 dB bandwidth are 9.56 µW and 107 MHz, respectively. The active area of the proposed multiplier is 210 µm 140 µm.

Radio waves propagating through tunnels are strongly attenuated in the presence of discontinuities such as bends and branches. The useful structural modifications are requested to get better circumstances for radio waves in tunnels. In this paper, we propose several modifications arranged in a conventional T-junction of two-dimensional tunnels and analyze the transmission characteristics of radio waves by using the finite volume time domain (FVTD) method.

Speeding up modular inversion is one of the most important subjects in the field of information security. Over the elliptic curve -- on the prime finite field in particular goals -- public-key cryptosystems and digital signature schemes frequently use modular inversion if affine coordinates are selected. In the regular computer environment, most data transmission via networks and data storage on memories as well as the operation set of processors are performed in multiples of eight bits or bytes. A fast modular multiplication algorithm that matches these operation units for DSP was proposed to accelerate the Montgomery method by Dusse and Kaliski. However, modular inversion algorithms were developed using bit by bit operation and so do not match the operation unit. This paper proposes two techniques for modular inversion that suits any arbitrary processing unit. The first technique proposes a new extended GCD procedure without any division. It can be constructed by the shifting, adding and multiplying operations, all of which a Montgomery modular arithmetic algorithm employs. The second technique can reduce the delay time of post processing in the modular inversion algorithm. In particular, it is of great use for the modular inversion defined in the Montgomery representation. These proposed techniques make modular inversion about 5. 5 times faster.

This paper proposes a phase-rotating phase-shift keying (PSK) modulation and shows that its narrow-band version is suitable for Viterbi equalization. The proposed PSK has the following features: 1) a spectrum shaping of the transmit/receive filters does not need to be restricted to the Nyquist criterion; 2) the transmitted data sequence is rotated for every symbol in order to reduce noise-correlation at the receiver. First, this paper discusses a performance degradation of bit error rate of Viterbi equalizers in the presence of the sampling timing offset or under time-dispersive frequency selective fading. Next, computer simulation confirms that π/2-shifted binary PSK with narrow-band spectrum shaping filter, which includes offset QPSK for its special case, solves the above mentioned performance degradation, keeping good spectrum efficiency equal to M-ary PSK.

The self-healing capability against network failure is one of indispensable features for the B-ISDN infrastructure. One problem in realizing such self-healing backbone network is the inefficient utilization of the large spare capacity designed for the failure-restoration purpose since it will be used only in the failure time that does not occur frequently. "Pool-capacity" is the concept that allows some VPs (virtual paths) to efficiently utilize this spare capacity part. Although the total capacity can be saved by using the "Pool Capacity," it is paid by less reliability of VPs caused by the emerging influence of indirect-failure. Thus, this influence of indirect-failure has to be considered in the capacity designing process so that network-designers can trade off the saving of capacity with the reliability level of VPs in their self-healing networks. In this paper, Damage Rate:DR which is the index to indicate the level of the influence caused by indirect-failure is defined and the pool-capacity design scheme with DR consideration is proposed. By the proposed scheme, the self-healing network with different cost (pool-capacity) can be designed according to the reliability level of VPs.

In the basic user/network interface of ISDN (ITU-T Recommendation I. 430), the D-channel is shared by up to 8 terminals for signal and data packets. An analytical model is proposed to reveal the performance characteristics of the access control scheme for the D-channel. Numerical and simulation results are shown to demonstrate the performance differentiation of the terminals with different priorities. It is observed that the mean signal delay at low load may become large because of long service time for packets, and that the priority mechanism may not work properly when the loads at terminals are very asymmetric.