An analog controlled Variable Gain LNA (VGLNA) with tunable operating frequency bands is reported. The analog control circuit for the continuous gain variation is proposed as a low voltage version. The fabricated LNA based on 0.18 µm CMOS shows a gain range of 15-12 dB (27 dB gain control), a noise figure (NF) of 2 dB, and an IIP3 of -10 dBm while 5 mA is drawn from a 1.2 V supply over the frequency range of 470880 MHz.

A planar miniaturized branch-line coupler with harmonic suppression property for UHF band applications is presented in this paper. By properly synthesizing the LC-tanks that employ artificial transmission lines, two pairs of quarter-wavelength branch-lines to respectively meet characteristic impedances of 35.4 and 50 ohms can be obtained with the coupler. For the operating band, it can achieve good 3 dB power division with a 90° phase difference in the outputs of the through and coupled arms. The coupler also has a small area of 20.5(L)18(W) mm2, corresponding to 0.11 λg0.1 λg at 922 MHz. Compared with conventional couplers, the proposed design not only offers a wide bandwidth of more than 230 MHz within 1° or 1 dB, but also works with additional harmonic suppression for achieving better performance. Therefore, the proposed branch-line coupler with a compact size is well suitable for power division application.

We review our recent work on Yb-doped and hybrid-structured solid photonic bandgap fibers (Yb-HS-SPBGFs) for linearly-polarized fiber lasers oscillating in the small gain wavelength range from 1160 nm to 1200 nm. The stack-and-draw or pit-in-jacket method is employed to fabricate two Yb-HS-SPBGFs. Both of the fiber shows optical filtering property for eliminating ASE in the large gain wavelength range from 1030 nm to 1130 nm and enough high birefringence for maintaining linear polarization, thanks to the photonic bandgap effect and the induced birefringence of the hybrid structure. The fiber attenuation of the Yb-HS-SPBGF fabricated by the pit-in-jacket method is much lower than that of the Yb-HS-SPBGF fabricated by stack-and-draw method. Linearly-polarized single stage fiber lasers using Yb-HS-SPBGFs are also demonstrated. Laser oscillation at 1180 nm is confirmed without parasitic lasing in the fiber lasers. High output power and high slope efficiency in linearly-polarized single-cavity fiber laser using the low-loss Yb-HS-SPGF fabricated by the pit-in-jacket method are achieved. Narrow linewidth, high polarization extinction ratio and high beam quality are also confirmed, which are required for high-efficient frequency-doubling. A compact and high-power yellow-orange frequency-doubling laser would be realized by using a linearly-polarized single-cavity fiber laser employing a low-loss Yb-HS-SPBGF.

In this paper, we propose a text corpus design method for a Korean stereo super-wideband speech database. Since a small-sized text corpus for speech coding is generally required for speech coding, the corpus should be designed to comply with the pronunciation behavior of natural conversation in order to ensure efficient speech quality tests. To this end, the proposed design method utilizes a similarity measure between the phoneme distribution occurring from natural conversation and that from the designed text corpus. In order to achieve this goal, we first collect and refine text data from textbooks and websites. Next, a corpus is designed from the refined text data based on the similarity measure to compare phoneme distributions. We then construct a Korean stereo super-wideband speech (K-SW) database using the designed text corpus, where the recording environment is set to meet the conditions defined by ITU-T. Finally, the subjective quality of the K-SW database is evaluated using an ITU-T super-wideband codec in order to demonstrate that the K-SW database is useful for developing and evaluating super-wideband codecs.

A dual-band patch antenna with a shorting wall and a U-shaped slot is presented in this paper. The shorted-patch is coupled with the aperture slot that is closely placed to the shorting wall for achieving good impedance matching. A U-shaped slot is embedded in the shorted-patch and is located near the radiating edge to yield a dual-band operation. By changing the side slot length of the U-shaped slot, the tunable frequency ratio of the proposed antenna is varied from 1.73 to 2.05.

A 0.6-V voltage shifter and a 0.6-V clocked comparator are presented for sampling correlation-based impulse radio UWB receiver. The voltage shifter is used for a novel split swing level scheme-based CMOS transmission gate which can reduce the power consumption by four times. Compared to the conventional voltage shifter, the proposed voltage shifter can reduce the required capacitance area by half and eliminate the non-overlapping complementary clock generator. The proposed 0.6-V clocked comparator can operate at 100-MHz clock with the voltage shifter. To reduce the power consumption of the conventional continuous-time comparator based synchronization control unit, a novel clocked-comparator based control unit is presented, thereby achieving the lowest energy consumption of 3.9 pJ/bit in the correlation-based UWB receiver with the 0.5 ns timing step for data synchronization.

Video applications such as video conferencing among multiple users and video surveillance systems require multiple video connections and QoS guarantee. These days the video systems equipped with IEEE 802.11 LAN interfaces allows a broadband wireless access to the Internet at a reasonable price. However, according to the current IEEE 802.11e HCCA standard, if more than two video sessions are to be established simultaneously, some of them must share the TXOP because the available number of TSIDs for video transmission is restricted to two. In order to resolve this problem, we devise a scheme which can establish up to 13 video sessions by slightly modifying the frame structure while maintaining the compatibility with the current standard. Our scheme is implemented on the NCTUns 4.0 network simulator, and evaluated numerically in terms of throughput, delay, and PSNR. Also real video clips are used as input to our simulation. The results showed that our scheme guarantees the transmission bandwidth requested by each video session.

This paper proposes an area efficient, low power, fractional CMOS bandgap reference (BGR) utilizing switched-current and current-memory techniques. The proposed circuit uses only one parasitic bipolar transistor and built-in current source to generate reference voltage. Therefore significant area and power reduction is achieved, and bipolar transistor device mismatch is eliminated. In addition, output reference voltage can be set to almost any value. The proposed circuit is designed and simulated in 0.18 µm CMOS process, and simulation results are presented. With a 1.6 V supply, the reference produces an output of about 628.5 mV, and simulated results show that the temperature coefficient of output is less than 13.8 ppm/ in the temperature range from 0 to 100. The average current consumption is about 8.5 µA in the above temperature range. The core circuit, including current source, opamp, current mirrors and switched capacitor filters, occupies less than 0.0064 mm2 (80 µm×80 µm).

This paper presents the design of a wideband low noise amplifier (LNA) for the 3GPP LTE (3rd Generation Partnership Project Long Term Evolution) standard. The proposed LNA uses a common gate topology with a noise cancellation technique for wideband (0.7 to 2.7 GHz) and low noise operation. The capacitive cross coupling technique is adopted for the common gate amplifier. Consequently input matching is achieved with lower transconductance, thereby reducing the power consumption and noise contribution. The LNA is designed in a 0.18 µm process and the simulations show lower than -10 dB input return loss (S11), and 2.42.6 dB noise figure (NF) over the entire operating band (0.72.7 GHz) while drawing 9 mA from a 1.8 V supply.

This letter proposes a new scheduling method to improve scheduling efficiency of EPON. The proposed method uses a credit pool for each optical network unit (ONU) and for each service class. For high scheduling efficiency, the credit pool of an ONU can be negative amount to utilize the unused ONU credits. Also the proposed method dynamically excludes the lowest service class from scheduling to decrease a transmission cycle length. Using simulations, we show that the proposed method is better than the existing methods in mean delay.

Different from distributed baluns, active baluns have group delay variations in the lower bands related to inherent internal capacitances and resistance in transistors. A negative group delay (NGD) circuit is employed as a compensator of group delay variation for an ultra-wideband (UWB) active balun. First, three-cell NGD circuit is inserted into a simple active balun circuit for realizing both group delay compensation and return loss improvement. The simulated results show a group delay variation of 4.8 ps and an input return loss of above 11.5 dB in the UWB band (3.1-10.6 GHz). Then, a pair of one-cell NGD circuits is added to reduce the remaining group delay variation (3.4 ps in simulation). The circuit with the NGD circuits was fabricated on an InGaP/GaAs HBT MMIC substrate. The measured results achieved a group delay variation of 7.7 ps, a gain variation of 0.5 dB, an input return loss of greater than 10 dB, and an output return loss of larger than 8.1 dB in the UWB band.

We fabricated metal-oxide-semiconductor (MOS) devices with Pt/Ta2O5 gate stacks and investigated their electrical and structural properties. As increasing RF magnetron sputter-deposition time of Ta2O5 film, the values of equivalent oxide thickness (EOT) and flat band voltage (VFB) increase whilst the density of interfacial trap (Dit) gradually decreases. The effective metal work function (Φm,eff) of Pt metal gate, extracted from the relations of EOT versus VFB are calculated to be ∼5.29 eV, implying that Fermi-level pinning in Ta2O5 gate dielectric is insignificant.

Network on Chip (NoC) is proposed as a new intra-chip communication infrastructure. In current NoC design, one related problem is mapping IP cores onto NoC architectures. In this paper, we propose a performance-aware hybrid algorithm (PHA) for mesh-based NoC to optimize performance indexes such as latency, energy consumption and maximal link bandwidth. The PHA is a hybrid algorithm, which integrates the advantages of Greedy Algorithm, Genetic Algorithm and Simulated Annealing Algorithm. In the PHA, there are three features. First, it generates a fine initial population efficiently in a greedy swap way. Second, effective global parallel search is implemented by genetic operations such as crossover and mutation, which are implemented with adaptive probabilities according to the diversity of population. Third, probabilistic acceptance of a worse solution using simulated annealing method greatly improves the performance of local search. Compared with several previous mapping algorithms such as MOGA and TGA, simulation results show that our algorithm enhances the performance by 30.7%, 23.1% and 25.2% in energy consumption, latency and maximal link bandwidth respectively. Moreover, simulation results demonstrate that our PHA approach has the highest convergence speed among the three algorithms. These results show that our proposed mapping algorithm is more effective and efficient.

This paper proposes a microstrip patch antenna for 2.45 GHz Industrial Scientific Medical (ISM) band Wireless Body Area Network (WBAN) applications. To enhance the front-to-back ratio (F/B) and specific absorption rate (SAR), an electrically coupled LC resonator is introduced. The overall dimensions of the proposed antenna are 54 mm45 mm2.4 mm and it has a gain of over 1 dBi for the entire 2.45 GHz ISM band. The proposed antenna has an enhanced F/B ratio and specific absorption rate, compared with those of a conventional patch antenna.

A UWB impulse array antenna (IAA) utilizing a novel electrical scanning system with tapped delay lines is proposed and its usefulness is experimentally verified. The experimental antenna is composed of impulse generators installed in each antenna element and tapped delay lines used for creating transmitting trigger signals, which is a simple circuit configuration. It is shown that the output phase of the transmitting wave can be controlled by controlling the period of the trigger signal, and beam direction can be controlled from -30 deg to +30 deg by changing the trigger frequency from Fc-2 kHz to Fc+2 kHz. Evaluation of this antenna as a short range radar is carried out and distance resolution of 25 cm and angle resolution below 10 deg are obtained.

This paper presents an ultra-wideband amplifier embedded with band-pass filter design. The scattering parameters of a frequency-domain GaAs field effect transistor are converted into z-domain representations by employing the weighted linear least squares method. A least squares scheme is employed to obtain characteristic impedances of transmission line elements that form the amplifier having a flat gain in the passband and good fall-off selectivity in the stopband. Experimental results illustrate the validity of the proposed design method.

Various planar folded dipole antennas with feed lines are introduced and analyzed. With the added feed line, the planar folded dipole antenna has two resonance modes. Moreover, adjusting the spacing and width of the feed line improves the broadband characteristics of the antenna. The attached feed line has not only an impedance transforming characteristic but also a bandwidth transforming characteristic. The bandwidth transforming characteristic means that the feed line can broaden the bandwidth of folded dipole antenna. A way to reduce the antenna area is also studied, and the characteristics of the resulting compact antenna are analyzed.

This paper presents a resistor-compensation technique for a CMOS bandgap and current reference, which utilizes various high positive temperature coefficient (TC) resistors, a two-stage operational transconductance amplifier (OTA) and a simplified start-up circuit in the 0.35-µm CMOS process. In the proposed bandgap and current reference, numerous compensated resistors, which have a high positive temperature coefficient (TC), are added to the parasitic n-p-n and p-n-p bipolar junction transistor devices, to generate a temperature-independent voltage reference and current reference. The measurements verify a current reference of 735.6 nA, the voltage reference of 888.1 mV, and the power consumption of 91.28 µW at a supply voltage of 3.3 V. The voltage TC is 49 ppm/ in the temperature range from 0 to 100 and 12.8 ppm/ from 30 to 100. The current TC is 119.2 ppm/ at temperatures of 0 to 100. Measurement results also demonstrate a stable voltage reference at high temperature (> 30), and a constant current reference at low temperature (< 70).

The excessive memory access required to perform motion compensation when decoding compressed video is one of the main limitations in improving the performance of an H.264/AVC decoder. This paper proposes an H.264/AVC decoder that employs three techniques to reduce external memory access events: efficient distribution of reference frame data, on-chip cache memory, and frame memory recompression. The distribution of reference frame data is optimized to reduce the number of row activations during SDRAM access. The novel cache organization is proposed to simplify tag comparisons and ease the access to consecutive 4×4 blocks. A recompression algorithm is modified to improve compression efficiency by using unused storage space in neighboring blocks as well as the correlation with the neighboring pixels stored in the cache. Experimental results show that the three techniques together reduce external memory access time by an average of 90%, which is 16% better than the improvements achieved by previous work. Efficiency of the frame memory recompression algorithm is improved with a 32×32 cache, resulting in a PSNR improvement of 0.371 dB. The H.264/AVC decoder with the three techniques is fabricated and implemented as an ASIC using 0.18 µm technology.

A low-loss ultra-wide band (UWB) filter is presented, which uses miniaturized parallel coupled line along with an standard printed circuit board (PCB) technology. By analyzing even- and odd-mode impedances (in comparison with conventional parallel coupled lines) of miniaturized parallel coupled line, this structure provides tight coupling, thus, relaxing the requirements on physical dimensions width and spacing when designing broadband filters. A bandpass filter for Mode 1 (the first 3 sub-bands) in the 3.1-5 GHz band for Multi-Band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB is realized and compared with a conventional parallel coupled line filter. The experimental results show as much as 0.9 dB insertion loss improvement over the conventional counterpart.