Tomohiko OHTSUKA Daisuke WATANABE
The singular points of fingerprints, viz. core and delta, are important referential points for the classification of fingerprints. Several conventional approaches such as the Poincare index method have been proposed; however, these approaches are not reliable with poor-quality fingerprints. This paper proposes a new core and delta detection employing singular candidate analysis and an extended relational graph. Singular candidate analysis allows the use both the local and global features of ridge direction patterns and realizes high tolerance to local image noise; this involves the extraction of locations where there is high probability of the existence of a singular point. Experimental results using the fingerprint image databases FVC2000 and FVC2002, which include several poor-quality images, show that the success rate of the proposed approach is 10% higher than that of the Poincare index method for singularity detection, although the average computation time is 15%-30% greater.
Kohei MIYASE Xiaoqing WEN Seiji KAJIHARA Yuta YAMATO Atsushi TAKASHIMA Hiroshi FURUKAWA Kenji NODA Hideaki ITO Kazumi HATAYAMA Takashi AIKYO Kewal K. SALUJA
Capture-safety, (defined as the avoidance of timing error due to unduly high launch switching activity in capture mode during at-speed scan testing), is critical in avoiding test induced yield loss. Although several sophisticated techniques are available for reducing capture IR-drop, there are few complete capture-safe test generation flows. This paper addresses the problem by proposing a novel and practical capture-safe test generation flow, featuring (1) a complete capture-safe test generation flow; (2) reliable capture-safety checking; and (3) effective capture-safety improvement by combining X-bit identification & X-filling with low launch-switching-activity test generation. The proposed flow minimizes test data inflation and is compatible with existing automatic test pattern generation (ATPG) flow. The techniques proposed in the flow achieve capture-safety without changing the circuit-under-test or the clocking scheme.
Daigo MURAMATSU Manabu INUMA Junji SHIKATA Akira OTSUKA
Cancelable approaches for biometric person authentication have been studied to protect enrolled biometric data, and several algorithms have been proposed. One drawback of cancelable approaches is that the performance is inferior to that of non-cancelable approaches. In this paper, we propose a scheme to improve the performance of a cancelable approach for online signature verification. Our scheme generates two cancelable dataset from one raw dataset and uses them for verification. Preliminary experiments were performed using a distance-based online signature verification algorithm. The experimental results show that our proposed scheme is promising.
Akinori NAKAJIMA Noriyuki FUKUI Hiroshi KUBO
For multiple-input multiple-output (MIMO) spatial multiplexing, signal separation/detection is one of the most important signal processing parts, so that signal separation/detection schemes are being vigorously researched. As a promising signal separation/detection scheme, frequency-domain iterative soft interference cancellation (FD-SIC) has been proposed. Although iterative FD-SIC can provide the transmission performance close to lower bound for QPSK, the accuracy of signal separation/detection significantly degrades in case of high level data modulation. Therefore, in this paper, we propose layered soft interference cancellation (LSIC). We consider single-carrier (SC)-MIMO spatial multiplexing with frequency domain equalization (FDE). The achievable frame error rate (FER) performances with LSIC are evaluated by computer simulation to show that LSIC can provide better FER performance than iterative FD-SIC.
This paper presents a new approach for the Capon beamformer to provide robustness against array pointing errors. This robustness is achieved by incorporating an uncertainty constraint with diagonal loading and injected pseudo-interference. A simple performance analysis of this new beamformer is also investigated. Simulation results demonstrate that the power estimator has excellent performance.
Jianliang GAO Yinhe HAN Xiaowei LI
Bugs are becoming unavoidable in complex integrated circuit design. It is imperative to identify the bugs as soon as possible through post-silicon debug. For post-silicon debug, observability is one of the biggest challenges. Scan-based debug mechanism provides high observability by reusing scan chains. However, it is not feasible to scan dump cycle-by-cycle during program execution due to the excessive time required. In fact, it is not necessary to scan out the error-free states. In this paper, we introduce Suspect Window to cover the clock cycle in which the bug is triggered. Then, we present an efficient approach to determine the suspect window. Based on Suspect Window, we propose a novel debug mechanism to locate the bug both temporally and spatially. Since scan dumps are only taken in the suspect window with the proposed mechanism, the time required for locating the bug is greatly reduced. The approaches are evaluated using ISCAS'89 and ITC'99 benchmark circuits. The experimental results show that the proposed mechanism can significantly reduce the overall debug time compared to scan-based debug mechanism while keeping high observability.
Guan PANG Guijin WANG Xinggang LIN
Human detection has witnessed significant development in recent years. The introduction of cascade structure and integral histogram has greatly improved detection speed. But real-time detection is still only possible for sparse scan of 320 240 sized images. In this work, we propose a matrix-based structure to reorganize the computation structure of window-scanning detection algorithms, as well as a new pre-processing method called Hierarchical HOG Matrices (HHM) in place of integral histogram. Our speed-up scheme can process 320 240 sized images by dense scan (≈ 12000 windows per image) at the speed of about 30 fps, while maintaining accuracy comparable to the original HOG + cascade method.
Atsushi NAGATE Kenji HOSHINO Teruya FUJII
It is important to improve a cell-edge throughput of next generation mobile communication systems. Frequency reuse schemes such as three-cell reuse or fractional frequency reuse are suitable for achieving this goal. Another candidate is multi-link transmission; signals on different sub-carriers from adjacent base stations are received by a mobile. However, the orthogonality of these signals can collapse if a frequency offset between adjacent base stations is excessive; this loss triggers adjacent-channel interference. This paper proposes an interference canceller to solve this problem and confirms the effectiveness of the method through numerical analysis and computer simulations.
Takao KIHARA Toshimasa MATSUOKA Kenji TANIGUCHI
Previously reported wideband CMOS low-noise amplifiers (LNAs) have difficulty in achieving both wideband input impedance matching and low noise performance at low power consumption and low supply voltage. We present a transformer noise-canceling wideband CMOS LNA based on a common-gate topology. The transformer, composed of the input and shunt-peaking inductors, partly cancels the noise originating from the common-gate transistor and load resistor. The combination of the transformer with an output series inductor provides wideband input impedance matching. The LNA designed for ultra-wideband (UWB) applications is implemented in a 90 nm digital CMOS process. It occupies 0.12 mm2 and achieves |S11|<-10 dB, NF<4.4 dB, and |S21|>9.3 dB across 3.1-10.6 GHz with a power consumption of 2.5 mW from a 1.0 V supply. These results show that the proposed topology is the most suitable for low-power and low-voltage UWB CMOS LNAs.
Yongjoon KIM Jaeseok PARK Sungho KANG
This paper presents a selective scan slice grouping technique for test data compression. In conventional selective encoding methods, the existence of a conflict bit contributes to large encoding data. However, many conflict bits are efficiently removed using the scan slice grouping technique, which leads to a dramatic improvement of encoding efficiency. Experiments performed with large ITC'99 benchmark circuits presents the effectiveness of the proposed technique and the test data volume is reduced up to 92% compared to random-filled test patterns.
Su HU Gang WU Teng LI Yue XIAO Shaoqian LI
In conventional preamble based channel estimation in OFDM/offset QAM (OFDM/OQAM) system, both the even index subcarriers and the odd index subcarriers are with identical value selected from { 1 } respectively to avoid inter-carrier interference (ICI), if and only if channel frequency response in neighbor few subcarriers remain invariable. However, it requires larger coherent bandwidth. In this paper, we propose an effective preamble design with ICI cancellation for channel estimation in OFDM/OQAM system. With this structure, we only utilize even (or odd) index of subcarriers as reference signal to avoid ICI, and then the channel information of remaining subcarriers can be estimated by the interpolation approach. Based on the sampling theorem, the mean square error (MSE) performance of the proposed preamble design is analyzed, where channel estimation performance is same for all subcarriers. Simulation and analytical results demonstrate that the proposed preamble design with ICI cancellation method outperforms the conventional one in term of channel estimation accuracy in OFDM/OQAM system.
Yongjoon KIM Jaeseok PARK Sungho KANG
In this paper, we present an efficient low power scan test technique which simultaneously reduces both average and peak power consumption. The selective scan chain activation scheme removes unnecessary scan chain utilization during the scan shift and capture operations. Statistical scan cell reordering enables efficient scan chain removal. The experimental results demonstrated that the proposed method constantly reduces the average and peak power consumption during scan testing.
Hiroyuki YOTSUYANAGI Masayuki YAMAMOTO Masaki HASHIZUME
In this paper, the scan chain ordering method for BIST-aided scan test for reducing test data and test application time is proposed. In this work, we utilize the simple LFSR without a phase shifter as PRPG and configure scan chains using the compatible set of flip-flops with considering the correlations among flip-flops in an LFSR. The method can reduce the number of inverter codes required for inverting the bits in PRPG patterns that conflict with ATPG patterns. The experimental results for some benchmark circuits are shown to present the feasibility of our test method.
Miki SATO Toru IWASAWA Akihiko SUGIYAMA Toshihiro NISHIZAWA Yosuke TAKANO
This paper presents a single-chip speech dialogue module and its evaluation on a personal robot. This module is implemented on an application processor that was developed primarily for mobile phones to provide a compact size, low power-consumption, and low cost. It performs speech recognition with preprocessing functions such as direction-of-arrival (DOA) estimation, noise cancellation, beamforming with an array of microphones, and echo cancellation. Text-to-speech (TTS) conversion is also equipped with. Evaluation results obtained on a new personal robot, PaPeRo-mini, which is a scale-down version of PaPeRo, demonstrate an 85% correct rate in DOA estimation, and as much as 54% and 30% higher speech recognition rates in noisy environments and during robot utterances, respectively. These results are shown to be comparable to those obtained by PaPeRo.
Minwoo LEE Yoonjae LEE Kihyeon KIM Hanseok KO
In this Letter, a residual acoustic echo suppression method is proposed to enhance the speech quality of hands-free communication in an automobile environment. The echo signal is normally a human voice with harmonic characteristics in a hands-free communication environment. The proposed algorithm estimates the residual echo signal by emphasizing its harmonic components. The estimated residual echo is used to obtain the signal-to-interference ratio (SIR) information at the acoustic echo canceller output. Then, the SIR based Wiener post-filter is constructed to reduce both the residual echo and noise. The experimental results confirm that the proposed algorithm is superior to the conventional residual echo suppression algorithm in terms of the echo return loss enhancement (ERLE) and the segmental signal-to-noise ratio (SEGSNR).
Toru IWASAKI Hirokazu KAMODA Takao KUKI
A novel structure for a composite right/left-handed (CRLH) corrugated waveguide in the millimeter-wave band is proposed. The CRLH waveguide is composed of a rectangular waveguide with tilted corrugations on its bottom broad wall. By operating above and below the cutoff frequency of the dominant mode of the rectangular waveguide, the CRLH waveguide provides, respectively, an inherent series inductance and shunt capacitance, and an inherent shunt inductance. Moreover, the tilted corrugations provide a series inductance and a series capacitance, which can support CRLH propagation. A frequency-scanning antenna using this CRLH waveguide is also studied numerically and experimentally. The results demonstrate that the antenna can provide backward-to-forward beam scanning, including the broadside direction. A scanning angle from -9.9 to +2.2 is achieved within a 1.8-GHz frequency range in the 60-GHz band.
Gia Khanh TRAN Kei SAKAGUCHI Fumie ONO Kiyomichi ARAKI
Infrastructure wireless mesh network has been attracting much attention due to the wide range of its application such as public wireless access, sensor network, etc. In recent years, researchers have shown that significant network throughput gain can be achieved by employing network coding in a wireless environment. For further improvement of network throughput in one dimensional (1D) topology, Ono et al. proposed to use multiple antenna technique combined with network coding. In this paper, being inspired by MIMO network coding in 1D topology, the authors establish a novel MIMO network coding algorithm for a 2D topology consisting of two crossing routes. In this algorithm, multiple network coded flows are spatially multiplexed. Owing to the efficient usage of radio resource of network coding and co-channel interference cancellation ability of MIMO, the proposed algorithm shows an 8-fold gain in network capacity compared to conventional methods in the best-case scenario.
Ryuta NARA Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
A scan chain is one of the most important testing techniques, but it can be used as side-channel attacks against a cryptography LSI. We focus on scan-based attacks, in which scan chains are targeted for side-channel attacks. The conventional scan-based attacks only consider the scan chain composed of only the registers in a cryptography circuit. However, a cryptography LSI usually uses many circuits such as memories, micro processors and other circuits. This means that the conventional attacks cannot be applied to the practical scan chain composed of various types of registers. In this paper, a scan-based attack which enables to decipher the secret key in an AES cryptography LSI composed of an AES circuit and other circuits is proposed. By focusing on bit pattern of the specific register and monitoring its change, our scan-based attack eliminates the influence of registers included in other circuits than AES. Our attack does not depend on scan chain architecture, and it can decipher practical AES cryptography LSIs.
Youhua SHI Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
This paper presents a novel X-handling technique, which removes the effect of unknowns on compacted test response with maximal compaction ratio. The proposed method combines with the current X-tolerant compactors and inserts masking cells on scan paths to selectively mask X's. By doing this, the number of unknown responses in each scan-out cycle could be reduced to a reasonable level such that the target X-tolerant compactor would tolerate with guaranteed possible error detection. It guarantees no test loss due to the effect of X's, and achieves the maximal compaction that the target response compactor could provide as well. Moreover, because the masking cells are only inserted on the scan paths, it has no performance degradation of the designs. Experimental results demonstrate the effectiveness of the proposed method.
Shoko KURODA Sho TANAKA Shigeo NAOI Yozo TAKEDA Ryusuke MIYAMOTO Takao HARA Minoru OKADA
This paper proposes an architecture of an interference canceller for satellite communications with super-posed transmission, which is applicable not only to QPSK but also to 16QAM transmission to get higher satellite capacity. We implement it as an FPGA-based prototype and verify its performance. We propose here to use a new method to measure the satellite round-trip delay using an extended matched filter (EMF), which can work in low C/N conditions such as 0 dB and under. Given this performance, our canceller can work in a network in which forward and reverse links have the same power level. The results of the laboratory tests for QPSK show that interference can be suppressed by about 30 dB and that the BER degradation due to the canceller was small enough for operation.