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  • 3-Gb/s CMOS 1:4 MUX and DEMUX ICs

    Sadayuki YASUDA  Yusuke OHTOMO  Masayuki INO  Yuichi KADO  Toshiaki TSUCHIYA  

     
    PAPER

      Vol:
    E78-C No:12
      Page(s):
    1746-1753

    We have developed a design technique for static logic circuits. Using this technique, we designed 1/2 divider-type 1:4 demultiplexer (DEMUX) and 2:1 selector-type 4:1 multiplexer (MUX) circuits, each of which is a key component in high-speed data multiplexing and demultiplexing. These circuits consist of double rail flip-flops (DR F/F). These flip-flops have a smaller mean internal capacitance than single rail flip-flops, making them suitable for high-speed operation. The DR F/F has a symmetric structure, so the double rail toggle flip-flop can put out an exactly balanced CK/CKN signal, which boosts the speed of the data flip-flops. The double rail structure enables 30% faster operation but consumes only 17% more power (per GHz) than a single rail circuit. In addition, our 0.25-µm process technology provides a 70% higher frequency operation than 0.5-µm process technology. At the supply voltage of 2.2 V, the DEMUX circuit and the MUX circuit operate at 4.55 GHz and 2.98 GHz, respectively. In addition, the 0.25-µm DEMUX circuit and the MUX circuit respectively consume 6.0 mW/GHz and 13.7 mW/GHz (@1.3 V), which are only 12% of the power consumed by 3.3-V 0.5-µm circuits. Because of its high-speed and low-power characteristics, our design technique will greatly contribute to the progress of large-scale high-speed telecommunication systems.

  • A Circuit Library for Low Power and High Speed Digital Signal Processor

    Hiroshi TAKAHASHI  Shigeshi ABIKO  Shintaro MIZUSHIMA  Yuni OZAWA  

     
    PAPER

      Vol:
    E78-C No:12
      Page(s):
    1717-1725

    A new high performance digital signal processor (DSP) that lowers power consumption, reduces chip count, and enables system cost savings for wireless communications applications was developed. The new device contains high performance, hard-wired functionality with a specialized instruction set to effectively implement the worldwide digital cellular standard algorithms, including GSM, PDC and NADC, and also features both full rate and future half rate processing by software modules. The device provides a wider operating voltage ranging from 1.5 V to 5.5 V using 5 V process based on the market requirement of 5 V supply voltage, even though a power supply voltage in most applications will be shifted to 3 V. Several circuits was newly developed to achieve low power consumption and high speed operation at both 5 V and 3 V process using the same data base. The device also features over 50 MIPS of processing power with low power consumption and 100 nA stand-by current at either 3 V or 5 V. One remarkable advantage is a flexible CPU core approach for the future spin-off devices with different ROM/RAM configurations and peripheral modules without requiring any CPU design changes. This paper describes the architecture of a lower power and high speed design with effective hardware and software modules implementations.

  • A 600 mW Single Chip MPEG2 Video Decoder

    Kiyoshi MIURA  Hideki KOYANAGI  Hiroshi SUMIHIRO  Seiichi EMOTO  Nozomu OZAKI  Toshiro ISHIKAWA  

     
    PAPER

      Vol:
    E78-C No:12
      Page(s):
    1691-1696

    This paper describes a 600 mV single-chip MPEG2 video decoder, implemented in a 0.5 µm triple metal CMOS technology, which operates with a 3.3-volt power supply. To achieve low power consumption, a low power dual-port RAM has been developed utilizing a selective bit line precharge scheme to reduce bit line current which is suitable for use in the bit-slice array commonly found in parametric ASIC RAM macro modules. This architecture and a non-DC current sense amp make the RAM's read power consumption one-third of that of a conventional dual-port RAM. Various techniques such as multiple-clock architecture and a system clock independent from a display clock make a system clock frequency as low as possible. The video decoder has a syntax parser, so that it can handle the higher syntactic elements of MPEG2 bit streams without any host processor and decode the Main profile at Main level of MPEG2 bit streams.

  • Principal Component Analysis for Remotely Sensed Data Classified by Kohonen's Feature Mapping Preprocessor and Multi-Layered Neural Network Classifier

    Hiroshi MURAI  Sigeru OMATU  Shunichiro OE  

     
    PAPER

      Vol:
    E78-B No:12
      Page(s):
    1604-1610

    There have been many developments on neural network research, and ability of a multi-layered network for classification of multi-spectral image data has been studied. We can classify non-Gaussian distributed data using the neural network trained by a back-propagation method (BPM) because it is independent of noise conditions. The BPM is a supervised classifier, so that we can get a high classification accuracy by using the method, so long as we can choose the good training data set. However, the multi-spectral data have many kinds of category information in a pixel because of its pixel resolution of the sensor. The data should be separated in many clusters even if they belong to a same class. Therefore, it is difficult to choose the good training data set which extract the characteristics of the class. Up to now, the researchers have chosen the training data set by random sampling from the input data. To overcome the problem, a hybrid pattern classification system using BPM and Kohonens feature mapping (KFM) has been proposed recently. The system performed choosing the training data set from the result of rough classification using KFM. However, how the remotely sensed data had been influenced by the KFM has not been demonstrated quantitatively. In this paper, we propose a new approach using the competitive weight vectors as the training data set, because we consider that a competitive unit represents a small cluster of the input patterns. The approach makes the training data set choice work easier than the usual one, because the KFM can automatically self-organize a topological relation among the target image patterns on a competitive plane. We demonstrate that the representative of the competitive units by principal component analysis (PCA). We also illustrate that the approach improves the classification accuracy by applying it on the classification of the real remotely sensed data.

  • A Method for Detection and Analysis of Change between Multitemporal Images

    Hiroshi HANAIZUMI  Shinji CHINO  Sadao FUJIMURA  

     
    PAPER

      Vol:
    E78-B No:12
      Page(s):
    1611-1616

    A new method is proposed for realizing a flexible change detection which is free from the limitation that multitemporal images must have the same spectral bands whose center wavelength and bandwidth are identical. As spaceborne multispectral scanners are continuously improved for performance and new scanners do not necessarily have the same spaectral bands for observation, this limitation is a serious obstacle for detecting long term temporal change. The proposed method removes this limitation by using an image normalization technique based on multiple regression analysis. The method is successfully applied to actual remotely sensed multitemporal images.

  • Low-power LSI Circuit Technologies for Portable Terminal Equipment

    Shoji HORIGUCHI  Tsuneo TSUKAHARA  Hideki FUKUDA  

     
    INVITED PAPER

      Vol:
    E78-C No:12
      Page(s):
    1655-1667

    This paper surveys trends in and prospects for low power LSI circuits technologies for portable terminal equipment, in which low-voltage operation of LSIs will be emphasized because this equipment will be battery-powered. Since this brings about serious operation speed degradation of LSIs, however, it will become more and more important how to operate them faster under low-supply voltage. We propose two new circuit techniques that make it possible to operate LSIs at high speed even when the supply voltage is very low (1-2 V corresponding to one or two battery cells). The new low-voltage RF LSI circuit technique, developed using silicon bipolar technology and using a novel current-folded mixer architecture for the modulator, result in a highly linear modulator that operates at 2 V. Its power consumption is less than 2/3 that of previously reported ICs. And for a low voltage baseband LSI we propose the multi-threshold CMOS (MTCMOS) technique, which uses two sets of threshold-voltage levels so that the LSI can operate at high speed when driven by a 1-V power supply. The multi-threshold CMOS architecture enabled us to create LSIs that operate faster than conventional CMOS circuits using high-threshold-voltage MOSFETs. When operating with a 1-V power supply, our LSIs are three times faster than the conventional ones.

  • Validation of UDL/I Test Suites and UDL/I Simulation/Synthesis Environment

    Hiroyuki KANBARA  Satoshi YOKOTA  

     
    PAPER

      Vol:
    E78-A No:12
      Page(s):
    1749-1754

    UDL/I test suites and UDL/I Simulation/Synthesis Environment had been developed separately in parallel. Both were designed from syntax and semantics definition of UDL/I Language Reference Manual. Through test of the UDL/I Simulation/Synthesis Environment using the UDL/I test suites, quality of the test suites and the environment had been improved. Finally all the testing result matched with expected one. It was validated that both the test suites and the environment followed UDL/I language specification.

  • Conformance Test of a Logic Synthesis System to the Standard HDL UDL/I

    Satoshi YOKOTA  Hiroyuki KANBARA  

     
    PAPER

      Vol:
    E78-A No:12
      Page(s):
    1742-1748

    This paper presents testing methods for a logic synthesis system which supports the standard HDL UDL/I, focusing on conformance test to the language specification. Conformance test, to prove that the system completely satisfies the language specification, is very important to provide a unified design environment for users of CAD tools which support the language. The basic idea of our testing methods is using a logic simulator, due to a limited schedule for the test execution. We classified the test into two: unit test and integration test. Unit test is a test of each individual functionality of the system, and integration test is a test to prove that the whole system works correctly and satisfies the language specification. And we prepared and used various kinds of test data. One of them is the UDL/I Test Suite and it was also utilized to observe progress of language coverage by the system during the test execution.

  • A CAM-Based Parallel Fault Simulation Algorithm with Minimal Storage Size

    Shinsuke OHNO  Masao SATO  Tatsuo OHTSUKI  

     
    PAPER

      Vol:
    E78-A No:12
      Page(s):
    1755-1764

    CAMs (Content Addressable Memories) are functional memories which have functions such as word-parallel equivalence search, bilateral 1-bit data shifting between consecutive words, and word-parallel writing. Since CAMs can be integrated because of their regular structure, massively parallel CAM functions can be executed. Taking advantage of CAMs, Ishiura and Yajima have proposed a parallel fault simulation algorithm using a CAM. This algorithm, however, requires a large amount of CAM storage to simulate large-scale circuits. In this paper, we propose a new massively parallel fault simulation algorithm requiring less CAM storage, and compare it with Ishiura and Yajima's algorithm. Experimental results of the algorithm on CHARGE --the CAM-based hardware engine developed in our laboratory--are also reported.

  • Mincut Partitioning Acceleration Using Hardware CAD Accelerator TP5000

    Masahiro SANO  Shintaro SHIMOGORI  Fumiyasu HIROSE  

     
    PAPER

      Vol:
    E78-A No:12
      Page(s):
    1785-1792

    This paper presents a new approach of data pipelining for mincut partitioning acceleration using a parallel computer. When using a parallel computer, it is important to have many processors always active, also the quality of the partitioning must not be sacrificed. Out approach covers both speed and quality. We choose the hardware CAD accelerator TP5000 to implement our approach, which consists of dedicated Very Long Instruction Word (VLIW) processors with high-speed interconnections. The TP5000 allows its connections to be reconfigured to optimize the data pipelines. We estimate that the speed of our approach using 10 processors on the TP5000 is 30 times faster than a SPARCStation-10.

  • Thermal Noise in Silicon Bipolar Transistors and Circuits for Low-Current Operation--Part : Compact Device Model--

    Yevgeny V. MAMONTOV  Magnus WILLANDER  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:12
      Page(s):
    1761-1772

    This work deals with thermal-noise modeling for silicon vertical bipolar junction transistors (BJTs) and relevant integrated circuits (ICs) operating at low currents. The two-junction BJT compact model is consistently derived from the thermal-noise generalization of the Shockley semiconductor equations developed in work which treats thermal noise as the noise associated with carrier velocity fluctuations. This model describes BJT with the Itô non-linear stochastic-differential-equation (SDE) system and is suitable for large-signal large-fluctuation analysis. It is shown that thermal noise in silicon p-n-junction diode contributes to "microplasma" noise. The above model opens way for a consistent-modeling-based design/optimization of bipolar device noise performance with the help of theory of Itô's SDEs.

  • Parallel Genetic Algorithms Based on a Multiprocessor System FIN and Its Application

    Myung-Mook HAN  Shoji TATSUMI  Yasuhiko KITAMURA  Takaaki OKUMOTO  

     
    PAPER-Algorithms and Data Structures

      Vol:
    E78-A No:11
      Page(s):
    1595-1605

    Genetic Algorithm (GA) is the method of approaching optimization problem by modeling and simulating the biological evolution. As the genetic algorithm is rather time consuming, the use of a parallel genetic algorithm can be advantage. This paper describes new methods for fine-grained parallel genetic algorithm using a multiprocessor system FIN. FIN has a VLSI-oriented interconnection network, and is constructed from a viewpoint of fractal geometry so that self-similarity is considered in its configuration. The performance of the proposed methods on the Traveling Salesman Problem (TSP), which is an NP-hard problem in the field of combinatorial optimization, is compared to that of the simple genetic algorithm and the traditional fine-grained parallel genetic algorithm. The results indicate that the proposed methods yield improvement to find better solutions of the TSP.

  • The Skipping Technique: A Simple and Fast Algorithm to Find the Pitch in CELP Vocoder

    JooHun LEE  MyungJin BAE  Souguil ANN  

     
    PAPER-Digital Signal Processing

      Vol:
    E78-A No:11
      Page(s):
    1571-1575

    A fast pitch search algorithm using the skipping technique is proposed to reduce the computation time in CELP vocoder. Based on the characteristics of the correlation function of speech signal, the proposed algorithm skips over certain ranges in the full pitch search range in a simple way. Though the search range is reduced, high speech quality can be maintained since those lags having high correlation values are not skipped over and are used for search by closed-loop analysis. To improve the efficiency of the proposed method, we develop three variants of the skipping technique. The experimental results show that the proposed and the modified algorithm can reduce the computation time in the pitch search considerably, over 60% reduction compared with the traditional full search method.

  • High-Density Optical Storage with Multiplexed Holographic Recording Method

    Tatsuya KUME  Koutarou NONAKA  Manabu YAMAMOTO  

     
    PAPER

      Vol:
    E78-C No:11
      Page(s):
    1601-1606

    Theoretical and experimental results are presented for angle-multiplexed and wavelength-multiplexed holographic recording. The recording medium is a cerium doped Sr1-XBaXNb2O6 (SBN) single crystal, and the light sources are a laser diode excited second harmonic generation (SHG) laser and a tunable laser diode. The SBN single crystal has high recording sensitivity, high diffraction efficiency and high temperature stability. The laser diodes miniaturize the holographic recording system. Crosstalk between hologram pages is theoretically calculated by using modified coupled-wave equations, and is also experimentally measured. The experimental results agree well with the theoretical results. Two-dimensional alphabetical character images are recorded using angle- and wavelength-multiplexed holographic methods, and are successfully reconstructed. The theoretical results indicate that several hundred multiplexed holograms can be recorded with little crosstalk using the proposed system. This multiplexed holographic recording technique will enable high-density recording and high data-transfer rates.

  • An Object-Oriented Approach to Temporal Multimedia Data Modeling

    Yoshifumi MASUNAGA  

     
    PAPER-Model

      Vol:
    E78-D No:11
      Page(s):
    1477-1487

    This paper discusses an object-oriented approach to temporal multimedia data modeling in OMEGA; a multimedia database management under development at the University of Library and Information Science. An object-orientated approach is necessary to integrate various types of heterogeneous multimedia data, but it has become clear that current object-oriented data models are not sufficient to represent multimedia data, particularly when they are temporal. For instance, the current object-oriented data models cannot describe objects whose attribute values change time-dependently. Also, they cannot represent temporal relationships among temporal multimedia objects. We characterize temporal objects as instances of a subclass of class TimeInterval with the temporal attributes and the temporal relationships. This temporal multimedia data model is designed upward compatible with the ODMG-93 standard object model. To organize a temporal multimedia database, a five temporal axes model for representing temporal multimedia objects is also introduced. The five temporal axes--an absolute, an internal, a quasi-, a physical, and a presentation time axis--are necessary to describe time-dependent properties of multimedia objects in modeling, implementing and use. A concrete example of this organization method is also illustrated.

  • High-Resolution Analysis of Indoor Multipath Propagation Structure

    Yasutaka OGAWA  Norihiro HAMAGUCHI  Kohzoh OHSHIMA  Kiyohiko ITOH  

     
    PAPER

      Vol:
    E78-B No:11
      Page(s):
    1450-1457

    Analyzing multipath propagation structure is important to develop anti-fading techniques for high-speed digital radio systems. Several techniques have been employed to measure delay profiles and/or arrival angles. This paper presents a simultaneous estimation method of delay times and arrival angles of indoor multipath waves. We obtain frequency-domain data at different receiving antenna positions using a network analyzer. We estimate the propagation parameters by means of a two-dimensional MUSIC algorithm. In order to obtain reliable results, a two-dimensional discrete inverse Fourier transform and a gating technique are employed before the MUSIC algorithm. Simulation and experimental results show that the proposed method can estimate the propagation parameters properly.

  • Reliability of 3-D Reconstruction by Stereo Vision

    Yasushi KANAZAWA  Kenichi KANATANI  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E78-D No:10
      Page(s):
    1301-1306

    Theoretically, corresponding pairs of feature points between two stereo images can determine their 3-D locations uniquely by triangulation. In the presence of noise, however, corresponding feature points may not satisfy the epipolar equation exactly, so we must first correct the corresponding pairs so as to satisfy the epipolar equation. In this paper, we present an optimal correction method based on a statistical model of image noise. Our method allows us to evaluate the magnitude of image noise a posteriori and compute the covariance matrix of each of the reconstructed 3-D points. We demonstrate the effectiveness of our method by doing numerical simulation and real-image experiments.

  • A Selective Invalidation Strategy for Cache Coherence

    Cosimo Antonio PRETE  Gianpaolo PRINA  Luigi RICCIARDI  

     
    LETTER-Computer Hardware and Design

      Vol:
    E78-D No:10
      Page(s):
    1316-1320

    The overall performance of a shared-memory, common bus multiprocesser system can be seriously affected by useless coherence-related actions. This occurs, in particular, when a private data block of a process becomes resident in more than one cache as a consequence of the migration of the owner process. We introduce a hardware solution to eliminate these useless shared copies, and show how this technique can be applied to a specific coherence protocol. Two extreme workload conditions are properly selected to evaluate the performance of a multiprocessor system.

  • Three-Dimensional Analytical Electrostatic Green's Functions for Shielded and Open Arbitrarily Multilayered Medium Structures and Their Application to Analysis of Microstrip Discontinuities

    Keren LI  Kazuhiko ATSUKI  

     
    PAPER

      Vol:
    E78-C No:10
      Page(s):
    1366-1372

    In this paper, we present for the first time two three-dimensional analytical electrostatic Green's functions for shielded and open arbitrarily multilayered medium structures. The analytical formulas for the Green's functions are simply expressed in the form of Fourier series and integrals, and are applicable to the arbitrary number of dielectric layers. In combination with the complex image charge method, we demonstrate an efficient application to analyze microstrip discontinuities in a three-layered dielectric structure. Numerical results for the capacitance associated with on open-end discontinuity show good agreement with those from a previous paper and the effectiveness of using the analytical Green's functions to analyze three-dimensional electrostatic problems.

  • Electromagnetic Wave Scattering in Media Whose Particles are Randomly Displaced from a Uniformly Ordered Spatial Distribution

    Mitsuo TATEIBA  

     
    INVITED PAPER

      Vol:
    E78-C No:10
      Page(s):
    1357-1365

    Coherent and incoherent electromagnetic (EM) waves scattered by many particles are approximately expressed as solutions of integral equations by unconventional multiple scattering method. The particles are randomly displaced from a uniformly ordered distribution, and hence the distribution of particles can change from total uniformity to complete randomness. The approximate expressions of the EM waves are systematically given, independent of the distributions of particles, on the following assumptions. First the particles are identical in material, shape, size and orientation. Second each random displacement of particles from the ordered positions is statistically independent of each other and homogeneous in space. These assumptions may be extended to more general ones but have been used here to make clear the derivation process of the coherent and incoherent EM waves. The approximate expressions of the EM waves are reduced to known ones for both limiting cases: a periodic distribution and a very sparse random distribution. The effective dielectric constant of a random medium containing randomly distributed dielectric spheres can be calculated from the coherent EM wave and compared with those given by conventional methods such as the quasi-crystalline approximation, using the previous results. The comparison indicates the advantage of the method presented here. The present method is expected to be useful for the study of interaction of EM waves with many particles.

4341-4360hit(4754hit)