We developed a flexible-logic-gate single-electron device (SED) in which logic functions can be selected by changing the voltage applied to the control gate. It consists of an array of nanodots with multiple inputs and multiple outputs. Since the gate electrodes couple capacitively to the many dots underneath, complicated characteristics depending on the combination of the gate voltages yield a selectable logic gate when some of the gate electrodes are used as control gates. One of the important issues is how to design the arrangement of nanodots and gate electrodes. In this study, we fabricated a Si nanodot array with two simple input gates and two output terminals, in which each gate was coupled to half of the nanodot array. Even though the device had a very simple input-gate arrangement and just one control gate, we could create a half-adder function through the use of current maps as functions of the input gate voltages. We found that the nanodots evenly coupled capacitively to both input gates played an important role in getting a basic set of logic functions. Moreover, these results guarantee that a more complicated input-gate structure, in which each gate evenly couples many nanodots, will yield more complicated functions.

It has been an important issue to deal with risks in business processes for achieving companies' goals. This paper introduces a method for applying a formal method to analysis of risks and control activities in business processes in order to evaluate control activities consistently, exhaustively, and to give us potential to have scientific discussion on the result of the evaluation. We focus on document flows in business activities and control activities and risks related to documents because documents play important roles in business. In our method, document flows including control activities are modeled and it is verified by OTS/CafeOBJ Method that risks about falsification of documents are avoided by control activities in the model. The verification is done by interaction between humans and CafeOBJ system with theorem proving, and it raises potential to discuss the result scientifically because the interaction gives us rigorous reasons why the result is derived from the verification.

Chemical sensors are one of the oldest fields of research closely related to the semiconductor technology. From the Ion-Sensitive Field-Effect Transistors (ISFET) in the 70's, through Micro-Electro-Mechanical-System (MEMS) sensors from the end of the 80's, chemical sensors are combining in the 90's MEMS technology with LSI intelligence to devise more selective, sensitive and autonomous devices to analyse complex mixtures. A brief history of chemical sensors from the ISFET to the nowadays LSI integrated sensors is first detailed. Then the states-of-the-art of LSI integrated chemical sensors and their wide range of applications are discussed. Finally the authors propose a brand-new usage of integrated wireless MEMS sensors for remote surveillance of chemical substances, such as food-industry or pharmaceutical products, that are stored in closed environment like a bottle, for a long period. In such environment, in-situ analyse is necessary, and electrical cables, for energy supply or data transfer, cannot be used. Thanks to integrated MEMS, an autonomous long-term in-situ quality deterioration tracking system is possible.

As RFID technology is being more widely adopted, it is fairly common to read mobile tags using RFID systems, such as packages on conveyer belt and unit loads on pallet jack or forklift truck. In RFID systems, multiple tags use a shared medium for communicating with a reader. It is quite possible that tags will exit the reading area without being read, which results in tag leaking. In this letter, a reliable tag anti-collision algorithm for mobile tags is proposed. It reliably estimates the expectation of the number of tags arriving during a time slot when new tags continually enter the reader's reading area and no tag leaves without being read. In addition, it gives priority to tags that arrived early among read cycles and applies the expectation of the number of tags arriving during a time slot to the determination of the number of slots in the initial inventory round of the next read cycle. Simulation results show that the reliability of the proposed algorithm is close to that of DFSA algorithm when the expectation of the number of tags entering the reading area during a time slot is a given, and is better than that of DFSA algorithm when the number of time slots in the initial inventory round of next read cycle is set to 1 assuming that the number of tags arriving during a time slot follows Poisson distribution.

This paper proposes a wide-band noise reduction method using a zero phase (ZP) signal which is defined as the IDFT of a spectral amplitude. When a speech signal has periodicity in a short observation, the corresponding ZP signal becomes also periodic. On the other hand, when a noise spectral amplitude is approximately flat, its ZP signal takes nonzero values only around the origin. Hence, when a periodic speech signal is embedded in a flat spectral noise in an analysis frame, its ZP signal becomes a periodic signal except around the origin. In the proposed noise reduction method, we replace the ZP signal around the origin with the ZP signal in the second or latter period. Then, we get an estimated speech ZP signal. The major advantages of this method are that it can reduce not only stationary wide-band noises but also non-stationary wide-band noises and does not require a prior estimation of the noise spectral amplitude. Simulation results show that the proposed noise reduction method improves the SNR more than 5 dB for a tunnel noise and 13 dB for a clap noise in a low SNR environment.

Cognitive radios are intelligent communications, and are expected to more efficiently utilize the radio channel. Modulation identification is one of the key issues in the cognitive radios. Many works were devoted to the classification of symbol-by-symbol modulations, however, few papers on block modulations have been published. In this paper, an identification error analysis is presented for block orthogonal modulations using General Orthogonal Modulation~(GOM). A symbol error probability is derived for the identified block orthogonal modulation. Numerical results of 4-dimensional block orthogonal modulation are presented with simulation results.

A simple image compression scheme is presented for various types of images, which include color/grayscale images, color-quantized images, and bilevel images such as document and digital halftone images. It is a bitplane coding composed of a new context modeling and adaptive binary arithmetic coding. A target bit to be encoded is conditioned by the estimates of the neighboring pixels including non-causal locations. Several functionalities are also integrated. They are arbitrary shaped ROI transmission, selective tile partitioning, accuracy scalability, and others. The proposed bitplane codec is competitive with JPEG-LS in lossless compression of 8-bit grayscale and 24-bit color images. The proposed codec is close to JBIG2 in bilevel image compression. It outperforms the existing standards in compression of 8-bit color-quantized images.

In this paper, we analyze the key factors underlying the implementation, evaluation, and optimization of image processing and computer vision algorithms on embedded GPU using OpenGL ES 2.0 shader model. First, we present the characteristics of the embedded GPU and its inherent advantage when compared to embedded CPU. Additionally, we propose techniques to achieve increased performance with optimized shader design. To show the effectiveness of the proposed techniques, we employ cartoon-style non-photorealistic rendering (NPR), speeded-up robust feature (SURF) detection, and stereo matching as our example algorithms. Performance is evaluated in terms of the execution time and speed-up achieved in comparison with the implementation on embedded CPU.

In order to improve the address discharge characteristics, we propose the modified selective reset waveform utilizing the address-bias voltage (Va-bias) during the ramp-up period. It is revealed that the proper Va-bias makes the weak discharge between the address and scan electrodes which plays a role in sufficiently removing the wall charge, thereby contributing to minimizing the wall-voltage variation during the address-period. As a result of adopting the Va-bias in the conventional selective reset driving waveform, it was found that the address discharge delay time can be shortened by approximately 40 ns and the address period of each subfield can be significantly reduced by about 43 µs.

Acoustic data transmission is a technique which embeds data in a sound wave imperceptibly and detects it at a receiver. The data are embedded in an original audio signal and transmitted through the air by playing back the data-embedded audio using a loudspeaker. At the receiver, the data are extracted from the received audio signal captured by a microphone. In our previous work, we proposed an acoustic data transmission system designed based on phase modification of the modulated complex lapped transform (MCLT) coefficients. In this paper, we propose the spectral magnitude adjustment (SMA) technique which not only enhances the quality of the data-embedded audio signal but also improves the transmission performance of the system.

We have studied resistance-switching properties of RF sputtered Si-rich oxides sandwiching with Pt electrodes. By sweeping bias to the top Pt electrode, non-polar type resistance switching was observed after a forming process. In comparison to RF sputtered TiOx case, significant small current levels were obtained in both the high resistance state (HRS) and the low resistance state (LRS). And, even with decreasing SiOx thickness down to 8 nm from 40 nm, the ON/OFF ratio in resistance-switching between HRS and LRS as large as 103 was maintained. From the analysis of current-voltage characteristics for Pt/SiOx on p-type Si(100) and n-type Si(100), it is suggested that the red-ox (REDction and OXidation) reaction induced by electron fluence near the Pt/SiOx interface is of importance for obtaining the resistance-switching behavior.

In this paper, we propose a synthesis method for asynchronous circuits with bundled-data implementation. The proposed method iteratively applies behavioral synthesis and floorplanning to obtain a near optimum circuit in the term of latency under given design constraints. To improve latency, behavioral synthesis and floorplanning are carried out so that the delay of the control circuit is minimized and the addition of delay elements to satisfy timing constraints is minimized. We evaluate the effectiveness of the proposed method in terms of latency, area, and the number of timing violations while synthesizing several benchmarks. Experimental results show that the proposed method synthesizes faster circuits compared to the circuit synthesized without the proposed method. Also, the proposed method is effective to reduce the number of timing violations.

A Drude-critical points (D-CP) model for considering metal dispersion is newly incorporated into the frequency-dependent FDTD method using the simple trapezoidal recursive convolution (TRC) technique. Numerical accuracy is investigated through the analysis of pulse propagation in a metal (aluminum) cladding waveguide. The TRC technique with a single convolution integral is found to provide higher accuracy, when compared with the recursive convolution counterpart. The methodology is also extended to the unconditionally stable FDTD based on the locally one-dimensional scheme for efficient frequency-dependent calculations.

We previously proposed a unified wireless system called “Flexible Wireless System”. Comprising of flexible access points and a flexible signal processing unit, it collectively receives a wideband spectrum that includes multiple signals from various wireless systems. In cases of simultaneous multiple signal reception, however, reception performance degrades due to the interference among multiple signals. To address this problem, we propose a new signal separation and reconstruction method for spectrally overlapped signals. The method analyzes spectral information obtained by the short-time Fourier transform to extract amplitude and phase values at each center frequency of overlapped signals at a flexible signal processing unit. Using these values enables signals from received radio wave data to be separated and reconstructed for simultaneous multi-system reception. In this paper, the BER performance of the proposed method is evaluated using computer simulations. Also, the performance of the interference suppression is evaluated by analyzing the probability density distribution of the amplitude of the overlapped interference on a symbol of the received signal. Simulation results confirmed the effectiveness of the proposed method.

This paper describes a method for estimating Direction Of Arrival (DOA) of multiple sound sources in full azimuth with three microphones. Estimating DOA with paired microphone arrays creates imaginary sound sources because of time delay of arrival (TDOA) being identical between real and imaginary sources. Imaginary sound sources can create chronic problems in multiple Sound Source Localization (SSL), because they can be localized as real sound sources. Our proposed approach is based on the observation that each microphone array creates imaginary sound sources, but the DOA of imaginary sources may be different depending on the orientation of the paired microphone array. With the fact that a real source would always be localized in the same direction regardless of the array orientation, we can suppress the imaginary sound sources by minimum filtering based on Steered Response Power – Phase Transform (SRP-PHAT) method. A set of experiments conducted in a real noisy environment showed that the proposed method was accurate in localizing multiple sound sources.

A new codebook mapping algorithm for artificial bandwidth extension (ABE) is introduced in this paper. We design a wideband line spectrum pair (LSP) codebook which is coupled with the same index as the LSP codebook of a narrowband speech codec. The received narrowband LSP codebook indices are used to directly induce wideband LSP codewords. Thus, the proposed scheme eliminates codebook search processing to estimate the wideband spectrum envelope. We apply the proposed scheme to bandwidth extension in adaptive multi-rate (AMR) compressed domain. Its performance is assessed via the perceptual evaluation of speech quality (PESQ), informal listening tests, and weighted million operations per second (WMOPS) calculations.

A novel high speed 4-2 compressor using static and pass-transistor logic, has been designed in a 0.35 µm CMOS technology. In order to reduce gate level delay and increase the speed, some changes are performed in truth table of conventional 4-2 compressor which leaded to the simplification of logic function for all parameters. Therefore, power dissipation is decreased. In addition, because of similar paths from all inputs to the outputs, the delays are the same. So there will be no need for extra buffers in low latency paths to equalize the delays.

Switched parasitic capacitors of sleep blocks with a tri-mode power gating structure are implemented to reduce on-chip resonant supply noise in 1.2 V, 65 nm standard CMOS process. The tri-mode power gating structure makes it possible to store charge into the parasitic capacitance of the power gated blocks. The proposed method achieves 53.1% and 57.9% noise reduction for wake-up noise and 130 MHz periodic supply noise, respectively. It also realizes noise cancelling without discharging time before using parasitic capacitors of sleep blocks, and shows 8.4x boost of the effective capacitance value with 2.1% chip area overhead. The proposed method can save the chip area for reducing resonant supply noise more effectively.

To measure the detrusor pressure for diagnosing lower urinary tract symptoms, we designed a small-area and low-power System on a Chip (SoC). The SoC should be small and low power because it is encapsulated in tiny air-tight capsules which are simultaneously inserted in the urinary bladder and rectum for several days. Since the SoC is also required to be programmable, we designed an Application Specific Instruction set Processor (ASIP) for pressure measurement and wireless communication, and implemented almost required functions on the ASIP. The SoC was fabricated using a 0.18 µm CMOS mixed-signal process and the chip size is 2.5 2.5 mm2. Evaluation results show that the power consumption of the SoC is 93.5 µW, and that it can operate the capsule for seven days with a tiny battery.

Dynamic Framed Slotted ALOHA (DFSA) is one of the most popular protocols to resolve tag collisions in RFID systems. In DFSA, it is widely known that the optimal performance is achieved when the frame size is equal to the number of tags. So, a reader dynamically adjusts the next frame size according to the current number of tags. Thus it is important to estimate the number of tags exactly. In this paper, we propose a novel tag estimation and identification method using litmus (test) slots for DFSA. We compare the performance of the proposed method with those of existing methods by analysis. We conduct simulations and show that our scheme improves the speed of tag identification.