This paper briefly considers future broadcasting technologies, including digital television as a system for the near future and three-dimensional television as a part of a system to be developed rather later. However, due to limitations of space, this paper discusses only video technologies in detail. First, the status of bit reduction technologies for digital television is described and then satellite digital broadcasting and terrestrial digital broadcasting are also discussed. The authors stress the necessity of the further development of digital video compression technologies. Later, we discuss three-dimensional television, we describe requirements for the service and the present status of the technologies. And last, the paper considers the future prospects for a three-dimensional television service.

This paper describes bandpass filters using linear tapered transmission line resonators (LTLR's). Bandpass filters are designed on the basis of the approximate description of LTLR's with cascaded multi-sections of uniform transmission lines whose widths are slightly different. By this design method, the fundamental characteristics of LTLR's and filter design parameters can be easily obtained using a general-purpose microwave circuit simulator. Trial LTLR bandpass filters showed excellent performance such as low insertion losses and the ability to control spurious responses, then their measured responses indicated close correspondence with the design results.

Novel three-dimensional structures for passive elements--inductors, capacitors, transmission lines, and airbridges--have been developed to reduce the area they consume in GaAs MMICs. These structures can be formed with a simple technology by electroplating along the sidewalls of a photoresist. Adopting the new structures, most passive elements in MMICs have been shrunk to less than 1/4 the size of conventional ones.

This paper deals with the uniqueness of a solution of the basic equation obtained from the analysis of resistive circuits including ideal diodes. The equation in consideration is of the type of (A-)X=b, where A is a constant matrix, b a constant vector, X an unknown vector satisfying X 0, and a diagonal matrix whose diagonal elements take the value 0 or 1 arbitrarily. The necessary and sufficient conditions for the equation to have a unique solution X 0 for an arbitrary vector b are shown. Some numerical examples are given for the illustration of the result.

Manipulation of Boolean functions is one of the most important techniques for implementing of VLSI logic design systems. This paper presents a fast method for generating prime-irredundant covers from Binary Decision Diagrams (BDDs), which are efficient representation of Boolean functions. Prime-irredundant covers are forms in which each cube is a prime implicant and no cube can be eliminated. This new method generates compact cube sets from BDDs directly, in contrast to the conventional cube set reduction algorithms, which commonly manipulate redundant cube sets or truth tables. Our method is based on the idea of a recursive operator, proposed by Morreale. Morreale's algorithm is also based on cube set manipulation. We found that the algorithm can be improved and rearranged to fit BDD operations efficiently. The experimental results demonstrate that our method is efficient in terms of time and space. In practical time, we can generate cube sets consisting of more than 1,000,000 literals from multi-level logic circuits which have never previously been flattened into two-level logics. Our method is more than 10 times faster than ESPRESSO in large-scale examples. It gives quasi-minimum numbers of cubes and literals. This method should find many useful applications in logic design systems.

The performance of analog circuits is strongly influenced by their layout. Performance specifications are usually translated into physical constraints such as symmetry, common orientation, and distance constraints among certain components. Automatic digital layout tools can be adopted and modified to deal with the imposed performance constraints on the analog layout. The selection and modifications of algorithms to handle the analog constraints became the area of research in analog layout systems. The existing systems are characterized by the use of stochastic optimization techniques based placement, grid based or channel routers, and lack of compaction. In this paper, algorithms for analog circuit placement, routing, and compaction are presented. The proposed algorithms consider the analog oriented constraints, which are important from an analog layout point of view, and reduce the computation cost. The placement algorithm is based on a force directed method and consists of two main phases, each of which includes a tuning procedure. In the first phase, we solve a set of simultaneous linear equations, based upon the attractive forces. These attractive forces represent the interconnection topology of given blocks and some specified constraints. Symmetry constraint is considered throughout the tuning procedure. In the second phase, block overlap resulting from the first phase is resolved iteratively, where each iteration is followed by the symmetry tuning procedure. Routing is performed using a line expansion based gridless router. Routing constraints are taken into account and several routing priorities are imposed on the nets. The compactor part employs a constraint graph based algorithm while considering the analog symmetry constraints. The algorithms are implemented and integrated within an analog layout design system. An experimental result for an OP AMP provided by MCNC benchmark is shown to demonstrate the performance of the algorithms.

Oversampled analog-to-digital (A/D) converters based on sigma-delta (ΣΔ) modulation are attractive for VLSI implementation because they are especially tolertant of circuit nonidealities and component mismatch. Oversampled ΣΔ modulator has some points which must be improved. Some of these problems are based on the small input signal and the integrator leak. In this paper,ΣΔ A/D converter having a dither circuit to improve the linearity and the compensation technique of the integer leak are presented. By the simulation, the most suitable dither to improve the linearity of the modulator is obtained as follows: the amplitude is 1/150 of input signal maximum amplitude, the frequency is 4-times of the signal-band. Using the compensation circuit of the integrator leak, 72 dB of dynamic range is obtained when op-amp gain is 30 dB.

Switched-current (SI) is a current-mode analog sampled-data signal processing technique realizable in standard digital CMOS technologies. In this paper, new switched-current (SI) mirrors using OTAs (operational transconductance amplifiers) are proposed. These circuits are less sensitive to clock-feedthrough noise than conventional SI mirrors by virtue of linear I-V/V-I transformations. In addition, the current gain of the proposed mirror is electronically tunable. Not only inverting mirrors but also noninverting mirrors can be realized by this method.

This paper presents a hardware architecture design methodology for hidden markov model based recognition systems. With the aim of realizing more advanced and user-friendly systems, an effective architecture has been studied not only for decoding, but also learning to make it possible for the system to adapt itself to the user. Considering real-time decoding and the efficient learning procedures, a bi-directional ring array processor is proposed, that can handle various kinds of data and perform a large number of computations efficiently using parallel processing. With the array architecture, HMM sub-algorithms, the forward-backward and Baum-Welch algorithms for learning and the Viterbi algorithm for decoding, can be performed in a highly parallel manner. The indispensable HMM implementation techniques of scaling, smoothing, and estimation for multiple observations can be also carried out in the array without disturbing the regularity of parallel processing. Based on the array processor, we propose the configuration of a system that can realize all HMM processes including vector quantization. This paper also describes that a high PE utilization efficiency of about 70% to 90% can be achieved for a practical left-to-right type HMMs.

Behavior modeling of objects is critical in object-oriented design. In particular, it is essential to preserve integrity constraints on object behavior in application environments where objects of various classes dynamically interact with each other. In order to provide a stable design technique, a behavior model using the notion of the life cycle schema of a class is proposed. To model the aspect of behavioral abstraction of objects, the notion of schema refinement together with a diagrammatic representation technique is also defined. In this framework, a formalization of behavior constraints on objects which interact with each other is proposed together with its graphical representation. Verification rules of consistency of behavior constraints are also discussed. In order to perform certain functions, several partner objects of the same or different classes should collaborate establishing client-server relationships. The contract of a class is defined as a collection of responsibilities of a server class to a client class where each responsibility is specified in the form of the script. To achieve a high degree of systems integrity, a procedure to derive scripts from behavior constraints on collaborating partners is developed. It is also critical to evenly distribute responsibilities to partner objects. A delegation is placing a whole or a part of responsibilities of an object in charge of other objects. Based on the design principle delegation along the aggregation hierarchy,' a unified design approach to delegation that enables to reorganize scripts in constraints preserving way is proposed.

A superresolution technique is considered for use in antenna gain measurements. A modification of the MUSIC algorithm is employed to resolve incident signals separately in the time domain. The modification involves preprocessing the received data using a spatial scheme prior to applying the MUSIC algorithm. Interference rejection in the antenna measurements using the fast Fourier transform (FFT) based techniques have been realized by a recently developed vector network analyzer, and its availability has been reported in the literature. However, response resolution in the time domain of these conventional techniques is limited by the antenna bandwidth. The MUSIC algorithm has the advantage of being able to eliminate unwanted responses when performing antenna measurements in situations where the antenna band-width is too narrow to support FFT based techniques. In this paper, experimental results of antenna gain measurements in a multipath environment show the accuracy and resolving power of this technique.

The performance of processing elements can be improved by the progress of VLSI circuit technology, while the communication overhead can not be negligible in parallel processing system. This paper presents a unified scheduling that allocates tasks having different task processing times in multiple processing elements. The objective function is formulated to measure communication time between processing elements. By employing constraint conditions, the scheduling efficiently generates an optimal solution using an integer programming so that minimum communication time can be achieved. We also propose a VLSI processor for robotics whose latency is very small. In the VLSI processor, the data transfer between two processing elements can be done very quickly, so that the communication cycle time is greatly reduced.

This paper describes a 0.8-µm CMOS LSI developed for a 156-Mb/s serial interface in ATM switching systems. Recently, there have been increasing problems of connector pin neck and higher power consumption when enhancing switching system capacity. To overcome these problems, we have developed an LSI with a high-speed interface by using CMOS technology to achieve low power consumption. A low-swing differential signal level is used to achieve 156-Mb/s data transmission. We named this new circuit technique ALTS (Advanced Low-level Transmission circuit System). Using the LSI, transmission can be achieved between boards or racks through a 10-meter twisted pair cable. The LSI has a 156-Mb/s transmitter-receiver, a serial-to-parallel converter and a parallel-to-serial converter. It performs 19.5-Mb/s parallel data/156-Mb/s serial data conversion and 156-Mb/s serial data transmission. In addition, it has a bit phase synchronizer and cell synchronizer, which enables it to transmit and synchronize serial data without a paralleled clock or a paralleled cell top signal, by distributing a common 156-MHz clock and a common cell top signal to the whole system. We evaluated the bit error rate and timing margin on data transmission under several conditions. The results show that we can apply this LSI to commercially available ATM switching systems. This paper also describes methods of expanding switch capacity and transmitting 624-Mb/s data using this LSI.

This paper describes the fundamental principle of novel push-push oscillators using hairpin-shaped split-ring resonators and their application to voltage controlled and injection locked oscillators for frequency synthesizers. The experimental results make it clear that the synthesizer systems discussed here have the advantages of high frequency operation, compact size and low power consumption. Experimental work has been carried out in the L band, but these systems can be applied to much higher frequencies.

When a new fabrication process is set up, especially in layout design for functional cells, of practical importance is how to make the best use of layout resources so far accumulated in old fabrication processes. Usually layout data of each element are expressed mostly in terms of positional coordinate values, and hence it is extremely tedious to modify them at every change of design rules for a new fabrication technology. To cope with this difficulty, the present paper describes an automatic recycling scheme for layout resources accumulated dedicatedly for functional cell generation. The main subject of this scheme is to transform given layout data into a layout description format expressed in layout parameters. Once layout data are parameterized, layout patterns of functional cells can be reconstructed simply by tuning up parameters in accordance with a new set of design rules. A part of implementation results are also shown.

This paper proposes a second order auto-regressive equation with discrete-valued random coefficients. The auto-regressive equation transforms an independent stochastic sequence into a binary sequence, which is a special case of a stationary Markov chain. The power spectrum, correlation function and the transition probability are explicitly obtained in terms of the random coefficients. Some computer results are illustrated in figures.

The hierarchies of multihead finite automata over a one-letter alphabet are investigated. Let SeH(k) [NSeH(k) ] denote the class of languages over a one-letter alphabet accepted by deterministic [nondeterministic] sensing two-way k-head finite automata. Let H (k)s[NH(k)s] denote the class of sets of square tapes over a one-letter alphabet accepted by two-dimensional four-way deterministic [nondeterministic] k-head finite automata. Let SeH(k)s[NSeH(k)s] denote the class of sets of square tapes over a one-letter alphabet accepted by two-dimensional four-way sensing deterministic [nondeterministic] k-head finite automata. This paper shows that SeH(k) SeH(k1) and NSeH(k) NSeH(k1) hold for all k3. It is also shown that H(k)s[NH(k)s] H(k1)s[NH (k1)s] and SeH (k)s[NSeH(k)s] SeH(k1)s[NSeH(k1)s] hold for all k1.

The approximation of the gain characteristics of linear phase FIR digital filters is reduced to the approximation by cosine polynomials. Therefore we can easily obtain an optimum solution under the LMS of Chebyshev error criterion. However the optimum solution does not always meet practical specifications, especially in the case where the gain is specified strictly at some angular frequencies. On the other hand in such a case, it is known that interpolation technique can be suitably applied for the approximation mentioned above. However, in this case, we encounter another difficulty in the approximation caused by interpolation. In order to overcome the above difficulty, this paper proposes a new method utilizing both of the interpolation and LMS techniques. Some parameters included in approximating functions are used to satisfy prescribed interpolating conditions and the other parameters are used to minimize the approximation error under the LMS criterion. In addition, interpolation technique is extended to include the case in which also higher derivatives are taken into interpolation conditions to make smooth interpolation. An example is shown to illustrate the effectiveness of the proposed method.

This letter presents a technique to cancel the parasitic effects of operational amplifier (op amp) in active filter design. To minimize the effects, an op amp model considering the parasitics (i.e. both parasitic poles and zeros) is utilized. It is shown that undesirable factors in the transfer function due to the parasitics can be canceled well by predistorting the passive element values of the circuit. As an example, an active-R highpass filter is evaluated both theoretically and numerically. In this way, the proposed technique can be effectively incorporated into the design of active filters.

In this paper, we propose a fuzzy Petri net model for a rule-based decision making system which contains uncertain conditions and vague rules. Using the transformation method introduced in the paper, one can obtain the fuzzy Petri net of the rule-based system. Since the fuzzy Petri net can be represented by some matrices, the algebraic form of a state equation of the fuzzy Petri net is systematically derived. Both forward and backward reasoning are performed by using the state equations. Since the proposed reasoning methods require only simple arithmetic operations under a parallel rule firing scheme, it is possible to perform real-time decision making with applications to control systems and diagnostic systems. The methodology presented is also applicable to classical (nonfuzzy) knowledge base systems if the nonfuzzy system is considered as a special case of a fuzzy system with truth values being equal to the extreme values only. Finally, an illustrative example of a rule-based decision making system is given for automobile engine diagnosis.