The embedded Markov processes associated with Markovian queueing systems are closely related, and their relationships are important for establishing an analytical basis for performance evaluation techniques. As a first step, we analyze the embedded processes associated with a general M/M/1 queueing system. Linear transformations between the infinitesimal generators and the transition probability matrices of embedded processes at arrival and departure times are explicitly derived. Based upon these linear transformations, the equilibrium distributions of the system states at arrival and departure times are obtained and expressed in terms of the equilibrium distribution at arbitrary times. The approach presented here uncovers an underlying algebraic structure of M/M/1 queueing systems, and establishes an algebraic methodology for analyzing the equilibrium probabilities of the system states at arrival and departure times for more general Markovian queueing systems.

Modeling and performance analysis have played an important role in the economical design and efficient operation of switching systems, and is currently becoming more important because the switching systems should handle a wide range of traffic characteristics, meeting the grade of service requirements of each traffic type. Without these techniques we could no longer achieve economy and efficiency of the switching systems in complex traffic characteristic environments. From the beginning of research on electronic switching systems offering circuit-switched applications, Stored Program Control (SPC) technology has posed challenges in the area of modeling and performance analysis as well as queueing structure, efficient scheduling, and overload control strategy design. Not only teletraffic engineers and performance analysts, but also queueing theorists have been attracted to this new field, and intensive research activities, both in theory and in practice, have continued over the past two decades, now evolving to even a broader technical field including traditional performance analysis. This article reviews a number of important issues that have been raised and solved, and whose solutions have been reflected in the design of SPC switching systems. It first discusses traffic problems for centralized control systems. It next discusses traffic problems inherent in distributed switching systems.

The demand for mobile communications is continuing to grow, but there is a limit on the radio frequency resources. Micro cellular systems are a strong solution to this problem. However, Forced Call Termination (FCT) and Channel Changing (CC) occur frequently in these systems because of their small cell size. This paper proposes a new Dynamic Channel Assignment (DCA) strategy which uses information of moving direction of Mobile Stations (MSs) to reduce FCT and CC. This strategy, the MD (Moving Direction) strategy, is compared with other major DCA strategies by simulating a one-dimensional service area covering a road, such as an expressway. The simulation shows that the MD strategy performs better than the other strategies with regard to FCT, CC, and carried load. FCT is an especially important factor in the quality of service. The MD strategy reduces FCT and has the largest carried load of the strategies, which means that it has the most efficient channel usage. This is an attractive characteristic of the MD strategy for micro cellular systems.

Processors are important resources of stored program control (SPC) switching systems, and estimation of their workload level is crucial to maintaining service quality. Processor utilization is measured as processor usage per unit time, and workload level is usually estimated from measurement of this utilization during a given interval. This paper provides an approximate distribution of processor utilization of SPC switching systems, and it provides a method for designing an overload detection scheme. This method minimizes the observation interval required to keep overload detection errors below specified values. This observation interval is obtained as an optimal solution of a linear programming.

This paper describes a perspective on Personal Communicatoins Services (PCS) and technological trends. It takes into consideration rules pertaining to the use of PCS for mobile radio communication and countermeasures to cope with the huge increase in PCS subscribers. In this paper, PCS network structures, inter-regional roaming, microcell structure, radio access and channel access methods are also covered as PCS technologies. Furthermore, trends in domestic and international standards are also described. Although these technologies present many difficulties, we believe that they will be overcome and PCS services will be introduced in the near future.

The design of N-dimensional (N-D) FIR filters requires in general an enormous computational effort. One of the most successful methods for design and implementation is the McClellan transformation. In this paper a numerically simple technique for determining the coefficients of the transformation is suggested. This appears to be the simplest available method for the design of N-D hyperspherically symmetric FIR filters with excellent symmetry.

For the connection request procedure in mobile communication systems, a previous study had shown that the 3-channel systems provide the haighest maximum of stable per channel throughput. In this paper, we propose and study a new algorithm, called the Parallel Collision Resolution Algorithm, which can be implemented in a Q-channel connection request environment, where Q3. For the implementation, the channels are arranged in R groups, where R is a positive integer. The collision resolution scheme distributes the collided messages over all the groups so that throughput and delay measures can be improved. At any point in time, there can be a maximum of R collision resolution schemes operational irrespective of the channel or the group number over which collisions occurred. The performance measures are estimated by computer simulation. Under the new algorithm, almost the same level of the perchannel stable throughput measure of a 3-channel network can be achieved in networks for which Q3. This feature allows freedom to the network designer to employ a higher number of connection request channels without forfeiting high channel utilization rates. When Q is an integral multiple of 3, the maximum stable per channel throughput level achieved can be the same as that achieved by the 3 channel system, if the grouping of channels is such that each group consists of 3 channels. When Q is not an integral multiple of 3, the intuitive strategy of organizing the channels in such a way that Q/3 groups consist of 3 channels each and one group consists of (Q mod 3) channels, may result in much degraded performance. It is found that, if the channels are so organised that no group is composed of (Q mod 3) channels, the performance levels can be substantially enhanced. Also, under the new algorithm, the delay measure is significantly improved, particularly in schemes like the mobile satellite systems with high propagation delays. We conclude that the new scheme presents a promising collision resolution methodology for connection request procedures.

The static characteristics of GaInAs(P)/GaInAsP quantum well laser diodes (QW LDs), with graded-index separate-confinement-heterostructure (GRIN-SCH) grown by metalorganic chemical vapor deposition (MOCVD), have been investigated experimentally in terms of threshold current density, internal waveguide loss, differential quantum efficiency and light output power. Very low threshold current density of 410 A/cm2, high characteristic temperature of 113 K, low internal waveguide loss of 5 cm-1, high differential quantum efficiency of 82% and high light output power of 100 mW were obtained in 1.3 µm GRIN-SCH multiple quantum well (MQW) LDs by optimizing the quantum well structure including confinement layer and cavity design. Excellent uniformity for the threshold current, quantum efficiency and emission wavelength was obtained in all MOCVD grown buried heterostructure GRIN-SCH MQW LDs. Lasing characteristics of 1.5 µm GRIN-SCH MQW LDs are also described.

This paper describes high-temperature operation of nMOSFET on bonded SOI. A long-channel nMOSFET is fabricated on bonded SOI (Si layer thickness 0.3 µm), SOS (Si layer thickness 0.3 µm), and bulk Si, Bonded SOI is produced using pulse-field-assisited bonding and resistivity-sensitive etching. The high-temperature operation of bonded SOI nMOSFET is demonstrated and compared with SOS and bulk MOSFETs. The leakage current variation with temperature is signnificantly smaller in bonded SOI and in SOS than in bulk MOSFETs. At high temperatures, the drain current to leakage current ratio is 100 times higher in bonded SOI than in SOS and bulk devices. At 300, a ratio of 104 is obtained for the bonded SOI nMOSFET. The ratio is expected to be even higher if a reduced channel length and ultrathin (less than 0.1 µm) bonded SOI is used.

The interface between laser-recrystallized Si and SiO2 is investigated by means of capacitance-voltage curve measurements. The recrystallization is performed by scanning cw Ar+ laser. The change in the C-V curves shows that the laser-recrystallization generates positive charge and the fast interface states at the Si-SiO2 interface, and creates n-type defects in recrystallized bulk silicon. Nominal interface charge increases linearly with a laser power. The increase in the charge is enhanced by fast laser-beam scanning velocity. The change in the C-V curve is suppressed, if a substrate is heated up to 450 during recrystallization. Complete recovery of the induced change in the C-V curves requires a subsequent furnace annealing at a temperature as high as 1100. These phenomena are explained by the generation of oxygen vacancy at the Si-SiO2 interface and quenched-in point defects in the recrystallized Si. The oxygen vacancy is produced by a reaction between the melted Si and SiO2. The quenched-in defects are produced during fast cooling of the melted Si.

We fabricated mixed-signal ICs (MSICs) using wafer-bonded SOI devices with a film several microns thick. We found the MOSFETs on wafer-bonded SOI had characteristics as good as those on a conventional wafer provided the active Si layer is more than 2 µm thick. We fabricated a 16-bit SOI-CMOS delta-sigma A/D converter that suppressed digital noise interference via the substrate. We also fabricated a rectifier-merged SOI-BiCMOS circuit. The resulting characteristics were good, and not possible using conventional junction isolation. Our results suggest that SOI-based isolation is a key technology in integrating devices and systems on a single chip.

Localized temperature distribution in silicon on insulator (SOI) structures with trench isolations is calculated using three-dimensional computer simulation. Temperature rise in SOI transistors is about three times higher than in conventional structure transistors because the thermal conductivity of SiO2 is very low. If there are voids in the SiO2 layers and trench isolations, temperature in the SOI transistors increases significantly. A simple model is proposed to calculate steady-state temperature rise in SOI transistors.

The intelligent network services will considerably increase the amount of Control and OAM (Operation, Administration and Maintenance) Information (Ic&o) which will be stored in a huge number of distributed databases. Therefore, the management and the organization of databases have become critical issues for securing network performance. This paper studies one of the IN applications that is likely to be an important user of the Ic&o network, namely the Universal Personal Telecommunication (UPT). UPT enables the personal mobility, based on a UPT number related to the user and not a terminal equipment. The Ic&o information of UPT is carried through an ATM based transport network. Taking two fundamental parameters into consideration, namely delay time and the number of users, and two kinds of data location probabilities, this paper studies two basic procedures for finding target data in UPT databases, i.e., chaining and broadcasting. Results show that, when the data location probability is uniform, the broad-casting mode is the faster mode but, on the other hand, the chaining mode allows a larger number of users because the disk access time is less restrictive than in the broadcasting mode. Moreover, this study shows that increasing the number of databases also increases the allowed number of users up to a specific threshold. With a Broadcast Chaining mode, a better compromise between the delay time and the number of allowed users is obtained. If the probability depends on the location of databases (the probability is conversely proportional to the square of the number of searched databases), the results show that the chaining mode is preferable from both the number of users allowed and the delay time viewpoints. Finally, the implementation aspect is discussed.

In this paper, scattering waves by a strip grating with an anisotropic substrate for the incidence of inclined polarization are analyzed, and polarization characteristics of scatterd waves are calculated. For simplicity, the analysis is limitted to the case of normal incidence and a perfectly conducting strip grating is assumed.

Hot-carrier characteristics in ultra-thin SOI MOSFET's (T-SOI MOSFET's) with gate-overlapped LDD have been investigated. The change in transistor static characteristics after hot carrier stress was mainly observed as positive threshold voltage (Vt) shifts due to trapped electrons, while in bulk-Si MOSFET's drain current degradation was dominant. The hot-carrier life time in T-SOI MOSFET's was comparable to that in bulk-Si devices at low drain voltage, but the life time dependence on drain voltage was different from that in bulk-Si MOSFET's, and the Vt degraded rapidly at the condition that parasitic bipolar breakdown began to occur. This implies that the drain supply voltage in T-SOI MOSFET's is determined directly by parasitic bipolar breakdown voltage unlike bulk-Si MOSFET's in which it is determined by hot-carrier reliability. The gate-overlapped LDD structure was compared with single drain structure and proved to provide better hot-carrier endurance by the improvement of the parasitic bipolar breakdown voltage. The hot-carrier reliability in the back channels of T-SOI MOSFET's was also investigated, and it was found that the back channel tends to be degraded more easily than front channel with large positive Vt shifts. These results suggest that the front Vt shifts in T-SOI devices are related with electron injection into the back surface of the T-SOI layer through charge coupling at the condition that the parasitic bipolar breakdown occurs.

A location registration/paging procedure which is free from location registration area design is proposed. Each base station (BS) broadcasts a "responsibility area", composed of its own and neighboring cells' identification (ID). A mobile station (MS) makes a new location registration request when the current BS's responsibility area does not include the MS's registered location. Each BS is allowed to decide its own responsibility area autonomously based on route information, which is composed of neighboring cells' ID and reported from MSs. Therefore, the responsibility area can be adaptively changed based on MSs' moving characteristics. Moreover, this procedure solves the problems of registration traffic concentration and excess registration request on boundary BSs.

This paper describes the higher-order moment analysis of superposed Markov jumping processes. A superposed Markov jumping process is defined as a linear superposition of a finite number of piecewise constant real valued stochastic process whose value changes are associated with state transitions in an underlying descrete state continuous time Markov process. Some phenomena are modeled well by the process such as membrane current fluctuations observed at bio-membranes or load fluctuations in electrical power systems. Theoretical formula of the moment function of any order k is derived and the parameter estimation problem utilizing higher-order moment functions is discussed. A new method of estimating the kinetic parameters of membrane current fluctuations is proposed as a possible application.

This paper describes two algorithms based on Boolean formulations aimed at solving scheduling, the main subtask of data path synthesis. Using the first algorithm, all possible scheduling solutions can be obtained under a time constraint, something that cannot be accomplished with other available systems. The second algorithm produces feasible solutions without increasing the complexity of the problem. The effectiveness of the algorithms is confirmed through experimental studies.

The composition of CMOS control circuit and Vertical-Double-Diffused-MOS (VDMOS) power device on a single chip by using Silicon-On-Insulator (SOI) structure is formulated. Because all the MOS transistors in the CMOS control circuit are not isolated by the trenches, the interference phenomenon between SOI and the substrate is studied. Latch-up is detected thus, the construction of a mechanism to prevent latch-up is also studied. To evaluate the SOI CMOS characteristics the effects of voltage fluctuation on the substrate is analized. The latch-up mechanism is also analized by transient device simulation. As a result of this study a guideline for the immunity of latch-up is established, the features of the mechanism are as follows. First, the latch-up trigger is the charging current of the condenser composed of the oxide layer in the SOI structure. Second, latch-up is normally caused by positive feedback between the parasitic PNP-transistor and the parasitic NPN-transistor. However, in this case, electron diffusion toward the P-well is dominant after the parasitic PNP-transistor falls into high level injection. This feature is different from the conventional mechanism. The high level injection is caused by carrier accumulation in the N- region. Considering the above, it is necessary to; (1) reduce the charging current of the condenser, (2) reduce the parasitic resistance in the N- region of SOI, and (3) reduce the carrier accumulation in SOI for immunity from latch-up.

Rate based control is a promising way to achieve an efficient packet transmission especially in high speed packet switching networks where round trip delay is much larger than packet transmission time. Although inappropriate tuning for the parameters, increasing and decreasing factors, of the rate control function causes the performance degradation, most of the previous works so far have not studied the effect of the parameters on the performance. In this paper, we investigate the effect of the rate control parameters on the throughput under the condition that the packet loss probability is kept below a specific value, say 10-6. For this purpose, we build a queueing model and carry out a transient analysis to examine the dynamic behavior of the queue length at an intermediate node in a high speed network suffering from large propagation delay. Numerical examples exploit the optimal value of the parameters when one or two source-destination pairs transmit packets. We also discuss the effect of the propagation delay on the performance. Our model can be applicable to investigate the performance of various kinds of rate-based congestion control when the relation between the congestion measure and the rate control mechanism is given explicitly.