This paper focuses on methodology underlying the application to fault tolerant computer systems with "no down communication" capability of stochastic Petri nets with general firing times. Based on a formal specification of the stochastic Petri net, we provide criteria for the marking process to be a regenerative process in continuous time with finite cycle-length moments. These results lead to strongly consistent point estimates and asymptotic confidence intervals for limiting system availability indices. We also show how the building blocks of stochastic Petri nets with general firing times facilitate the modeling of non-deterministic transition firing and illustrate the use of "interrupter input places" for graphical representation of transition interruptions.

In this paper, we propose an algorithm of O(|V|min{k,|V|,|A|}|A|) time complexity for finding all k-edge-connected components of a given digraph D=(V,A) and a positive integer k. When D is symmetric, incorporating a preprocessing reduces this time complexity to O(|A|+|V|2+|V|min{k,|V|}min{k|V|,|A|}), which is at most O(|A|+k2|V|2).

Formal verification has become an increasing prominent technique towards establishing the correctness of hardware designs. We present a framework to specifying and verifying the design of systolic architectures. Our approach allows users to represent systolic arrays in Z specification language and to justify the design semi-automatically using the verifier. Z is a notation based on typed set theory and enriched by a schema calculus. We describe how a systolic array for matrix-vector multiplication can be specified and justified with respect to its algorithm.

The concentration of the electric field at the edge of the electrode has been simulated in several types of flat DRAM cell capacitors with high permittivity dielectrics. The results indicated that the permittivity of the material surrounding the edge of the electrode as well as the geometrical structure affected the concentration of the electric field. The electric field strength was minimized and most evenly distributed by utilizing the structure in which the sidewall of the capacitor dielectric was terminated at the edge of the electrode by a low-dielectric constant insulator. High-precision fabrication of the capacitor's profile is required for the minimization and uniformity of the electric field.

A new redundancy technique especially suitable for ultra-high-speed static RAMs (SRAMs) has been developed. This technique is based on a decoding-method that uses two kinds of fuses without introducing any additional delay time. One fuse is initially ON and can be turned OFF afterwards, if necessary, by a cutting process using a focused ion beam (FIB). The other is initially OFF and can be turned ON afterwards by a connecting process using laser chemical vapor deposition (L-CVD). This technique is applied to a 64 kbit SRAM having a 1.5-ns access time. The experimental results obtained through an SRAM chip repaired using this redundancy technique show that this technique does not introduce any increase in the access time and does not reduce the operational margin of the SRAM.

A new capacitor over bit-line (COB) stacked capacitor memory cell was developed using a local interconnect poly-silicon layer to arrange a capacitor contact between bit-lines. This memory cell enables usable capacitor area to increase and capacitor contact hole depth to decrease. The hemispherical grain (HSG) silicon, whose effective surface area is twice that of ordinary poly-silicon, was utilized for the storage node to increase the storage capacitance without increasing the storage node height. The feasibility of achieving a 1.8 µm2 memory cell with 30 fF storage capacitance using a 7 nm-SiO2-equivalent dielectric film and a 0.5 µm-high HSG storage node has been verified for 64 MbDRAMs by a test memory device using a 0.4 µm CMOS process.

A new technique for evaluating gate oxide reliability using photon emission method has been developed. This method enables the measurements of the initial breakdown characteristics, reliability testing and failure analysis consistently. From the experimental results, followings are clarified for the first time using this technique. Failure modes in the initial characteristics have close correlation to TDDB characteristics and both characteristics correspond to the location of breakdown spot. The results suggest measures to improve the reliability of gate oxide and the existance of new failure mechanism.

Subjective quality tests have proven that embedded adaptive differential PCM (ADPCM), known to tolerate information loss through bit dropping, does not maintain sufficient speech quality when directly applied to asynchronous transfer mode (ATM) due to the fixed-length cell transmission scheme unique to ATM. We propose a coding and transmission scheme which enhances the performance by adjusting the embedded ADPCM coding rate according to input speech characteristics, thereby taking advantage of the ATM environment, where the transmission of variable rate sources is feasible. By varying the number of code bits of an embedded ADPCM coder from 6bits per sample, or 48kbps, for blocks of speech with a high prediction gain, to 2bits, or 16kbps, for silent blocks, a good compromise between coding bit rate and speech quality with gradual degradation due to information loss is achieved. The results of subjective evaluation tests showed the speech quality of the proposed scheme to be over 3.5 mean opinion score (MOS) on a scale of 1 to 5 at a cell loss rate of 10%. A prototype of the codec and the ATM cell assembly/disassembly functions were also fabricated using 3 conventional digital signal processors (DSPs) for real-time conversation tests.

This paper proposes a surveillance system concept, which includes the analysis of fiber fault factors and monitored items, the architecture for diagnosing fiber degradation and the system configuration. Fiber faults are classified into two types. One is fiber failure caused by fiber axial tensile strain and the other is fiber loss increase caused by fiber bending and the absorption of hydrogen molecules. It was found that there is an urgent need for fiber axial strain monitoring, sensitive loss monitoring operating at longer wavelengths and water sensing, in order to detect the origin and early indications of these faults before the service is affected. Moreover, an algorithm for predicting and diagnosing fiber faults based on the detected results was investigated and systematized.

Improvement of fatigue behavior of a fusion spliced portion on a carbon-coated fiber is achieved by recoating carbon using a thermal-CVD process with a CO2 laser as a local heat source. The fatigue parameters, so-called n-values, of 121 and 94 are obtained on the non-spliced portion and the spliced portion, respectively. Assuming a life time prediction model, these high values have been proved to have an advantage in a long-term reliability and to be sufficient in a practical submarine cable use.

We report on Brillouin optical-fiber time domain reflectometry (BOTDR) for distributed temperature or strain measurement along a single-mode optical fiber. BOTDR uses Brillouin scattering in optical fibers, whose Brillouin frequency shift increases in proportion to temperature or strain induced in the fiber. This method requires access to only one end of a fiber, as with conventional optical time domain reflectometry (OTDR) which uses Rayleigh scattering in optical fibers. In BOTDR, a coherent optical detection method is used as a backscattered light detection technique. This technique can achieve both high sensitivity and high frequency resolution and easily separate a weak Brillouin line from a strong Rayleigh scattering peak and Fresnel reflected light. Experimental results show the potential for measuring temperature and strain distribution with respective accuracies of 3 or 0.006%, and a spatial resolution of 100m in an 11.57km long fiber.

We propose an integrated smart cable operation system and its architecture for the future cable network. In the proposed architecture, an application programs and various modules are loosely coupled using a cable operation system platform. We anticipate the task flows for the future optical cable network operation in order to realize the proposed system and architecture. Each task flow is broken down into "atomic tasks." The task flow can be changed easily by combining these atomic tasks. We use an object-oriented design for designing the cable operation system platform. As a first step towards the construction of the proposed system a pre-prototype system was constructed and the results are shown.

In formulating the motion constraint equation, we implicitly take it for granted that the spatial and temporal sampling intervals are very small. In real situations, since the intervals cannot be considered sufficiently small, an error will be introduced into the constraint equation and consequently the velocity estimate will be subject to an error due to inaccuracy of the constraint equation. We perform some experiments to analyze the effect of sampling interval on motion estimation. The understanding of experimental results will provide an insight into necessity and amount of image filtering prior to the application of motion estimation.

Gradient-based methods for the computation of the velocity from image sequences assume that the velocity field varies smoothly over image. This creates difficulties at regions where the image intensity changes abruptly such as the occluding contours or region boundaries. In this letter, we propose a method to overcome these difficulties by incorporating the information of discontinuities in image intensity into a standard local optimization method. The presented method is applied to the synthetic and real images. The results show that the velocity field computed by the proposed method is less blurred at region boundaries than that of the standard method.

This paper studies a method for a parallel implementation of digital half toning technique, which converts continuous tone images into monotone one without losing fidelity of images. A new modified algorithm for half toning is proposed, which is able to be implemented on a rectangular or one dimensional parallel multi-processor array as a part of extensions of space partitioning image processings. The purpose of this paper is primarily to apply space partitioning local image processing technique to nonlinear recursive algorithms. The target is to achieve a fast half toning with high quality. For that propose, local directional error diffusion techniques will be introduced, which enable original recursive error diffusion half toning to be converted into a local processing algorithm without losing its original advantages of producing high quality images. The characteristics of proposed methods will be analyzed and the advantages of our algorithm of high speed processing and high quality will be demonstrated by showing the results of simulations for typical examples.

Copper contamination behavior is studied, depending on the pH level, conductivity type P or N of a silicon substrate, and contamination method of copper. If the pH level of a copper containing solution is adjusted by using ammonia, copper atoms and ammonia molecules produce copper ion complexes. Accordingly, the amount of copper adsorption on the substrate surface is decreased. When N-type silicon substrates are contaminated by means of copper containing solutions, copper atoms on the surfaces diffuse into bulk crystal even at room temperature. But for P-type silicon substrates, copper atoms are transferred into bulk crystal only after high temperature annealing. In the case of silicon substrates contaminated by contact with metallic copper, no copper atom diffusion into bulk crystal was observed. The above mentioned copper contamination behavior can be explained by the charge transfer interaction of copper atoms with silicon substrates.

Two kinds of nitrided ultrathin (510 nm) SiO2 films were formed on the silicon (100) face using rapid thermal NH3-nitridation (RTN) and rapid thermal N2O-oxynitridation (RTON) technologies. The MOS capacitors with RTN SiO2 film showed that by Fowler-Nordheim (F-N) electron injection, both electron trap density and low-field leakage increase by the NH3-nitridation. In addition, the charge-to-breakdown (QBD) value decreases owing to NH3-nitridation. By contrast, RTON SiO2 films exhibited extremely low electron trap density, almost no increase of the leakage current, and large QBD value above 200C/cm2. The oxide film composition was evaluated by secondary ion mass spectroscopy (SIMS). The chemical bonding states were also examined by Fourier transform-infrared reflection attenuated total reflectance (FT-IR ATR) and X-ray photoelectron spectroscopy (XPS) measurements. These results indicate that although a large number of nitrogen (N) atoms are incorporated by the RTN and RTON, only the RTN process generates the hydrogen-related species such as NH and SiH bounds in the film, whereas the RTON film indicates only SiN bonds in bulk SiO2. From the dielectric and physical properties of the oxide films, it is considered that the oxide wearout by high-field stress is the result of the electron trapping process, in which anomalous leakage due to trap-assisted tunneling near the injected interface rapidly increases, leading to irreversible oxide failure.

The effects of low temperature etching for sub-half micron multi-layer resist are investigated. The low temperature etching with pure O2 gas provides higher anisotropic profiles than with an additional gas such as Cl2, N2. This is caused by the difference in the formative process of the side wall protection. With pure O2 gas at 80, highly anisotropic profiles for 0.35 µm patterns can be performed while the maximum tolerable width loss is below 0.03 µm.

Self-aligned aluminum-gate MOSFET's have been successfully fabricated by employing ultraclean ion implantation technology. The use of ultra high vacuum ion implanter and the suppression of high-energy ion-beam-induced metal sputter contamination have enabled us to form ultra-shallow low-leakage pn junctions by furnace annealing at a temperature as low as 450. The fabricated aluminum-gate MOSFET's have exhibited good electrical characteristics, thus demonstrating a large potential for application to realizing ultra-high-speed integrated circuits.

We designed and fabricated a prototype 0.4-µm-gate CMOS/SIMOX PLL LSI in order to verify the potential usefulness of ultrathin-film SIMOX technology for creating an extremely low-power LSI containing high-speed circuits operating at frequencies of at least 1 GHz and at low supply voltages. This PLL LSI contains both high-frequency components such a prescaler and low-frequency components such as a shift register, phase frequency comparator, and fixed divider. One application of the LSI could be for synthesizing communication band frequencies in the front-end of a battery-operated wireless handy terminal for personal communications. At a supply voltage of 2 V, this LSI operates at up to 2 GHz while dissipating only 8.4 mW. Even at only 1.2 V, 1 GHz-operation can be obtained with a power consumption of merely 1.4 mW. To explain this low-power feature, we extensively measured the electrical characteristics of individual CMOS/SIMOX basic circuits as well as transistors. Test results showed that the high performance of the LSI is mainly due to the advanced nature of the CMOS/SIMOX devices with low parasitic capacitances around source/drain regions and to the new circuit design techniques used in the dual-modulus prescalar.