An idea of optimal output permutation of multiple-valued sum-of-products expressions is presented. The sum-of-products involve the TSUM operator on the MIN of window literal functions. Some bounds on the maximum number of implicants needed to cover an output permuted function are clarified. One-variable output permuted functions require at most p1 implicants in their minimal sum-of-products expressions, where p is the radix. Two-variable functions with radix between three and six are analyzed. Some speculations of maximum number of the implicants could be established for functions with higher radix and more than 2-variables. The result of computer simulation shows that we can have a saving of approximately 15% on the average using permuting output values. Moreover, we demonstrate the output permutation based on the output density as a simpler method. For the permutation, some speculation is shown and the computer simulation shows a saving of approximately 10% on the average.

This paper presents Bi-CMOS current-mode multiple valued logic circuit with 1.5 V supply voltage. This circuit is composed of current mirror, threshold detector and current source. This circuit has advantages such as high accuracy, high speed, high density and low supply voltage. So, it is possible to realize high-radix multiple valued logic circuit. As an other application of the proposed circuit, a processing unit of fuzzy inference is given. This circuit operates with high speed and high accuracy. The circuit simulation of the proposed circuit has been performed using SPICE2 program.

The mechanism of environment-dependent self-organization of "positional information" in a coupled nonlinear oscillator system is proposed as a new principle of realtime coordinative control in biological distributed system. By modeling the pattern formation in tactic response of Physarum plasmodium, it is shown that a global phase gradient pattern self-organized by mutual entrainment encodes not only the positional relationship between subsystems and the total system but also the relative relationship between internal state of the system and the environment.

Various models of a neuron have been proposed and many studies about them and their networks have been reported. Among these neurons, this paper describes a study about the model of a neuron providing its own feedback input and possesing a chaotic dynamics. Using a return map or a histogram of laminar length, type-I intermittency is recognized in a recurrent neuron and its network. A posibility of controlling dynamics in recurrent neural networks is also mentioned a little in this paper.

This paper proposes a feedback-loop type transmission power control (TPC) scheme coupled with first and second order prediction methods and analyzes the optimum control period and residual control error. In order to minimize residual control error, the three main factors contributing to residual control error are analyzed. First, to detect accurately up-link rain attenuation, a channel quality detection method is proposed and analyzed experimentally for puseudo-error detection. Second, rain attenuation rates in Ka band are measured and analyzed statistically. Finally, the optimum control period of the proposed TPC scheme is analyzed. The simulation results on the prototype TPC system show a maximum of 4.5 dB residual control error is achievable with an optimum control period of about 1 second to 1.5 seconds.

In this paper, a new time series analysis method is proposed. The proposed method uses the exponential (EXP) model. The residual signal is assumed to be identically and independently distributed (IID). To achieve accurate and efficient estimates, the parameter of the system model is calculated by maximizing the logarithm of the likelihood of the residual signal which is assumed to be IID t-distribution. The EXP model theoretically assures the stability of the system. This model is appropriate for analyzing signals which have not only poles, but also poles and zeroes. The asymptotic efficiency of the EXP model is addressed. The optimal solution is calculated by the Newton-Raphson iteration method. Simulation results show that only a small number of iterations are necessary to reach stationary points which are always local minimum points. When the method is used to estimate the spectrum of synthetic signals, by using small α we can achieve a more accurate and efficient estimate than that with large α. To reduce the calculation burden an alternative algorithm is also proposed. In this algorithm, the estimated parameter is updated in every sampling instant using an imperfect, short-term, gradient method which is similar to the LMS algorithm.

In the direct product space of a complete metric linear space X and its related space Y, a fuzzy mapping G is introduced as an operator by which we can define a projective fuzzy set G(x,y) for any xX and yY. An original system is represented by a completely continuous operator f(x)Y, e.g., in the form x=λ(f(x)), (λ is a linear operator), and a nondeterministic or fuzzy fluctuation induced into the original system is represented by a generalized form of system equation xβG(x,f(x)). By establishing a new fixed point theorem for the fuzzy mapping G, the existence and evaluation problems of solution are discussed for this generalized equation. The analysis developed here for the fluctuation problem goes beyond the scope of the perturbation theory.

Erasure-and-error decoding is a general form of channel decoding and is a basis of important coding schemes, such as the concatenated coding scheme and coded ARQ. However, there do not exist enough discussions on the interrelationship between erasure-and-error decoding schemes. In this paper, threshold decoding schemes are discussed in a systematic manner and compared with Forney's optimal scheme. Some confusions in known results are pointed out and new results on threshold decoding are shown.

Under the conditions of Poisson arrivals and single copy transmission, we designed a minimum delay protocol for packet satellite communications. The approach is to assume a hybrid random-access/reservation protocol, derive its average delay and minimize the delay with respect to all tunable system parameters. We found that for minimum average delay,1) a spare reservation should normally but not always be made for each packet transmission.2) all unreserved slots (i.e. Aloha slots) should be filled with a packet rate of one per slot whenever possible. In other words, the utilization of Aloha slots should be maximized.3) an optimum balance between transmitting packets and making reservations before transmission should be maintained.

Link conditions of a low-earth orbit (LEO) satellite communications system were evaluated, to provide the information necessary for designing a broadband LEO-SAT communications system. The study was made both for optical intersatellite and user/satellite links. For the optical intersatellite link (ISL), we examined several ISL configurations in a circular polar orbit, and found that when the satellites are in the same orbital plane, the link parameters are quite stable, that is, the link between adjacent satellites can be regarded as fixed and, therefore, suitable for broadband transmission via an optical link. However, the link conditions between adjacent orbits change very quickly and over a wide range. To overcome this and extend the network path between satellites in adjacent orbital planes, we proposed intermittent use of the link between satellites in co-rotating adjacent orbital planes at the low latitude region, i.e., only during the period of stable conditions. The optical intersatellite link budget also sets link parameters that are realistic, given present optoelectronic technologies. From quantitative evaluations of the user/satellite link, we believe that both the satellite altitude and minimum elevation angle are critical, both in defining the quality of the service of the LEO-SAT system and in their impact on the other transmission parameters. The link loss, the visible period and the required number of satellites vs. satellite altitude and elevation angle are also indicated. These are important considerations for future system design.

A slotted tube resonator (STR) having a shield of conducting circular cylinder which is used as a probe for the magnetic resonance imaging (MRI) is analyzed by using the variational method and the dyadic Green's function of a circular waveguide. Three surface current modes are employed to expand the currents on the STR. Quadruple integrals appearing in the variational expression are evaluated analytically for saving the CPU time. Resonant frequency, Q value and the magnitude of magnetic field distributions for various radii of the shields are obtained to show the effects of the shield. Some measured date are compared with the theoretical results to confirm the validity of the present analysis.

It has become an important subject to realize a high-speed D/A converter with low supply voltage. This paper discusses a 10 bit 50 MS/s CMOS D/A converter with 2.7 V power supply. Reduction of the supply voltage is achieved by developing "saturation-linear" biasing technique in current sources. In this scheme, a grounded transistor in cascode configuration is biased in linear region. High conversion rate is obtained by driving this grounded transistor directly. A charging transistor is also introduced into the current source for accelerating the settling time. The D/A converter is fabricated in a 1 µm CMOS process without using optional process steps. It successfully operates at 50 MS/s with 2.7 V power supply. The circuit techniques discussed here can be easily introduced into half-micron D/A converters.

A group-based random access communication system which consists of two groups of many users is considered. The two different groups share a common random multiple access channel. Users from a group are allocated a high transmitting power level and have a high probability of correct reception among overlapping packets. We set a threshold, θ, which is such that the group with the high power level will occupy the channel if less than or equal to θ packets are transmitted from the group with the low power level. We obtain a two-dimensional Markovian model by tracing the number of backlogged users in the two groups. The two-dimensional Markov chain is shown to be not ergodic and thus the system is not stable. A two-dimensional retransmission algorithm is developed to stabilize the system and the retransmission control parameters are chosen so as to maximize the channel throughput. An equilibrium point analysis is performed by studying the drift functions of the system backlog and it is shown that there is a unique global equilibrium point. The channel capacity for the system is found to be in the range from 0.47 up to 0.53, which is a remarkable increase compared to the conventional slotted ALOHA system.

A feed-forward (FF) BiNMOS driver that combines a multi-stage CMOS inverter and a bipolar emitter-follower transistor is proposed as a low-voltage BiCMOS driver. High-speed and low-voltage operation is made possible by a multi-stage inverter and feed-forward control from the pre-stage inverters to the bipolar emitter-follower. Two key factors determining the driver delay time, output load capacitance and wiring resistance, are described and analyzed in detail. Experiments with a gate-chains test chip fabricated with 0.5-µm BiCMOS technology confirm the low-voltage operation of the FF-BiNMOS driver. Applications of the new driver to a BiCMOS SRAM are also described.

In this paper, we are concerned with a problem of obtaining an approximate solution of a finite-dimensional nonlinear equation with guaranteed accuracy. Assuming that an approximate solution of a nonlinear equation is already calculated by a certain numerical method, we present computable conditions to validate whether there exists an exact solution in a neighborhood of this approximate solution or not. In order to check such conditions by computers, we present a method using rational arithmetic. In this method, both the effects of the truncation errors and the rounding errors of numerical computation are taken into consideration. Moreover, based on rational arithmetic we propose a new modified Newton interation to obtain an improved approximate solution with desired accuracy.

This paper describes a monolithic 10-b A/D converter that realized a maximum conversion frequency of 300 MHz. Through the development of the interpolated-parallel scheme, the severe requirement for the transistor Vbe matching can be alleviated drastically, which improves differential nonlinearity (DNL) significantly to within 0.4 LSB. Furthermore, an extremely small input capacitance of 8 pF can be attained, which translates into better dynamic performance such as SNR of 56 dB and THD of 59 dB for an input frequency of 10 MHz. Additionally, the folded differential logic circuit has been developed to reduce the number of elements, power dissipation, and die area drastically. Consequently, the A/D converter has been implemented as a 9.0 4.2-mm2 chip integrating 36K elements, which consumes 4.0 W using a 1.0-µm-rule, 25-GHz ft, double-polysilicon self-aligned bipolar technology.

This paper proposes a suitable combination of the digital modulation schemes and the coding-rate of forward error correction (FEC) schemes for satellite digital video communication networks. The comparative study is carried out by computer simulation considering non-linearly amplified, narrow bandwidth satellite channels with adjacent channel interference signals. The proposed system employs an offset QPSK modulation scheme supported by the coding-rate of 7/8 convolutional encoding and Viterbi decoding to realize high-quality and compact spectrum characteristics in non-linear channels. By employing a 32Mbps DPCM video codec, the developed prototype system achieves a post demodulated S/N ratio of higher than 52dB. Moreover, it achieves high protection ratio against co-channel interference than conventional analog FM systems. The optimized digital video transmission system makes it possible to transmit high-quality NTSC video signals over non-linearly amplified narrow bandwidth satellite channels, for example 27MHz or 36MHz bandwidth transponders, with high-security digital encryption.

The Consultative Committee of Space Data Systems (CCSDS) proposes a packetized telemetry scheme for the convenience of data exchange and networking in space activity. This paper describes the outline of the telemetry scheme and the on-orbit experiment which was carried out to show the applicability of the proposed CCSDS packet telemetry scheme using the Japan's satellite "Hiten" in a highly elliptical orbit. The telemetry data which are generated by the onboard instruments are packetized in Hiten, and reformed to the original data in earth stations successfully. The experimental results show that the standardized scheme is helpful for tracking cross-support between organizations, and that the concatenated code is quite effective to transmit data in a low C/N condition.

A priori estimation is presented for a computational complexity of the homotopy method applying to a certain class of strongly monotone nonlinear equations. In the present papers, a condition is presented for a certain class of uniquely solvable equations, under which an upper bound of a computational complexity of the Newton type homotopy method can be a priori estimated. In this paper, a condition is considered in a case of linear homotopy equations including the Newton type homotopy equations. In the first place, the homotopy algorithm based on the simplified Newton method is introduced. Then by using Urabe type theorem, which gives a sufficient condition guaranteeing the convergence of the simplified Newton method, a condition is presented under which an upper bound of a computational complexity of the algorithm can be a priori estimated, when it is applied to a certain class of strongly monotone nonlinear equations. The presented condition is demonstrated by numerical experiments.

Process and device technologies of CMOS devices for low-voltage operation are described. First, optimum power-supply voltage for CMOS devices is examined in detail from the viewpoints of circuit performance, device reliability and power dissipation. As a result, it is confirmed that power-supply voltage can be reduced without any speed loss of the CMOS device. Based upon theoretical understanding, the author suggests that lowering threshold voltage and reduction of junction capacitance are indispensable for CMOS devices with low-voltage supply, in order to improve the circuit performance, as expected from MOS device scaling. Process and device technologies such as Silicon On Insulator (SOI) device, low-temperature operation and CMOS Shallow Junction Well FET (CMOS-SJET) structure are reviewed for reduction of the threshold voltage and junction capacitance which lead to high-seed operation of the COMS device at low-voltage.