In this paper, we propose a method for designing finite impulse response (FIR) filters with canonic signed digit (CSD) coefficients using particle swarm optimization (PSO). In such a design problem, a large number of local minimums appear in an evaluation function for the optimization. An updating procedure of PSO tends to stagnate around such local minimums and thus indicates a premature convergence property. Therefore, a new framework for avoiding such a situation is proposed, in which the evaluation function is modified around the stagnation point. Several design examples are shown to present the effectiveness of the proposed method.

In the routing design of interposer and etc., the combination of a pin pair to be connected by wire is often flexible, and the reductions of the total wire length and the length difference are pursued to keep the circuit performance. Even though the total wire length can be minimized by finding a minimum cost maximum flow in set pair routing problems, the length difference is often large, and the reduction of it is not easy. In this paper, an algorithm that reduces the length difference while keeping the total wire length small is proposed. In the proposed algorithm, an initial routing first obtained by a minimum cost maximum flow. Then it is modified to reduce the maximum length while keeping the minimum total wire length, and a connection of the minimum length is detoured to reduce the length difference. The effectiveness of the proposed algorithm is confirmed by experiments.

Automatic performance tuning of a practical application could be time-consuming and sometimes infeasible, because it often needs to evaluate the performances of a large number of code variants to find the best one. In this paper, hence, a light-weight rollback mechanism is proposed to evaluate each of code variants at a low cost. In the proposed mechanism, once one code variant of a target code block is executed, the execution state is rolled back to the previous state of not yet executing the block so as to repeatedly execute only the block to find the best code variant. It also has a feature of terminating a code variant whose execution time is longer than the shortest execution time so far. As a result, it can prevent executing the whole application many times and thus reduces the timing overhead of an auto-tuning process required for finding the best code variant.

Camellia is a block cipher jointly developed by Mitsubishi and NTT of Japan. It is designed suitable for both software and hardware implementations. One of the design-for-test techniques using scan chains is called scan-path test, in which testers can observe and control the registers inside the LSI chip directly in order to check if the LSI chip correctly operates or not. Recently, a scan-based side-channel attack is reported which retrieves the secret information from the cryptosystem using scan chains. In this paper, we propose a scan-based attack method on the Camellia cipher using scan signatures. Our proposed method is based on the equivalent transformation of the Camellia algorithm and the possible key candidate reduction in order to retrieve the secret key. Experimental results show that our proposed method sucessfully retrieved its 128-bit secret key using 960 plaintexts even if the scan chain includes the Camellia cipher and other circuits and also sucessfully retrieves its secret key on the SASEBO-GII board, which is a side-channel attack standard evaluation board.

In this paper, we investigate the fault-tolerant Hamiltonian problems of crossed cubes with a faulty path. More precisely, let P denote any path in an n-dimensional crossed cube CQn for n ≥ 5, and let V(P) be the vertex set of P. We show that CQn-V(P) is Hamiltonian if |V(P)|≤n and is Hamiltonian connected if |V(P)| ≤ n-1. Compared with the previous results showing that the crossed cube is (n-2)-fault-tolerant Hamiltonian and (n-3)-fault-tolerant Hamiltonian connected for arbitrary faults, the contribution of this paper indicates that the crossed cube can tolerate more faulty vertices if these vertices happen to form some specific types of structures.

8K Ultra High Definition Television (UHDTV) requires extremely high throughput for video decoding based on H.265. In H.265, intra coding could significantly enhance video compression efficiency, at the expense of an increased computational complexity compared with H.264. For intra prediction of 8K UHDTV real-time H.265 decoding, the joint complexity and throughput issue is more difficult to solve. Therefore, based on the divide-and-conquer strategy, we propose a new VLSI architecture in this paper, including two techniques, in order to achieve 8K UHDTV H.265 intra prediction decoding. The first technique is the LUT based Reference Sample Fetching Scheme (LUT-RSFS), reducing the number of reference samples in the worst case from 99 to 13. It further reduces the circuit area and enhances the performance. The second one is the Hybrid Block Reordering and Data Forwarding (HBRDF), minimizing the idle time and eliminating the dependency between TUs by creating 3 Data Forwarding paths. It achieves the hardware utilization of 94%. Our design is synthesized using Synopsys Design Compiler in 40nm process technology. It achieves an operation frequency of 260MHz, with a gate count of 217.8K for 8-bit design, and 251.1K for 10-bit design. The proposed VLSI architecture can support 4320p@120fps H.265 intra decoding (8-bit or 10-bit), with all 35 intra prediction modes and prediction unit sizes ranging from 4×4 to 64×64.

We consider the distributed source coding system of two correlated Gaussian Vector sources Yl=t(Yl1, Yl2),l=1,2 which are noisy observations of correlated Gaussian scalar source X0. We assume that for each (l,k)∈{1,2}, Ylk is an observation of the source X0, having the form Ylk=X0+Nlk, where Nlk is a Gaussian random variable independent of X0. We further assume that Nlk, (l,k)∈{1,2}2 are independent. In this system two correlated Gaussian observations are separately compressed by two encoders and sent to the information processing center. We study the remote source coding problem where the decoder at the center attempts to reconstruct the remote source X0. The determination problem of the rate distortion region for this communication system can be regarded as an extension of the Gaussian CEO problem to the case of vector observations. For each vector observation we can obtain an estimation on X0 from this observation. Those estimations are sufficient statistics on X0. Using those sufficient statistics, we determine the rate distortion region by showing that it coincides with the rate distortion region of the CEO problem where the scalar observations of X0 are equal to the estimations computed from the vector observations. We further extend the result to the case of L terminal and general vector observations.

A wide-bandwidth fundamental mixer operating at a frequency above 110GHz for precise spectrum analysis was developed using the InP HEMT technology. A single-ended resistive mixer was adopted for the mixer circuit. An IF amplifier and LO buffer amplifier were also developed and integrated into the mixer chip. As for packaging into a metal block module, a flip-chip bonding technique was introduced. Compared to face-up mounting with wire connections, flip-chip bonding exhibited good frequency flatness in signal loss. The mixer module with a built-in IF amplifier achieved a conversion gain of 5dB at an RF frequency of 135GHz and a 3-dB bandwidth of 35GHz. The mixer module with an LO buffer amplifier operated well even at an LO power of -20dBm.

Almost sure convergence coding theorems of one-shot and multi-shot Tunstall codes are proved for stationary memoryless sources. Coding theorem of one-shot Tunstall code is proved in the case that the leaf count of Tunstall tree increases. On the other hand, coding theorem is proved for multi-shot Tunstall code with increasing parsing count, under the assumption that the Tunstall tree grows as the parsing proceeds. In this result, it is clarified that the theorem for the one-shot Tunstall code is not a corollary of the theorem for the multi-shot Tunstall code. In the case of the multi-shot Tunstall code, it can be regarded that the coding theorem is proved for the sequential algorithm such that parsing and coding are processed repeatedly. Cartesian concatenation of trees and geometric mean of the leaf counts of trees are newly introduced, which play crucial roles in the analyses of multi-shot Tunstall code.

In this study, we propose and fabricate an oscillator array composed of three resonant-tunneling-diode terahertz oscillators integrated with slot-coupled patch antennas, and which does not require a Si lens. We measure the radiation pattern for single and arrayed oscillator, and calculate the output power using the integration of the pattern. The output power of a single oscillator was found to be ～15 µW. However, using an array configuration, almost combined output power of ～55 µW was obtained.

This report describes an all-digital phase-locked loop (ADPLL) using a temperature compensated settling time reduction technique. The novelty of this work is autonomous oscillation control word estimation without a look-up table or memory circuits. The proposed ADPLL employs a multi-phase digitally controlled oscillator (DCO). In the proposed estimation method, the optimum oscillator tuning word (OTW) is estimated from the DCO frequency characteristic in the setup phase of ADPLL. The proposed ADPLL, which occupies 0.27×0.36mm2, is fabricated by a 65 nm CMOS process. The temperature compensation PLL controller (TCPC) is implemented using an FPGA. Although the proposed method has 20% area overhead, measurement results show that the 47% settling time is reduced. The average settling time at 25°C is 3µs. The average reduction energy is at least 42% from 0°C to 100°C.

To analyze the structure of a set of high-dimensional perfect sequences over a composition algebra over R, we developed the theory of Fourier transforms of the set of such sequences. We define the discrete cosine transform and the discrete sine transform, and we show that there exists a relationship between these transforms and a convolution of sequences. By applying this property to a set of perfect sequences, we obtain a parameterization theorem. Using this theorem, we show the equivalence between the left perfectness and right perfectness of sequences. For sequences of real numbers, we obtain the parameterization without restrictions on the parameters.

The purpose of this work is to reduce the redundant coding process with the tradeoff between the encoding complexity and coding efficiency in HEVC, especially for high resolution applications. Therefore, a CU depth prediction algorithm is proposed for motion estimation process of HEVC. At first, an efficient CTU depth prediction algorithm is proposed to reduce redundant depth. Then, CU size termination and skip algorithm is proposed based on the neighboring block depth and motion consistency. Finally, the overall algorithm, which has excellent complexity reduction performance for high resolution application is proposed. Moreover, the proposed method achieves steady performance, and it can significantly reduce the encoding time in different environment configuration and quantization parameter. The simulation experiment results demonstrate that, in the RA case, the average time saving is about 56% with only 0.79% BD-bitrate loss for the high resolution, and this performance is better than the previous state of the art work.

Outsourcing IC design and fabrication is one of the effective solutions to reduce design cost but it may cause severe security risks. Particularly, malicious outside vendors may implement Hardware Trojans (HTs) on ICs. When we focus on IC design phase, we cannot assume an HT-free netlist or a Golden netlist and it is too difficult to identify whether a given netlist is HT-free or not. In this paper, we propose a score-based hardware-trojans identifying method at gate-level netlists without using a Golden netlist. Our proposed method does not directly detect HTs themselves in a gate-level netlist but it detects a net included in HTs, which is called Trojan net, instead. Firstly, we observe Trojan nets from several HT-inserted benchmarks and extract several their features. Secondly, we give scores to extracted Trojan net features and sum up them for each net in benchmarks. Then we can find out a score threshold to classify HT-free and HT-inserted netlists. Based on these scores, we can successfully classify HT-free and HT-inserted netlists in all the Trust-HUB gate-level benchmarks and ISCAS85 benchmarks as well as HT-free and HT-inserted AES gate-level netlists. Experimental results demonstrate that our method successfully identify all the HT-inserted gate-level benchmarks to be “HT-inserted” and all the HT-free gate-level benchmarks to be “HT-free” in approximately three hours for each benchmark.

A 300-GHz hetero-generous package solution with a combination of a polyimide microstrip-to-waveguide transition on low-temperature co-fired ceramic (LTCC) is presented. To assemble three parts — a metal back-short, polyimide transition, and LTCC substrate integrated waveguide (SIW) — a ridged microstructure beside the microstrip probe was implemented to reduce the air gap on the broadwall of a back-short. A back-to-back transition exhibited an insertion loss of 4.4 dB at 300 GHz and 49-GHz bandwidth with less than a 10-dB return loss. By evaluating loss of the microstrip line and SIW, we estimated the loss for a single transition, which was 0.9 dB at 300 GHz. The probe transition with ridged metal successfully suppressed the unwanted dip in transmission characteristics and eased the difficulty in assembly. The compact transition is easy to integrate in an antenna-in-package with an MMIC chip by combining suitable substrate materials for the transition and package.

Internet of Things (IoT) devices, which have different characteristics in mobility and communication patterns from traditional mobile devices such as cellular phones, have come into existence as a new type of mobile devices. A strict mobility management scheme for providing highly mobile devices with seamless access is over-engineered for IoT devices' mobility management. We revisit current mobility management schemes for wireless mobile networks based on identifier/locator separation. In this paper, we focus on IoT communication patterns, and propose a new routing-based mobility scheme for them. Our scheme adopts routing information aggregation scheme using the Bloom Filter as a data structure to store routing information. We clarify the effectiveness of our scheme in IoT environments with a large number of IoT devices, and discuss its deployment issues.

Determining an effective way to reduce computation complexity is an essential task for adaptive echo cancellation applications. Recently, a family of partial update (PU) adaptive algorithms has been proposed to effectively reduce computational complexity. However, because a PU algorithm updates only a portion of the weights of the adaptive filters, the rate of convergence is reduced. To address this issue, this paper proposes an enhanced switching-based variable step-size (ES-VSS) approach to the M-max PU least mean square (LMS) algorithm. The step-size is determined by the correlation between the error signals and their noise-free versions. Noise-free error signals are approximated according to the level of convergence achieved during the adaptation process. The approximation of the noise-free error signals switches among four modes, such that the resulting step-size is as close to its optimal value as possible. Simulation results show that when only a half of all taps are updated in a single iteration, the proposed method significantly enhances the convergence rate of the M-max PU LMS algorithm.

In the literature, many cryptosystems have been proposed to be secure under the Strong Diffie-Hellman (SDH) and related problems. For example, there is a cryptosystem that is based on the SDH/related problem or allows the Diffie-Hellman oracle. If the cryptosystem employs general domain parameters, this leads to a significant security loss caused by Cheon's algorithm [14], [15]. However, all elliptic curve domain parameters explicitly recommended in the standards (e.g., ANSI X9.62/63 [1], [2], FIPS PUB 186-4 [43], SEC 2 [50], [51]) are susceptible to Cheon's algorithm [14], [15]. In this paper, we first prove that (q-1)(q+1) is always divisible by 24 for any prime order q>3. Based on this result and depending on small divisors d1,d2≤(log q)2, we classify primes q>3, such that both (q-1)/d1 and (q+1)/d2 are primes, into Perfect, Semiperfect, SEC1v2 and Acceptable. Then, we describe algorithmic procedures and show their simulation results of secure elliptic curve domain parameters over prime/character 2 finite fields resistant to Cheon's algorithm [14], [15]. Also, several examples of the secure elliptic curve domain parameters (including Perfect or Semiperfect prime q) are followed.

Recently in the mobile graphic industry, ultra-realistic visual qualities with 60fps and limited power budget for GPU have been required. For graphics-heavy applications that run at 30 fps, we easily observed very noticeable flickering artifacts. Further, the workload imposed by high resolutions at high frame rates directly decreases the battery life. Unlike the recent frame rate up sampling algorithms which remedy the flickering but cause inevitable significant overheads to reconstruct intermediate frames, we propose a dynamic rendering quality scaling (DRQS) that includes dynamic rendering based on resolution changes and quality scaling to increase the frame rate with negligible overhead using a transform matrix. Further DRQS reduces the workload up to 32% without human visual-perceptual changes for graphics-light applications.

Conventional localization techniques such as triangulation and multilateration are not reliable in non-line-of-sight (NLOS) environments such as dense urban areas. Although fingerprint-based localization techniques have been proposed to solve this problem, we may face difficulties because we do not know the parameters of the illegal radio when creating the fingerprint database. This paper proposes a novel technique to localize illegal radios in an urban environment by interpolating the channel impulse responses stored as fingerprints in a database. The proposed interpolation technique consists of interpolation in the bandwidth (delay), frequency and spatial domains. A localization algorithm that minimizes the squared error criterion is employed in this paper, and the proposed technique is evaluated through Monte Carlo simulations using location fingerprints obtained from ray-tracing simulations. Results show that utilizing an interpolated fingerprint database is advantageous in such scenarios.