This paper proposes a novel method to realize highly linear MOS circuits using MOSFETs in the nonsaturation region. The proposed method is based on the cancellation of nonlinearity of two MOSFETs by using a current inversiontype negative impedance converter. First, grounded and floating resistor realizations are discussed. Next, by exploiting the MOS resistor circuits, gyrators and inductors are realized. As an application example, a third-order doubly-terminated LC filter is simulated. SPICE analysis shows low total harmonic distortions, excellent controllability and small gain error in the passband.

It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.

A simulation model for arsenic diffusion in polycrystalline silicon has been developed considering dynamic dopant clustering and polysilicon grain growth kinetics tightly coupled with dopant diffusion and segregation. It was assumed that the polysilicon layer consists of column-like grains surrounded by thin grain-boundaries, so that one dimensional description is permissible for dopant diffusion. The dynamic clustering model was introduced for describing arsenic activation in polysilicon grains, considering the solubility limit increase for arsenic in a polysilicon. For a grain-growth calculation, a previous formula was modified to include a local concentration dependence. The simulation results show that these effects are significant for a high dose implantation case.

The exact characteristic equation for the hybrid modes in Goubau line is given. By solving the equation numerically we find the hybrid modes Lnm, defined in this paper. We also examine the propagation and attenuation constants of the hybrid modes. As a result the hybrid K12 mode has the extremely low attenuation at the specific frequency similar to the hybrid K11 mode. The electric field distributions of K11 and L11 modes are plotted.

Numerical simulation of the hydrodynamic semiconductor device equations requires powerful numerical schemes. A Space-time Galerkin/Least-Squares finite element formulation, that has been successfully applied to problems of fluid dynamic, is proposed for the solution of the hydrodynamic device equations. Similarity between the equations of fluid dynamic and semiconductor devices is discussed. The robustness and accuracy of the numerical scheme are demonstrated with the example of a single electron carrier submicron silicon MESFET device.

The demand for large-capacity photonic switching systems will increase as regular broadband ISDN (B-ISDN) spreads and full-motion video terminals replace telephones. Large-scale and economical optical fiber transmission lines have been built based on time-division (TD) multiplexing. To reduce costs, it is important to increase the channel multiplexity of both transmission and switching systems by using TD and wavelength-division (WD) or frequency-division (FD) technologies. We surveyed photonic switching systems' architecture and switching network structures. Switching can be divided into circuit or synchronous transfer mode (STM) switching, and asynchronous transfer mode (ATM) switching. A variety of photonic STM and ATM switching systems based on the two switching technologies have recently been proposed and demonstrated.

A unified model for frequency-dependent characteristics of transconductance and output resistance is presented that incorporates the dynamics of quasi-Fermi levels. Using this model, multiple-frequency dispersion and pulse-narrowing phenomena in GaAs MESFETs are demonstrated based on the drift-diffusion transport theory and a Schockley-Read-Hall-type deep trap model, where rate equations for multiple trapping processes are analyzed self-consistently. It is shown that the complex frequency dependence is due to both spatial and temporal effects of multiple traps.

An efficient method which integrates a 2-D energy transport model, impact ionization model, gate current model, a discretized gate-capacitor EPROM model, and a post-processing quasi-transient programming/erase method, was developed for deep-submicron EPROM/Flash device simulation. The predicted results showed on the average better than 90% accuracy, and it took only few minutes CPU time on a SUN/SPARC2 to generate EPROM/Flash Vt shift curves.

Material representations and algorithms are presented for simulation of nanometer lithography. Organic polymer resists are modeled as collections of overlapping spheres, with each sphere representing a polymer chain. Exposure and post-exposure bake steps are modeled at the nanometer scale for both positive and negative resists. The development algorithm is based on the Poisson removal probability for each sphere in contact with developer. The Poisson removal rate for a given sphere is derived from a mass balance relationship with a macroscopic development rate model. Simulations of electron beam lithography with (poly) methyl methacrylate and Shipley SAL-601 reveal edge roughness standard deviations from 2 to 3 nm, leading to linewidth peak-to-peak 3σ variation of 15 to 22 nm. Typical simulations require about 2 MBytes and under 5 minutes on a Sun Sparc 10/41 engineering workstation.

A software package has been developed for simulating complex silicon and heterostructure devices in 3D. Device geometries are input with a mouse-driven geometric modeler, thus simplifying the definition of complex 3D shapes. Single components of the device are assembled through boolean operations. Tetrahedra are used for grid generation, since any plane-faced geometry can be tessellated with tetrahedra, and point densities can be adapted locally. The use of a novel octree-like data structure leads to oriented grids where desirable. Bad angles that prevent the convergence of the control volume integration scheme are eliminated mostly through topological transformations, thus avoiding the insertion of many redundant grid points. The discretized drift-diffusion equations are solved with an iterative method, using either a decoupled (or Gummel) scheme, or a fully coupled Newton scheme. Alternatively, generated grids can be submitted to a Laplace solver in order to calculate wire capacitances and resistances. Several examples of results illustrate the flexibility and effectiveness of this approach.

This paper briefly reviews recent studies on free-space photonic switches, and discusses classifications, applications and technical issues to be solved. The free-space photonic switch is a switch that uses light beam interconnections based on free-space optics instead of guided-wave optics. A feature of the free-space switch is its high-density three-dimensional structure that enables compact large-scale switches to be created. In this paper, the free-space switches are classified by their various attributes such as logical network configuration, path-establishment method, number of physical stages, signal-waveform transmission form, interconnection optics and so on. The logical network configuration (topological geometry or topology) is strongly related to the advantages of the free-space switches over the guided-wave switches. The path-establishment method (path-shifting/branching-and-gating) and the number of physical stages (single-stage/multistage) are related to physical switching characteristics. Signal-waveform transmission form (analog/digital) is related to switch application. Interconnection optics (imaging system/micro-beam system) is related to the density and volume of the switching fabric. Examples of the free-space switches (single-stage, analog multistage, digital multistage and photonic ATM switches) are described. Possible applications for analog switches are subscriber-line concentrators, inter-module connectors, and switching networks for parallel or distributed computer systems. Those for digital switches include multistage space-division switches in time-division circuit-switching or packet switching systems (including asynchronous transfer mode [ATM] switching system) for both communications switching systems and parallel/distributed computer systems. Technical issues of the free-space switches (system, device, assembly technique) must be solved before creating practical systems. In particular, the assembly technique is a key issue of the free-space switches.

From the viewpoint of customer's satisfaction, precise information and rapid action are very important when complaints about call connection failures or service quality deterioration come from customers. It is indispensable to the propose that operators are supported by an operation system which stores and processes each customer's information, their complaint's histories, network failure status and call connection detail data. This paper shows functions and Human Machine Interface (HMI) of Customer Complaint Handling System (CCHS). This system can handle a customer's complaint by an electric ticket and necessary information is automatically collected and shown on the ticket.

We consider a communication system in which a transmitter is connected to a receiver through parallel channels, and the Go-Back-N ARQ scheme is used to handle transmission errors. A packet error on one channel results in retransmission of packets assigned to other channels under the Go-Back-N ARQ scheme. Therefore, the channel-grouping (a grouped-channel is used to transmit the same packet at a time), would affect the throughput performance. We analyze the throughput performance, and give a tree-algorithm to efficiently search for the optimal channel-grouping which makes the throughput to become maximum. Numerical results show that the throughput is largely improved by using the optimal channel-grouping.

Directional dry etching of Tantalum is described X-ray lithography absorber patterns. Experiments are carried out using both reactive ion etching in CBrF3-based plasma and electron-cyclotron-resonance ion-stream etching in Cl2-based plasma. Ta absorber patterns with perpendicular sidewalls cannot be obtained by RIE when only CBrF3 gas is used as the etchant. While adding CH4 to CBrF3 effectively improves the undercutting of Ta patterns, it deteriorates etching stability because of the intensive deposition effect of CH4 fractions. By adding an Ar/CH4 mixture gas to CBrF3, it is possible to use RIE to fabricate 0.2-µm Ta absorber patterns with perpendicular sidewalls. ECR ion-stream etching is investigated to obtain high etching selectivity between Ta and SiO2 (etching mask)/SiN (membrane). Adding O2 to the Cl2 etchant improves undercutting without remarkably decreasing etching selectivity. Furthermore, an ECR ion-stream etching method is developed to stably etch Ta absorber patterns finer than 0.2µm. This is successfully applied to X-ray lithography mask fabrication for LSI test devices.

This paper introduces a constraint logic programming (CLP) language cu-Prolog as an implementation framework for constraint-based natural language processing. Compared to other CLP languages, cu-Prolog has several unique features. Most CLP languages take algebraic equations or inequations as constraints. cu-Prolog, on the other hand, takes Prolog atomic formulas in terms of user-defined predicates. cu-Prolog, thus, can describe symbolic and combinatorial constraints occurring in the constraint-based grammar formalisms. As a constraint solver, cu-Prolog uses the unfold/fold transformation, which is well known as a program transformation technique, dynamically with some heuristics. To treat the information partiality described with feature structures, cu-Prolog uses PST (Partially Specified Term) as its data structure. Sections 1 and 2 give an introduction to the constraint-based grammar formalisms on which this paper is based and the outline of cu-Prolog is explained in Sect. 3 with implementation issues described in Sect. 4. Section 5 illustrates its linguistic application to disjunctive feature structure (DFS) and parsing constraint-based grammar formalisms such as Japanese Phrase Structure Grammar (JPSG). In either application, a disambiguation process is realized by transforming constraints, which gives a picture of constraint-based NLP.

A case structure expression is one of the most important forms to represent the meaning of the sentence. Case structure analysis is usually performed by consulting case frame information in a verb dictionary. However, this analysis is very difficult because of several problems, such as word sense ambiguity and structural ambiguity. A conventional method for solving these problems is to use the method of selectional restriction, but this method has a drawback in the semantic marker (SM) method --the trade-off between descriptive power and construction cost. In this paper, we propose a method of case structure analysis based on examples in case frame dictionary This method uses the case frame dictionary which has some typical example sentences for each case frame, and it selects a proper case frame for an input sentence by matching the input sentence with the examples in the case frame dictionary. The best matching score, which is utilized for selecting a proper case frame for a predicate, can be considered as the score for the case structure of the predicate. Therefore, when there are two or more readings for a sentence because of structural ambiguity, the best reading of a sentence can be selected by evaluating the sum of the scores for the case structures of all predicates in a sentence. We report on experiments which shows that this method is superior to the conventional, coarse-grained SM method, and also describe the superiority of the example-based method over the SM method.

We propose an optical computing architecture called pure optical parall array logic system (P-OPALS) as an instance of sophisticated optical computing system. On the P-OPALS, high density images can be processed in parallel using the optical system with high resolving power. We point out problems on the way to develop the P-OPALS and propose logical foundation of the P-OPALS called single-input optical array logic (S-OAL) as a solution of those problems. Based on the proposed architecture, an experimental system of the P-OPALS is constructed by using three optical techniques: birefringent encoding, selectable discrete correlator, and birefringent decoding. To show processing capability of the P-OPALS, some basic parallel operations are demonstrated. The results obtained indicate that image consisting of 300 100 pixels can be processed in parallel on the experimental P-OPALS. Finally, we estimate potential capability of the P-OPALS.

It has been 15 years since we started producing the electric double-layer capacitors (also known as Super Capacitor) in 1978. Over the years we have introduced improvements that increased reliability and increased life. For example, after subjecting capacitors manufactured in 1984 and 1990 to load life tests (70, 5.5 V) for 2,000 hours, we discovered that the rate of change in capacitance (ΔC/C) of capacitors manufactured in 1990 was less than one-half that of capacitors manufactured in 1984. This shows that we have successfully increased the life of our electric double-layer capacitors. We conducted investigations regarding factors that contribute to volume of the electrolyte solution and better sealing properties. In the load life test, we observed that when the ratio of the weights of the electrolyte solution and the powdered activated carbon (hereinafter referred to as LB) was increased, the time it took before ΔC/C reached -30% was lengthened. This means that increasing LB also increases life. Furthermore, we also observed that when the gas permeability rate of the collector's rubber material was decreased in the load life test (70, 5.5 V), the time it took befor (ΔC/C) reached -30% was longer. Therefore life is dependent on the gas permeability rate (sealing property) of the collector rubber.

A new pattern synthesis method for multibeam reflector antennas is described. The Directional Constrained Minimum Power (DCMP) method, which was developed as an adaptive array algorithm, has been applied to reflector antennas with cluster feeds. The main objective of this pattern synthesis is to optimize the excitation distribution of the cluster primary feed in order to reduce the sidelobe level and to attain a high main beam gain. A desired contour beam pattern has also been attained by modifying this method. Furthermore, this paper describes other applications of this method, such as pattern optimization taking account of the frequency characteristics and the change in the radiation pattern due to an antenna pointing system, cross-polarization reduction, and monopulse pattern synthesis for an RF sensor.

Reflection type optical switches with intersecting waveguides and curved electrodes are newly proposed. The guided incident mode is expanded into an infinite spectrum of plane wavelets. The effects of light tunneling into the transmission port is taken care of by treating the 3-layer structure and using its reflection and transmission coefficients in estimation of the extinction ratios. It is found that the electrode curved in the form of an exponential spiral provides remarkably improved power reflectivity. This is because it poses a constant angle of incidence (smaller than the critical angle) to all variously oriented impinging wavelets. In this way, all plane wavelets are made to undertake total reflections. These total reflections result in considerably high extinction ratios to be achivable at the transmission port. It is also shown that the electrode length is shorter and the intersection angle is wider than those corresponding to a straight electrode. Therefore, it is concluded that the curvature of the electrode improves the switching characteristics of the device.