We propose multi-core erbium-doped fiber amplifiers for next-generation optical amplifiers utilized by space-division multiplexing technologies. Multi-core erbium-doped fiber amplifiers were studied widely as a means for overcoming exponential growth of internet traffic in the backbone network. We consider two approaches to excitation of erbium irons; One is core-pumping scheme, the other is cladding-pumping scheme. For a core-pumping configuration, we evaluate its applicability to future ultra long-haul network. In addition, we demonstrate that cladding-pumping configuration will enable reduction of power consumption, size, and cost because one multimode pumping laser diode can excite several cores simultaneously embedded in a common cladding and amplify several signals passed through the multi-core erbium-doped fiber cores.

Laser diode capable of high speed direct modulation is one of the key solution for short distance applications due to their low power consumption, low cost and small size features. Realization of high modulation bandwidth for direct modulated laser maintaining the above mentioned feature is needed to enhance the short distance, low cost data transmission. One promising approach to enhance the modulation speed is to increase the photon density to achieve high modulation bandwidth. So to achieve this target, 1.55 $mu$m InGaAsP/InGaAsP multiple quantum well (MQW) asymmetric active multimode interferometer laser diode (active MMI-LD) has been demonstrated [1]. The split pumping concept has been applied for the active MMI-LD and significant enhancement of electrical to optical 3 dB down frequency bandwidth (f$_{mathrm{3dB}})$ up to 8 GHz has been successfully confirmed. The reported high bandwidth for split pump active MMI-LD is around 3.5 times higher than the previously reported maximum 3 dB bandwidth (2.3 GHz) of active MMI-LD without split pumping section. That shows, the splitted multimode pumping section behind the electrically isolated modulation section can potentially improve the modulation bandwidth of active MMI-LD. Clear and open eye diagram had also been confirmed for 2.5 Gbps, (2$^{mathrm{7}}$-1) pseudo random bit sequence (PRBS) modulation.

Lossy identification schemes are used to construct tightly secure signature schemes via the Fiat-Shamir heuristic in the random oracle model. Several lossy identification schemes are instantiated by using the short discrete logarithm assumption, the ring-LWE assumption and the subset sum assumption, respectively. For assumptions concerning the integer factoring, Abdalla, Ben Hamouda and Pointcheval [3] recently presented lossy identification schemes based on the φ-hiding assumption, the QR assumption and the DCR assumption, respectively. In this paper, we propose new instantiations of lossy identification schemes. We first construct a variant of the Schnorr's identification scheme, and show its lossiness under the subgroup decision assumption. We also construct a lossy identification scheme which is based on the DCR assumption. Our DCR-based scheme has an advantage relative to the ABP's DCR-based scheme since our scheme needs no modular exponentiation in the response phase. Therefore our scheme is suitable when it is transformed to an online/offline signature.

This paper proposes a generic construction of hierarchical identity-based identification (HIBI) protocols secure against impersonation under active and concurrent attacks in the standard model. The proposed construction converts a digital signature scheme existentially unforgeable against chosen message attacks, where the scheme has a protocol for showing possession of a signing key, not a signature. Our construction is based on the so-called certificate-based construction of hierarchical identity-based cryptosystems, and utilizes a variant of the well-known OR-proof technique to ensure the security against impersonation under active and concurrent attacks. We also present several concrete examples of our construction employing the Waters signature (EUROCRYPT 2005), and other signatures. As results, its concurrent security of each instantiation is proved under the computational Diffie-Hellman (CDH) assumption, the RSA assumption, or their variants in the standard model. Chin, Heng, and Goi proposed an HIBI protocol passively and concurrently secure under the CDH and one-more CDH assumption, respectively (FGIT-SecTech 2009). However, its security is proved in the random oracle model.

At CaLC 2001, Howgrave-Graham proposed the polynomial time algorithm for solving univariate linear equations modulo an unknown divisor of a known composite integer, the so-called partially approximate common divisor problem. So far, two forms of multivariate generalizations of the problem have been considered in the context of cryptanalysis. The first is simultaneous modular univariate linear equations, whose polynomial time algorithm was proposed at ANTS 2012 by Cohn and Heninger. The second is modular multivariate linear equations, whose polynomial time algorithm was proposed at Asiacrypt 2008 by Herrmann and May. Both algorithms cover Howgrave-Graham's algorithm for univariate cases. On the other hand, both multivariate problems also become identical to Howgrave-Graham's problem in the asymptotic cases of root bounds. However, former algorithms do not cover Howgrave-Graham's algorithm in such cases. In this paper, we introduce the strategy for natural algorithm constructions that take into account the sizes of the root bounds. We work out the selection of polynomials in constructing lattices. Our algorithms are superior to all known attacks that solve the multivariate equations and can generalize to the case of arbitrary number of variables. Our algorithms achieve better cryptanalytic bounds for some applications that relate to RSA cryptosystems.

MIL-STD-188-220 standard specifies protocols for narrowband and voice-based tactical communication devices. However, the future tactical communication devices require broadband services for accurate command and control. In this letter, the enhancement for MIL-STD-188-220-based systems is proposed for use over wideband channels. Unlike the operation defined in the standard, transmissions in Bump-Slots uses P-Persistence method and give the higher p to stations experiencing longer delays. The proposed method is extensively evaluated and the performance enhancements are proved.

This paper is concerned with exploring an extended approach for the stability analysis and synthesis for Markovian jump nonlinear systems (MJNLSs) via fuzzy control. The Takagi-Sugeno (T-S) fuzzy model is employed to represent the MJNLSs with incomplete transition description. In this paper, not all the elements of the rate transition matrices (RTMs), or probability transition matrices (PTMs) are assumed to be known. By fully considering the properties of the RTMs and PTMs, sufficient criteria of stability and stabilization is obtained in both continuous and discrete-time. Stabilization conditions with a mode-dependent fuzzy controller are derived for Markovian jump fuzzy systems in terms of linear matrix inequalities (LMIs), which can be readily solved by using existing LMI optimization techniques. Finally, illustrative numerical examples are provided to demonstrate the effectiveness of the proposed approach.

As the use of information technology (IT) is explosively spreading, reducing the power consumption of IT devices such as servers has become an important social challenge. Nevertheless, while the efficiency of the power supply modules integrated into computers has recently seen significant improvements, their overall efficiency generally depends on load rates. This is especially true under low power load conditions, where it is known that efficiency decreases drastically. Recently, power-saving techniques that work by controlling the power module configuration under low power load conditions have been considered. Based on such techniques, further efficiency improvements can be expected by an adaptive efficiency controls which interlocks the real-time data processing load status with the power supply configuration control. In this study, the performance counters built into the processor of a computer are used to predict power load variations and an equation that predicts the power consumption levels is defined. In a server application experiment utilizing prototype computer hardware and regression analysis, it is validated that the equation could precisely predict processor power consumption. The evaluation shows that significant power supply efficiency improvements could be achieved especially for light load condition. The dependency of the efficiency improvement and operation period is investigated and preferable time scale of the adaptive control is proposed.

The notion of pseudo-free groups was first introduced and formalized by Hohenberger and Rivest in order to unify cryptographic assumptions. Catalano, Fiore and Warinschi proposed a generalized notion called adaptive pseudo-free groups, and showed that the RSA group $Z_N^ imes$ is adaptive pseudo-free with some specific parametric distribution under the strong RSA assumption. In this paper, we develop an alternative parametric distribution and show that the RSA group $Z_N^ imes$ is adaptive pseudo-free with the parametric distribution under the RSA assumption rather than the strong RSA assumption.

Coarse-grained Reconfigurable Architecture (CGRA) is a parallel computing platform that provides both high performance of hardware and high flexibility of software. It is becoming a promising platform for embedded and mobile applications. Since the embedded and mobile devices are usually battery-powered, improving battery lifetime becomes one of the primary design issues in using CGRAs. In this paper, we propose a battery-aware task-mapping method to optimize energy consumption and improve battery lifetime. The proposed method mainly addresses two problems: task partitioning and task scheduling when mapping applications onto CGRA. The task partitioning and scheduling are formulated as a joint optimization problem of minimizing the energy consumption. The nonlinear effects of real battery are taken into account in problem formulation. Using the insights from the problem formulation, we design the task-mapping algorithm. We have used several real-world benchmarks to test the effectiveness of the proposed method. Experiment results show that our method can dramatically lower the energy consumption and prolong the battery-life.

This paper introduces our developed noise robust speech communication techniques and describes its implementation to a smart info-media system, i.e., a small robot. Our designed speech communication system consists of automatic speech detection, recognition, and rejection. By using automatic speech detection and recognition, an observed speech waveform can be recognized without a manual trigger. In addition, using speech rejection, this system only accepts registered speech phrases and rejects any other words. In other words, although an arbitrary input speech waveform can be fed into this system and recognized, the system responds only to the registered speech phrases. The developed noise robust speech processing can reduce various noises in many environments. In addition to the design of noise robust speech recognition, the LSI design of this system has been introduced. By using the design of speech recognition application specific IC (ASIC), we can simultaneously realize low power consumption and real-time processing. This paper describes the LSI architecture of this system and its performances in some field experiments. In terms of current speech recognition accuracy, the system can realize 85-99% under 0-20dB SNR and echo environments.

Battery life and outdoor visibility are two of the most important features for mobile applications today. It is desirable to achieve both low power consumption and excellent outdoor visibility on the display device at the same time. We have previously reported a new RGBW method to realize low power consumption and high luminance with high image quality. In this paper, the basic concept of a new RGBW calculation utilizing an “Extended HSV color space” model is described, and also its performance, such as low power consumption, color image reproducibility and outdoor visibility is presented. The new method focuses on the luminance-increase ratio by means of a White signal for the display image data, and derives the appropriate RGBW signal and backlight PWM signal for every frame period. This dynamically controlled system solves the problems of conventional RGBW systems, and realizes the same image quality as a corresponding RGB display. In order to quantify its color image reproducibility, a spectroscopic measurement has been completed using the Macbeth Color Chart. In addition, the advantages of high luminance by the new RGBW method is described. The converted tone curve with an RGBW method provides very high luminance, such as 1,000cd/m2, and improved outdoor visibility. Finally, a newly developed 4.38-inch full-HD (1,080 × 1,920) 503ppi prototype LCD utilizing this new RGBW technology is described.

A novel spatially modulated communication method, appropriate for wireless power transmission applications at 5.8GHz, is proposed using dual scatterers embedded with lumped elements. Analytical expression for the received wave in the spatial modulation is derived, and the characteristics are verified with simulation and measurement by varying the embedded capacitor. The maximum measured variation of the received voltage is more than 15dB and that of the phase is more than 270 degrees at 5.8GHz. The estimated amplitude modulation factor is more than 70%. Using the data obtained, we estimate the practical received waveforms modulated by the applied voltage to a varactor for the amplitude modulation scheme.

With the technology scaling down, leakage power becomes an important part of total power consumption. The relatively large leakage current weakens the energy recovery capability of adiabatic circuits and reduces its superiority, compared with static CMOS circuits in the field of low-power design. In this paper, we rebuild three types of adiabatic circuits (2N2N2P, IPAL and DCPAL) based on FinFET devices to obtain a large leakage power reduction by rationally utilizing the different operating modes of FinFET devices (SG, LP, and IG). A 16-bit adiabatic adder has been investigated to demonstrate the advantages of FinFET adiabatic circuits. The Predictive Technology Model (PTM) is used for 32-nm bulk MOSFET and FinFET devices and all of the simulations are based on HSPICE. The results evince the proposed FinFET adiabatic circuits have a considerable reduction (more than 60% for SG mode FinFET and more than 80% for LP mode FinFET) of power consumption compared with the bulk MOSFET ones. Furthermore, the FinFET adiabatic circuits also have higher limiting frequency of clock source and better noise immunity.

Ternary content addressable memory (TCAM) is popular LSI for use in high-throughput forwarding engines on routers. However, the unique structure applied in TCAM consume huge amounts of power, therefore it restricts the ability to handle large lookup table capacity in IP routers. In this paper, we propose a commodity-memory based hardware architecture for the forwarding information base (FIB) application that solves the substantial problems of power and density. The proposed architecture is examined by a fabricated test chip with 40 nm embedded DRAM (eDRAM) technology, and the effect of power reduction verified is greatly lower than conventional TCAM based and the energy metric achieve 0.01 fJ/bit/search. The power consumption is almost 0.5 W at 250 Msps and 8M entries.

Optimizing lifetime of a wireless sensor network has received considerable attention in recent years. In this paper, using the feasibility and simplicity of grid-based clustering and routing schemes, we investigate optimizing lifetime of a two-dimensional wireless sensor network. Thus how to determine the optimal grid sizes in order to prolong network lifetime becomes an important problem. At first, we propose a model for lifetime of a grid in equal-grid model. We also consider that nodes can transfer packets to a grid which is two or more grids away in order to investigate the trade-off between traffic and transmission energy consumption. After developing the model for an adjustable-grid scenario, in order to optimize lifetime of the network, we derive the optimal values for dimensions of the grids. The results show that if radio ranges are adjusted appropriately, the network lifetime in adjustable-grid model is prolonged compared with the best case where an equal-grid model is used.

In this paper, we propose an identity-based authenticated key exchange (ID-AKE) protocol that is secure in the identity-based extended Canetti-Krawczyk (id-eCK) model in the random oracle model under the gap Bilinear Diffie-Hellman assumption. The proposed ID-AKE protocol is the most efficient among the existing ID-AKE protocols that is id-eCK secure, and it can be extended to use in asymmetric pairing.

This paper examines two-pass authenticated key exchange (AKE) protocols that are secure without the NAXOS technique under the gap Diffie-Hellman assumption in the random oracle model: FHMQV [18], KFU1 [21], SMEN- [13], and UP [17]. We introduce two protocol, biclique DH protocol and multiplied biclique DH protocol, to analyze the subject protocols, and show that the subject protocols use the multiplied biclique DH protocol as internal protocols. The biclique DH protocol is secure, however, the multiplied biclique DH protocol is insecure. We show the relations between the subject protocols from the viewpoint of how they overcome the insecurity of the multiplied biclique DH protocol: FHMQV virtually executes two multiplied biclique DH protocols in sequence with the same ephemeral key on two randomized static keys. KFU1 executes two multiplied biclique DH protocols in parallel with the same ephemeral key. UP is a version of KFU1 in which one of the static public keys is generated with a random oracle. SMEN- can be thought of as a combined execution of two multiplied biclique DH protocols. In addition, this paper provides ways to characterize the AKE protocols and defines two parameters: one consists of the number of static keys, the number of ephemeral keys, and the number of shared secrets, and the other is defined as the total sum of these numbers. When an AKE protocol is constructed based on some group, these two parameters indicate the number of elements in the group, i.e., they are related to the sizes of the storage and communication data.

In this paper, an energy- and traffic-balance-aware mapping algorithm from IP cores to nodes in a network is proposed for application-specific Network-on-Chip(NoC). The multi-objective optimization model is set up by considering the NoC architecture, and addressed by the proposed mapping algorithm that decomposes mapping optimization into a number of scalar subproblems simultaneously. In order to show performance of the proposed algorithm, the application specific benchmark is applied in the simulation. The experimental results demonstrate that the algorithm has advantages in energy consumption and traffic balance over other algorithms.

Object-oriented languages have recently become common, making register indirect jumps more important than ever. In object-oriented languages, virtual functions are heavily used because they improve programming productivity greatly. Virtual function calls usually consist of register indirect jumps, and consequently, programs written in object-oriented languages contain many register indirect jumps. The prediction of the targets of register indirect jumps is more difficult than the prediction of the direction of conditional branches. Many predictors have been proposed for register indirect jumps, but they cannot predict the jump targets with high accuracy or require very complex hardware. We propose a method that resolves jump targets by forwarding execution results. Our proposal dynamically finds the producers of register indirect jumps in virtual function calls. After the execution of the producers, the execution results are forwarded to the processor's front-end. The jump targets can be resolved by the forwarded execution results without requiring prediction. Our proposal improves the performance of programs that include unpredictable register indirect jumps, because it does not rely on prediction but instead uses actual execution results. Our evaluation shows that the IPC improvement using our proposal is as high as 5.4% on average and 9.8% at maximum.