Optoelectronic hybrid integration is a promising technology for realizing the optical components needed in optical transmission, switching, and interconnection systems that use wavelength division multiplexing (WDM) and time division multiplexing (TDM). We have already developed versatile optical hybrid integrated modules using a silica-based planar lightwave circuit (PLC) platform. However, these modules consist solely of the optoelectronic semiconductor devices such as laser diodes (LDs) and photo diodes (PDs) and monolithic optoelectronic integrated circuits (OEICs). To carry out high-speed and versatile electric signal processing functions in future network systems, it is necessary to install semiconductor electrical integrated circuits (ICs) on a PLC platform. In this paper, we describe novel technologies for high-speed PLC platforms which make it possible to assemble both ICs and optoelectronic devices. Using these technologies, we fabricated a two-channel hybrid integrated optical transmitter module which is hybrid integrated with an LD array chip and an LD driver IC. On this PLC platform, we use microstrip lines (MSLs) to drive the LD driver IC. We also considered the effect of heat interference on the LD array chip caused by the LD driver IC when designing the layout of the chip assembly region. The LD array chip and the LD driver IC were flip-chip bonded with solder bumps of a different material to avoid any deterioration in the coupling efficiency of the LD array chip. The optical transmitter module we fabricated operated successfully at 9 Gbit/s non-return-zero (NRZ) signal. This approach using a PLC platform for the hybrid integration of an LD array chip and an LD driver IC will carry forward the development of high-speed optoelectronic modules with both optical and electrical signal processing functions.

Optoelectronic hybrid integration is a promising technology for realizing the optical components needed in optical transmission, switching, and interconnection systems that use wavelength division multiplexing (WDM) and time division multiplexing (TDM). We have already developed versatile optical hybrid integrated modules using a silica-based planar lightwave circuit (PLC) platform. However, these modules consist solely of the optoelectronic semiconductor devices such as laser diodes (LDs) and photo diodes (PDs) and monolithic optoelectronic integrated circuits (OEICs). To carry out high-speed and versatile electric signal processing functions in future network systems, it is necessary to install semiconductor electrical integrated circuits (ICs) on a PLC platform. In this paper, we describe novel technologies for high-speed PLC platforms which make it possible to assemble both ICs and optoelectronic devices. Using these technologies, we fabricated a two-channel hybrid integrated optical transmitter module which is hybrid integrated with an LD array chip and an LD driver IC. On this PLC platform, we use microstrip lines (MSLs) to drive the LD driver IC. We also considered the effect of heat interference on the LD array chip caused by the LD driver IC when designing the layout of the chip assembly region. The LD array chip and the LD driver IC were flip-chip bonded with solder bumps of a different material to avoid any deterioration in the coupling efficiency of the LD array chip. The optical transmitter module we fabricated operated successfully at 9 Gbit/s non-return-zero (NRZ) signal. This approach using a PLC platform for the hybrid integration of an LD array chip and an LD driver IC will carry forward the development of high-speed optoelectronic modules with both optical and electrical signal processing functions.

A high performance voltage down converter (VDC) is proposed in this paper. The proposed VDC can automatically control the driving current in seven phases to reduce the fluctuation of output voltage in VDC. By using above new flexible control technology of driving current, the fluctuation of output voltage can be suppressed to less than 10% and the average consuming current of VDC can be suppressed to 34 µA, even if the operation frequency is 200 MHz at the average driving current 100 mA. Therefore, the proposed VDC can operate with large driving current, low-power consumption and good response at the same time. Above all, this technology is very suitable for high perform ULSIs which require large load current, very low-power and high speed operation.

In this paper, we analyze the inverse scattering problem by a new deterministic method called "Source and Radiation Field Solution," which has the merit that both the source and the radiation field can be treated at the same time, the effect of which has already shown in ordinary scattering problems.

A photorefractive ring resonator with self-pumped four-wave mixing (PRRR-SPFWM) in which the Cat mirror region and the four-wave mixing region are formed in a single photorefractive crystal is proposed, and the steady-state analysis of this unknown device is first performed. Since the backward pump beam is generated as a phase conjugate of the forward pump beam in the Cat mirror region, counterpropagation of both pump beams is spontaneously obtained. We analyze its oscillation intensities in steady state, and show that the threshold coupling strength of oscillation depends on the cavity mirror reflectivity and the reflectivity of the Cat mirror region. We also show interesting property of PRRR-SPFWM, the possibility to switch over between unidirectional and bidirectional oscillation by controlling the amplitude of coupling strength.

This paper describes new IC design concepts using flip-chip bonding technologies for microwave and millimeter-wave circuit integration. Two types of bonding technologies, stud bump bonding (SBB) and micro bump bonding (MBB) are introduced, and their applications to microwave and millimeter-wave ICs are presented. Receiver front-end hybrid IC (HIC) for cellular and PHS handsets using SBB and new millimeter-wave ICs on Si substrate called millimeter flip-chip IC (MFIC) using MBB have been designed and fabricated to prove their advantages. These flip-chip bonding technologies are experimentally proven to provide excellent solutions for high performance and compact-sized ICs with low-cost. The HIC concept is applicable consistently over a wide range of devices from RF/microwave to millimeter-wave region.

This paper describes new millimeter-wave ICs based on flip-chip bonding using micro bumps on a low cost silicon substrate, named millimeter-wave flip-chip ICs (MFICs). They have significant advantages such as good performance, low cost and excellent flexibility in the active device selection which makes them superior to conventional monolithic microwave integrated circuits (MMICs). In order to demonstrate these advantages, a K-band front-end block for a broadband wireless communication equipment was designed and fabricated. This front-end block consists of four MFIC chips: a low noise amplifier (LNA), a down converter and two medium power amplifiers. These chips are designed to satisfy stable operation conditions using a simplified model derived for micro bump bonding (MBB). In experimental measurements; the LNA using heterojunction field-effect transistors (HFETs) had an 18 dB gain, the down converter using an HFET had a 9. 5 dB conversion loss, and two power amplifiers using heterojunction bipolar transistors (HBTs) had saturated powers of 13. 0 dBm and 11. 7 dBm, respectively. The performance for each of the developed ICs agreed with the designed values, and satisfied circuit requirements. These results show that the MFIC technique is a potential technology for manufacturing multi-functional millimeter-wave ICs.

This paper describes the evaluation of the Voltage Down Converter (VDC) with low ratio of consuming current to load current in DC/AC operation mode. The stability, response and power consumption are investigated. First, for the stability and response, the VDC can operate in the condition that the bounce of the down voltage (dVDL) is no more than 10% of the setting voltage and the maximum load operation frequency (fmax) is 100 MHz at the average load current 70 mA (the maximum load current 140 mA). Secondly, for the power consumption, by using this VDC technology, the value of IC/IL can be suppressed to 5.1E-4 (IC: total consuming current in VDC, IL: average load current) in the condition that dVDL is no more than 10% of the setting voltage and fmax is 10 MHz at the average load current 70 mA. Thus, it is made clear that the VDC can realize high stability, good response and low power consumption at the same time. This technology is suitable for high performance ULSIs which require large load current and low-power consumption.

The following, which is related to the design of the microwave filters, is mainly presented: (1) certain useful approximation which can be obtained by double-resistive- terminated 2-ports consisting of a cascade of two 1-variable 2-ports in different variables, and (2) an approach for filter design from 2-variable viewpoint. Approximations presented provide useful magnitude responses in 2-D domain. Hence it is discussed that how the provided 2-D responses can be used for the design of the microwave filters. Furthermore, properties of the 2-variable transfer functions resulting in such circuits are given.

Media processors have emerged so that a single LSI can realize multiple multimedia functions, such as graphics, video, audio and telecommunication with effectively shared hardware and flexible software. First, the difference between media processors and general-purpose microprocessors with multimedia extensions is clarified. Features for processes and data in the multimedia applications are summarized and are followed by the multimedia enhancements that the recent general-purpose microprocessors use. The architecture for media processors reflects the further optimized utilization of these features and realizes better price-performance ratio than the general-purpose microprocessors. Finally, the future directions of media processors are estimated, based on the performance, the power dissipation and the die size of the present microprocessors with multimedia extensions and the present media processors. The demand to improve the price-performance ratio for the whole system and to reduce the power consumption makes the media processor evolve into a system processor, which integrates not only the media processor but also the function of a general-purpose microprocessor, various interfaces and DRAMs.

Ferroelectric non-volatile memory (FeRAM) has been inspiring interests since bismuth layer perovskite material family was found to provide "Fatigue Free" endurance, superior retention and imprint characteristics. In this paper, we will provide new circuits technology for FeRAM developed to implement high speed operation, low voltage operation and low power consumption. Performance of LSI embedded with FeRAM for contactless IC card is also provided to demonstrate the feasibility of the circuit technology.

Repeaterless transmission system design employing remote pumping in a single fiber is clarified. The design is aimed to realize cost effective submarine transmission systems with easy maintenance. Remote pumping in a single fiber can extend repeaterless transmission distance without decreasing the system capacity per cable. It is applicable for high-count-fiber cable such as the 100-fiber submarine cable already developed. A simple but effective system configuration is presented that uses remote pumping from receiver end; both remote-pre erbium-doped fiber (EDF) amplification and backward pumping Raman amplification are employed. Stable transmission can be obtained without optical isolators, therefore the optical time domain reflectometry (OTDR) method is supported by this system. Three fiber configurations, which consist of dispersion shifted fiber (DSF), pure silica core fiber (PSCF) and a combination of DSF and PSCF, are examined to compare system performance. Remote-pre EDF is optimized in terms of length and location from receiver end by optical SNR (OSNR) calculations. Maximum signal output power is also determined through a waveform simulation based on the split-step Fourier method, in order to avoid waveform distortion caused by the combined effect of self-phase modulation (SPM) and group velocity dispersion (GVD). Through these calculations and simulations, we confirm the proposed repeaterless transmission system performance of 600Mbit/s-451 km with PSCF, 2. 5 Gbit/s-407 km with DSF + PSCF, and 10 Gbit/s-376 km with DSF+PSCF, which include system margin.

In this paper, we describe the properties of an external cavity modelocked semiconductor laser with a tunability of wavelength, pulse width and repetition rate. This modelocked laser generates optical pulses with pulse widths down to 180 fs and with repetition rates up to 14 GHz in a 120 nm wavelength range near 1. 55 µm or 1. 3 µm. The generated pulses are close to the transform limit and are therefore suitable for very high speed communication systems. In addition to the tunability, this pulse source is a compact and mechanically stable device. We report on two applications of this pulse source in optical time division multiplexing experiments. In the first example the modelocked laser is used as an all-optical clock recovery. In the second example the modelocked laser was used to characterize an interferometric switch by pump-probe experiments.

We have studied the methods to operate single electron circuits with high reliability at room temperature. By simulation, we have numerically analyzed the error mechanisms of the room-temperature operation of a 2-gate electron pump as a fundamental single electron element circuit. We have found from the results that under the room temperature condition where the ratio of the electrostatic energy to the thermal energy for a transition electron is not so large, the minimum operation error probability is obtained at the specific gate sweep time when the circuit is operated with ramp-waveform control voltages. The analyses indicate that in the shorter sweep time range, the error probability increases because the gate voltage has changed before the significant electron transition occurs, and that in the longer sweep time range, the error probability also increases due to undesired-single-transition events. The optimum sweep time is estimated statically with the relationship between desired- and undesired-single-transition rates as a function of control gate voltages. Using the optimum condition, the operation reliability is expected to be improved by a factor of 100. This estimation method has been also confirmed by the time-dependent Monte-Carlo simulation.

In this paper, we analyze overload and stability in the charge-pump phase locked loop (PLL). We propose a new computational model that can be applied for the precise estimation of the physical limits of charge-pump, the leakage current of loop filter and waveform distortion of charge-pump PLL operating in high speed. We derive the exact mathematical expressions of the parameters describing the steady-state behavior of the PLL as well as the transient-state behavior. Performance comparisons with the conventional model are provided through numerical results. Algorithms for approximate analysis is also provided. The new model is particularity useful for analyzing the cases that the charge-pump PLL operates in high- speed or the loop filter has large leakage current.

The present study investigated the human ability to selectively process pictures and words in free recall. We explored whether successful bias towards a subset of priority items occurs at the expense of the remaining items-i.e., whether successful priority item bias necessitates the dumping of information related to non-priority items. It has been shown that an increase in the percentage of correct recalls to items given priority in the pre-test instructions induces a decrease in the percentage of correct recalls for non-priority items. Even in a free recall experimental paradigm, the information dumping phenomenon was observed. However, there were no effects of stimulus presentation time and stimulus modality (picture vs. word) on the percentage of correct recalls detected.

Recently, many types of high-density recording technologies for future MO (Magneto-Optical) storage have been reported. MSR (Magnetically Induced Super Resolution) technology is one of the most promising candidates, and over ten types of MSR technologies have been already proposed. However, they are not well-discussed from the viewpoint of total recording technology which would include the recording and readout methods, the pick-up technology and the signal processing technology. Key technologies for realizing MO storage of over 7 GBytes in a CD-sized disk using a red laser are proposed, and the experimental results pertaining to each key technology are described. The write/read characteristics were examined for the CAD (Center Aperture Detection)-MSR disk. From the characteristics of the CAD-MSR disk combined with laser pumped magnetic field modulation recording, it was shown that land/groove (0.7 µm width) recording with the linear density of 0.27 µm/bit and track pitch below 0.7 µm can be realized. It was also shown that CAD-MSR disk is well combined with an OSR (Optical Super Resolution) pick up, laser pumped read-out and PRML (Partial Response Maximum Likelihood) technologies which are very useful to achieve a high density MO disk. Using CAD-MSR disk combined with above technologies together, high density write/read with a bit length of 0.2 µm and a track pitch of 0.6 µm should be realized with using the laser of 635 nm wavelength. Applying the CAD-MSR disks to a CD sized MO disk, the capacity becomes over 7 GBytes (Format efficiency: 80%), which is 20 times higher than 5.25 inches MO disk and 1.5 times than DVD-ROM.

This letter describes our DFB-LD module for use in WDM optical access networks. We realized an isolator-free DFB-LD module with a thermo-electric cooler in aim of stabilizing the emission wavelength for WDM systems. Silicon waferboard technology was employed to achieve simple assembly and small size of the module. This small size contributed to low TEC power. Our fabricated module demonstrated low-noise and stable emission wavelength characteristics under 156 Mbit/s pseudo random modulation.

The application of pulse-doped GaAs MESFET's to a power amplifier module is discussed in this paper. The epitaxial layer structure was redesigned to have a dual pulse-doped structure for power applications, achieving a sufficient gate-drain brakdown voltage with excellent linearity. The measured load-pull characteristics of the redesigned device for the minimum power consumption design was presented. This device was shown to have almost twice the power-added efficiency of a conventional ion-implanted GaAs MESFET. Two kinds of power amplifiers were designed and fabricated, achieving Pout of 28.6 dBm at IM3 of -40 dBc with Pdc of 8 W and Pout of 33.0 dBm at IM3 of -40 dBc with Pdc of 32 W, respectively.

In this paper, in order to achieve the low power consumption of programmable divider in a PLL frequency synthesizer, we propose a new prescaler method for low power consumption. A fixed prescaler is inserted in front of the (N +1/2) programmable divider which is designed based on the new principle. The divider ratio in the loop does not vary at all even if such a prescaler is utilized. Then the permissible delay periods of a programmable divider can be extended to two times as long as the conventional method, and the low power consumption and low cost in a PLL frequency synthesizer have been achieved.