The concept of dual pairing vector spaces (DPVS) was introduced by Okamoto and Takashima in 2009, and it has been employed in various applications, functional encryption (FE) including attribute-based encryption (ABE) and inner-product encryption (IPE) as well as attribute-based signatures (ABS), generic conversion from composite-order group based schemes to prime-order group based ones and public-key watermarking. In this paper, we show the concept of DPVS, the major applications to FE and the key techniques employed in these applications. This paper presents them with placing more emphasis on plain and intuitive descriptions than formal preciseness.

Support of incoming traffic differentiation and Quality of Service (QoS) assurance is very important for the development of high performance packet switches, capable of separating traffic flows. In our previous paper, we proposed the implementation of two buffers at each crosspoint of a crossbar fabric that leads to the Dual Crosspoint Queued (DCQ) switch. Inside DCQ switch, one buffer is used to store the real-time traffic and the other for the non-real-time traffic. We also showed that the static priority algorithms can provide the QoS only for the real-time traffic due to their greedy nature that gives the absolute priority to that type of traffic. In order to overcome this problem, in our paper we propose the DCQ switch with the Largest Weighted Occupancy First scheduling algorithm that provides the desired QoS support for both traffic flows. Detailed analysis of the simulation results confirms the validity of proposed solution.

Realization of a planar dual-band fork three-way power divider (PDBF3PD) with Cheng's equivalent structure is discussed. The Cheng's structure consists of two open-circuited stubs and a transmission line, and the characteristic impedances tend to be high. As a result, the realizable range of frequency ratios of upper frequency to lower frequency is limited in a narrow area. In this paper, an impedance scale factor is proposed to transform characteristic impedances into a realizable range and to facilitate the design of PDBF3PDs. Theoretical considerations are verified using a simulator of ADS2008U and by an experiment.

Scheduling is a key problem in high level synthesis, as the scheduling results affect most of the important design metrics. In this paper, we propose a novel scheduling method to simultaneously optimize the leakage power of functional units with dual-Vth techniques and the number of registers under given timing and resource constraints. The mobility overlaps between operations are removed to eliminate data dependencies, and a simulated-annealing-based method is introduced to explore the mobility overlap removal solution space. Given the overlap-free mobilities, the resource usage and register usage in each control step can be accurately estimated. Meanwhile, operations are scheduled so as to optimize the leakage power of functional units with minimal number of registers. Then, a set of operations is iteratively selected, reassigned as low-Vth, and rescheduled until the resource constraints are all satisfied. Experimental results show the efficiency of the proposed algorithm.

This paper studies Tripartite Key Exchange (3KE) which is a special case of Group Key Exchange. Though general one-round GKE satisfying advanced security properties such as forward secrecy and maximal-exposure-resilience (MEX-resilience) is not known, it can be efficiently constructed with the help of pairings in the 3KE case. In this paper, we introduce the first one-round 3KE which is MEX-resilient in the standard model, though existing one-round 3KE schemes are proved in the random oracle model (ROM), or not MEX-resilient. Each party broadcasts 4 group elements, and executes 14 pairing operations. Complexity is only three or four times larger in computation and communication than the existing most efficient MEX-resilient 3KE scheme in the ROM; thus, our protocol is adequately practical.

This paper presents a voice conversion technique using speaker-dependent Restricted Boltzmann Machines (RBM) to build high-order eigen spaces of source/target speakers, where it is easier to convert the source speech to the target speech than in the traditional cepstrum space. We build a deep conversion architecture that concatenates the two speaker-dependent RBMs with neural networks, expecting that they automatically discover abstractions to express the original input features. Under this concept, if we train the RBMs using only the speech of an individual speaker that includes various phonemes while keeping the speaker individuality unchanged, it can be considered that there are fewer phonemes and relatively more speaker individuality in the output features of the hidden layer than original acoustic features. Training the RBMs for a source speaker and a target speaker, we can then connect and convert the speaker individuality abstractions using Neural Networks (NN). The converted abstraction of the source speaker is then back-propagated into the acoustic space (e.g., MFCC) using the RBM of the target speaker. We conducted speaker-voice conversion experiments and confirmed the efficacy of our method with respect to subjective and objective criteria, comparing it with the conventional Gaussian Mixture Model-based method and an ordinary NN.

Wireless body area networks (BANs) are attracting great attention as a future technology of wireless networks for healthcare and medical applications. Wireless BANs can generally be divided into two categories, i.e., wearable BANs and implant BANs. However, the performance requirements and channel propagation characteristics of these two kinds of BANs are quite different from each other, that is, wireless signals are approximately transmitted along the human body as a surface wave in wearable BANs, on the other hand, the signals are transmitted through the human tissues in implant BANs. As an effective solution for this problem, this paper first introduces a dual-mode communication system, which is composed of transmitters for in-body and on-body communications and a receiver for both communications. Then, we evaluate the bit error rate (BER) performance of the dual-mode communication system via computer simulations based on realistic channel models, which can reasonably represent the propagation characteristics of on-body and in-body communications. Finally, we conduct a link budget analysis based on the derived BER performances and discuss the link parameters including system margin, maximum link distance, data rate and required transmit power. Our computer simulation results and analysis results demonstrate the feasibility of the dual-mode communication system in wireless BANs.

This paper introduces a partially parallel inter-chip link architecture for asynchronous multi-chip Network-on-Chips (NoCs). The multi-chip NoCs that operate as a large NoC have been recently proposed for very large systems, such as automotive applications. Inter-chip links are key elements to realize high-performance multi-chip NoCs using a limited number of I/Os. The proposed asynchronous link based on level-encoded dual-rail (LEDR) encoding transmits several bits in parallel that are received by detecting the phase information of the LEDR signals at each serial link. It employs a burst-mode data transmission that eliminates a per-bit handshake for a high-speed operation, but the elimination may cause data-transmission errors due to cross-talk and power-supply noises. For triggering data retransmission, errors are detected from the embedded phase information; error-detection codes are not used. The throughput is theoretically modelled and is optimized by considering the bit-error rate (BER) of the link. Using delay parameters estimated for a 0.13 µm CMOS technology, the throughput of 8.82 Gbps is achieved by using 10 I/Os, which is 90.5% higher than that of a link using 9 I/Os without an error-detection method operating under negligible low BER (<10-20).

The complicated indoor environment such as obstacles causes the non-line of sight (NLOS) environment. In this paper, we propose a voting matrix based residual weighting (VM-Rwgh) algorithm to mitigate NLOS errors in indoor localization system. The voting matrix is employed to provide initial localization results. The residual weighting is used to improve the localization accuracy. The VM-Rwgh algorithm can overcome the effects of NLOS errors, even when more than half of the measurements contain NLOS errors. Simulation results show that the VM-Rwgh algorithm provides higher location accuracy with relatively lower computational complexity in comparison with other methods.

This paper proposes a radiation-hardened phase-locked loop (RH-PLL) with a switchable dual modular redundancy (DMR) structure. After radiation strikes, unhardened PLLs suffer clock perturbations. Conventional RH-PLLs have been proposed to reduce recovery time after perturbation. However, this recovery still requires tens of clock cycles. Our proposal involves ‘detecting’ and ‘switching’, rather than ‘recovering’ from clock perturbation. Detection speed is crucial for robust perturbation-immunity. We identify types of clock perturbation and then propose a set of detectors to detect each type. With this method, the detectors guarantee high-speed detection that leads to perturbation-immune switching from a radiated clock to an undistorted clock. The proposed RH-PLL was fabricated and then verified with a radiation test on real silicon.

In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-Vth) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (Vth) assignment stage, the proposed algorithm first initializes all the operations to high-Vth, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-Vth until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].

A ghost reduction algorithm for multiple angle sensors tracking objects under dual hypotheses is proposed. When multiple sensors and multiple objects exist on the same plane, the conventional method is unable to distinguish the real objects and ghosts from all possible pairs of measurement angle vectors. In order to resolve the issue stated above, the proposed algorithm utilizes tracking process considering dual hypotheses of real objects and ghosts behaviors. The proposed algorithm predicts dynamics of all the intersections of measurement angle vector pairs with the hypotheses of real objects and ghosts. Each hypothesis is evaluated by the residuals between prediction data and intersection. The appropriate hypothesis is extracted trough several data sampling. Representative simulation results demonstrate the effectiveness of the proposed algorithm.

In this paper, the authors present a CAM-based Information Detection Hardware System for fast, exact and approximate image matching on 2-D data, using FPGA. The proposed system can be potentially applied to fast image matching with various required search patterns, without using search principles. In designing the system, we take advantage of Content Addressable Memory (CAM) which has parallel multi-match mode capability and has been designed, using dual-port RAM blocks. The system has a simple structure, and does not employ any Central Processor Unit (CPU) or complicated computations.

This paper addresses a high-level synthesis (HLS) using dual-edge-triggered flip-flops (DETFFs) as memory elements. In DETFF-based HLS, the duty cycle becomes a manageable resource to improve the timing performance. To utilize the duty cycle radically, a programmable duty cycle (PDC) mechanism is built into this HLS, and captured by a new HLS task named PDC scheduling. As a first step toward DETFF-based HLS with PDC, the execution time minimization problem is formulated for given results of operation scheduling. A linear program is presented to solve this problem in polynomial time. As a next step, simultaneous operation scheduling and PDC scheduling problem for the same objective is tackled. A mixed integer linear programming-based (MILP) approach is presented to solve this problem. The experimental results show that the MILP can reduce the execution time for several benchmarks.

This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.

This paper proposes novel robust speech F0 estimation using Summation Residual Harmonics (SRH) based on TV-CAR (Time-Varying Complex AR) analysis. The SRH-based F0 estimation was proposed by A. Alwan, in which the criterion is calculated from LP residual signals. The criterion is summation of residual spectrum value for harmonics. In this paper, we propose SRH-based F0 estimation based on the TV-CAR analysis, in which the criterion is calculated from the complex AR residual. Since complex AR residual provides higher resolution of spectrum, it can be considered that the criterion is effective for F0 estimation. The experimental results demonstrate that the proposed method performs better than conventional methods; weighted auto-correlation and YIN.

In this paper, we propose a jointly optimized predictive-adaptive partitioned block transform to exploit the spatial characteristics of intra residuals and improve video coding performance. Under the assumptions of traditional Markov representations, the asymmetric discrete sine transform (ADST) can be combined with a discrete cosine transform (DCT) for video coding. In comparison, the interpolative Markov representation has a lower mean-square error for images or regions that have relatively high contrast, and is insensitive to changes in image statistics. Hence, we derive an even discrete sine transform (EDST) from the interpolative Markov model, and use a coding scheme to switch between EDST and DCT, depending on the prediction direction and boundary information. To obtain an implementation independent of multipliers, we also propose an orthogonal 4-point integer EDST, which consists solely of adds and bit-shifts. We implement our hybrid transform coding scheme within the H.264/AVC intra-mode framework. Experimental results show that the proposed scheme significantly outperforms standard DCT and ADST. It also greatly reduces the blocking artifacts typically observed around block edges, because the new transform is more adaptable to the characteristics of intra-prediction residuals.

This paper analyzes the performance of a two-way relay network experiencing co-channel interference from multiple interferers due to aggressive frequency reuse in cellular networks. We discuss two different scenarios: Outages are declared individually for each user (individual outage) and an outage is declared simultaneously for all users (common outage). We derive the closed-form expressions for the individual and common outage probabilities of the two-way relay network with multiple interferers. The validity of our analytical results is verified by a comparison with simulation results. It is shown that the analytical results perfectly match the simulation results of the individual and common outage probabilities. Also, it is shown that the individual and common outage probabilities increase as the number of interferers increases.

Information security has been seriously threatened by the differential power analysis (DPA). Delay-based dual-rail precharge logic (DDPL) is an effective solution to resist these attacks. However, conventional DDPL convertors have some shortcomings. In this paper, we propose improved convertor pairs based on dynamic logic and a sense amplifier (SA). Compared with the reference CMOS-to-DDPL convertor, our scheme could save 69% power consumption. As to the comparison of DDPL-to-CMOS convertor, the speed and power performances could be improved by 39% and 54%, respectively.

The topic of retrieving videos containing a desired person from a dataset just using the content of faces without any help of textual information has many interesting applications like video surveillance, social network, video mining, etc. However, traditional face matching against a huge number of detected faces leads to an unacceptable response time and may also reduce the accuracy due to the large variations in facial expressions, poses, lighting, etc. Therefore, in this paper we propose a novel method to generate discriminative “signatures” for efficiently retrieving the videos containing the same person with a query. In this research, the signature is defined as a compact, discriminative and reduced dimensionality representation, which is generated from a set of high-dimensional feature vectors of an individual. The desired videos are retrieved based on the similarities between the signature of the query and those of individuals in the database. In particular, we make the following contributions. Firstly, we give an algorithm of two directional linear discriminant analysis with maximum correntropy criterion (2DLDA-MCC) as an extension to our recently proposed maximum correntropy criterion based linear discriminant analysis (LDA-MCC). Both algorithms are robust to outliers and noise. Secondly, we present an approach for transferring a set of exemplars to a fixed-length signature using LDA-MCC and 2DLDA-MCC, resulting in two kinds of signatures that are called 1D signature and 2D signature. Finally, a novel video retrieval scheme is given based on the signatures, which has low storage requirement and can achieve a fast search. Evaluations on a large dataset of videos show reliable measurement of similarities by using the proposed signatures to represent the identities generated from videos. Experimental results also demonstrate that the proposed video retrieval scheme has the potential to substantially reduce the response time and slightly increase the mean average precision of retrieval.