This paper describes the outline of recent standardization activities for Radio on Fiber (RoF) transmitter by IEC TC103/WG5. RoF transmitter consists of optical fibers, electrical to optical (E/O) converter, and optical to electrical (O/E) converter. IEC TC103/WG5 is working on standardization on measurement method of E/O and O/E devices, and technical specification of RoF transmitter. This paper overviews those standardization activities which are being developed by TC103/WG5 as well as the National Committee of WG5.

A low-power switching method using a bootstrapping circuit is proposed for a high-speed output driver of transmitter. Compared with a conventional output driver, the proposed scheme employs only nMOSFETs to transmit data. The bootstrapping circuit ensures the proper switching of nMOSFET. The proposed scheme is simulated and fabricated using a 0.18 µm CMOS technology, showing 10.2% lower power consumption than a conventional switching driver at 2.5 Gb/s data rate.

A 12 Gb/s 10-level pulse amplitude modulation (PAM) serial-link transmitter was implemented using a 0.18 µm CMOS process. The proposed 10-PAM transmitter achieves a channel efficiency of 4 bit/symbol by dual-mode amplitude modulations using 10 differential-mode levels and 3 common-mode levels. The measured maximum data-rate was 12 Gb/s over 0.7-m cable and 2-cm printed circuit board (PCB) traces. The entire transmitter consumes 432 mW such that the figure of merit of the transmitter is 36 pJ/bit. The present work demonstrates the greater channel efficiency of 4 bit/symbol than the currently reported multi-level PAM transmitters.

A MB-OFDM UWB transmitter with on-chip transformer and LO leakage calibration for WiMedia bandgroup 1 is presented. The measurements show a gain-flatness of 1 dB, an LOLRR of -53 dBc/-43 dBc (wi/o cali), an EVM of 2.2% with a power consumption of 22 mW and an area of 1.26 mm2.

This paper presents a 100–120-GHz pulse transmitter chip with a 5424 on-chip loop antenna array for the purpose of beam-formability in portable millimeter-wave (mm-wave) active imaging applications. We present a new idea for silicon-based mm-wave pulse beam-forming by using voltage-varied CMOS inverter chain. This 4-mm4-mm transmitter chip is designed and fabricated in a 2.5-V 0.25-µm 4-metal-layer Si-Ge Bi-CMOS process. The 30-µm30-µm loop antenna located on the top-metal layer operates as an coil in an integrated mm-wave pulse generator. Each of on-chip pulse generators employing under-damped/over-damped conditions to produce mm-wave pulses includes an R-L-C circuit, a bipolar junction transistor (BJT) operated as a switch and a CMOS inverter chain circuit for shaping the rising edge of the input clock. Simulation results by ADS 2009 and HSPICE show that loop antenna' inductance and resistance at 80–120-GHz are 51 pH and 3 Ω, respectively. A simulation performance of an integrated 136 loop antenna array illustrates the variation of maximum radiation angles depending on different phase values between array's elements. By using an mm-wave power meter, a 90–140-GHz standard horn antenna and a Schottky diode detector, several measured radiation patterns of this loop antenna array chip are achieved. From the measurement result, we demonstrate the possibility of an integrated mm-wave pulse generator for the purpose of beam-forming by changing power supplies of inverter chains.

This paper proposes a windowed-sinc function based peak-to-average power ratio (PAPR) reduction scheme for applying the polar transmitter techniques to orthogonal frequency division multiplexing (OFDM), where the high PAPR problem occurs. The proposed algorithm mitigates the effect of excessive suppression due to successive peaks or relatively high peaks of a signal, which is often observed when applying the conventional peak windowing scheme. The bit error rate (BER) and error vector magnitude (EVM) performances are measured for various window types and lengths. The simulation results demonstrate that the proposed algorithm achieves significant improvement in terms of BER and PAPR reduction performance while maintaining similar spectrum performance compared to the conventional peak windowing scheme.

High-performance 1.3-µm electroabsorption modulators integrated with DFB lasers are developed for long-reach 100 Gbit Ethernet. The dynamic extinction ratio of over 8-dB with the voltage swing of 2 V are achieved for the four LAN-WDM lanes (14 nm wavelength range) used in 100 Gbit Ethernet with the same modulator structure. The fabricated devices are packaged in butterfly modules and four-lane 40-km single mode fiber transmission at 25-Gbit/s operation is demonstrated. Further, a can-type transmitter optical subassembly is fabricated to reduce the cost and size of transmitter modules. The use of a low-dielectric-constant liquid crystal polymer transmission line makes the 3-dB bandwidth larger and enables 25-Gbit/s operation with CAN-TOSA module.

A differential BPSK transmitter for ultra-wideband impulse-radio communication has been presented in this paper. The transmitter, developed in a 65 nm CMOS process,is simple in design and occupies a core area of 0.0017 mm2. The differential Gaussian monocycle pulses (GMP) are generated using some logic blocks and delay elements. The generated GMP, having a center frequency above 5 GHz, meets the FCC regulations. Measured results show that the transmitter consumes 1.8 pJ/bit to transmit BPSK modulated GMP at a data rate of 2 Gb/s. The interface circuitries eliminate the need for external networks for chip to antenna matching. Using an off-chip differential bow-tie antenna, data can easily be transmitted up to a distance of 10 cm which made it suitable for low power far field non-coherent applications.

A micro-power active-RFID LSI with an all-digital RF-transmitting scheme achieves experimental 10-m-distance communication with a 1-Mbps data rate in the 300-MHz frequency band. The IC consists of an RF transmitter and a power supply circuit. The RF transmitter generates wireless signals without a crystal. The power supply circuit controls the energy flow from the battery to the IC and offers intermittent operation of the RF transmitter. The IC draws 1.6 µA from a 3.4-V supply and is implemented in a 0.2-µm CMOS process in an area of 1 mm2. The estimated lifetime of the IC is over ten years with a coin-size battery.

A sub-harmonic RF transmitter architecture with simultaneous power combination and carrier-leakage cancellation is proposed. It employs an 8-phase ring-type voltage controlled oscillator (VCO), sub-harmonic mixers, driver amplifiers, and a balun. A signal power is combined with its 180° phase-shifted signal through the balun. Simultaneously carrier-leakage generating in sub-harmonic mixers is canceled by its phase difference. The proposed transmitter achieved 1 dBm 1-dB output compression point (P-1dB) under 1.8 V supply and -40 dBm carrier-leakage in 5 GHz band.

A wideband, low noise, and highly linear transmitter for multi-mode radio is presented. Envelope injection scheme with a CMOS amplifier is developed to obtain sufficient linearity for complex modulation schemes such as OFDM, and to achieve low noise for concurrent operation of more than one standard. Active matching technique with doubly terminated LPF topology is also presented to realize wide bandwidth, low power consumption, and to eliminate off-chip components without increasing die area. A multi-mode transmitter is implemented in a 0.13 µm CMOS technology with an active area of 1.13 mm2. Third-order intermodulation product is improved by 17 dB at -3 dBm output by the envelope injection scheme. The transmitter achieves EVM of less than -29.5 dB at -3 dBm output from 0.2 to 7.2 GHz while consuming only 69 mW. The transmitter is also tested with multiple standards of UMTS, 802.11b, WiMax, 802.11a, and 802.11n, and satisfies EVM, ACLR, and spectrum specifications.

This paper presents the design of a driver amplifier (DA) for a cordless mouse application, operating at the 2.4 GHz ISM unlicensed band. The DA is a single-ended topology, and is composed of two stages: the first stage is a cascode amplifier to provide high gain and good input-output isolation, while the output stage is a simple common source amplifier that adopts a novel current reuse scheme to reduce the DC bias current by half. The DA implemented in a 0.18 µm CMOS process has a 16 dB gain at 2.4 GHz, and it can drive a 3 dBm to the antenna with an output stage drain efficiency of 31% and a power-added efficiency (PAE) of 20% while drawing 4.5 mA from a 1.8 V supply.

This paper presents a calibration scheme for delay mismatch between envelope and phase in the OFDM polar transmitter. An asynchronous delay detection method is proposed to avoid using a complicated signal processing algorithm or synchronous elements which need high clocking rates for detecting small delay mismatch. This scheme uses buffer delay chains to estimate the mismatch and then the estimated delay values are asynchronously stored in registers. It is verified that the proposed scheme well suites application to the OFDM polar transmitter through SPW, Matlab and HDL simulations. It achieves the margin of about 20 dB at 20 MHz offset, 10 dB at 40 MHz offset in terms of spectral limit specified in WLAN standard.

The envelope pulse-width modulation (EPWM) transmitter has been proposed to address the power efficiency issue in the linear amplification of multicarrier signals. However, the delta-sigma (Δ-Σ) modulator in the EPWM transmitter generates quantization noise that degrades the output signal quality. In this paper, noise and distortion characteristics of the EPWM transmitter in the amplification of the OFDM signal are presented. First, quantization noise and distortion due to amplitude clipping are analyzed. Theoretical noise power spectral density (PSD) and error vector magnitude (EVM) are obtained as functions of the Δ-Σ modulator and input signal parameters. Then, simulations to validate the noise and distortion characteristics are done using the IEEE 802.11a OFDM signal and first- and second-order Δ-Σ modulators. The effects of bandpass filtering on EVM and adjacent channel leakage power ratio (ACLR) are also obtained by simulation. Results showed good agreement with the analytical results despite the use of the linear-approximation gain plus noise model. The EPWM transmitter that employed the first-order Δ-Σ modulator with a 0.1% clipping probability, an oversampling ratio of 32 and a three-pole Butterworth bandpass filter yielded an EVM of 1.8% and an ACLR of -37.9 dB, which are sufficiently lower than the OFDM transmitter specification.

A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about 50 Ω, was implemented using a 70 nm 1-poly 3-metal DRAM process with a 1.5 V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

A digital 3 Gbps 0.2 V differential transmitter is proposed using a voltage-mode pseudo-LVDS output driver. The delay mismatch between two pre-drivers is digitally calibrated by a modified digital DLL with the duty cycle correction. The height and width of eye opening are improved by 103% and 46%, respectively. The power consumption is 11.4 mW at 1.2 V with 0.18 µm process.

A 0.4-5.8 GHz SiGe-MMIC quadrature modulator (Q-MOD) employing a self current controlled mixer for cognitive radio is described. The self current controlled mixer consists of a Gilbert cell mixer and a self current control circuit which is composed of both a current feedback circuit and an output buffer amplifier. The self current control circuit automatically controls the mixer current according to the output power level, and improves the linearity over wide radio frequency (RF) range. Simulation results show that the proposed Q-MOD realizes 1 dB compression point (P1 dB) improvement of more than 3.0 dB compared to the conventional Q-MOD at the frequencies of 0.4, 0.8, 1.95, 5.2 and 5.8 GHz. The fabricated Q-MOD achieves P1 dB improvement of more than 2.8 dB under the same condition. It also improves the output power with error vector magnitude (EVM) of 3.0% (Pout@EVM=3.0%), and achieves the Pout improvement of more than 2.7 dB under the modulation conditions of UHF wireless system (OFDM/16QAM, 0.4 GHz), W-CDMA (HPSK/QPSK, 0.8 GHz/1.95 GHz) and wireless-LAN (OFDM/64QAM, 5.2 GHz/5.8 GHz).

The paper introduces both high-speed transmission and quality of system to offer the Internet services on a HFC (Hybrid Fiber Coaxial) network. This utilizes modulating the phase and the amplitude to the signal of the IPMS (Internet Protocol Multicasting Service). An IP-cable transmitter, IP-cable modem, and IP-cable management servers that support 30-Mbps IPMS on the HFC were developed. The system provides a 21 Mbps HDTV transporting stream on a cable TV network. It can sustain a clear screen for a long time.

This paper describes recent technology trend of mixed analog digital RF circuits. With the progress of CMOS technology, large-scale digital signal process and control function can be integrated in an RF integrated circuit and some analog signal process blocks can be translated to digital signal processing units. At the same time, the design of remaining analog functional blocks becomes very hard. In this paper, those integration techniques for receiver and transmitter in these 20 years are reviewed. As a typical example of digital assisted systems, synthesizer based transmitters are discussed in detail.

This paper presents analysis and identification method of Wiener-Hammerstein system to characterize a nonlinear RF transmitter in fundamental frequency zone. A two-tone signal is used to analyze and identify a Wiener-Hammerstein model. A RF signal is converted to baseband-equivalent complex signal, and Wiener-Hammerstein model is considered to have a baseband equivalent complex polynomial and linear filters. For a two-tone input signal, closed form descriptions of the output signal in the time domain and frequency domain are developed using a newly suggested nonlinearly modulated two-tone phasors (NMTP). The relationship between frequency terms of input and output signals in RF transmitters are represented with linear matrix-vector equation based on NMTP analysis. An advantage of the proposed method is its simplicity using closed form analysis and linear approximation. In addition, we can model a wideband system with relatively narrowband measurements by sweeping two-tone signal. The prediction of spectral regrowth and the predistortion performance for WiBro 1FA signal demonstrate the validity of the proposed approach in identifying the nonlinear RF transmitters.