In this paper, we propose a hybrid test application in partial skewed-load (PSL) scan design. The PSL scan design in which some flip-flops (FFs) are controlled as skewed-load FFs and the others are controlled as broad-side FFs was proposed in [1]. We notice that the PSL scan design potentially has a capability of two test application modes: one is the broad-side test mode, and the other is the hybrid test mode which corresponds to the test application considered in [1]. According to this observation, we present a hybrid test application of the two test modes in the PSL scan design. In addition, we also address a way of skewed-load FF selection based on propagation dominance of FFs in order to take advantage of the hybrid test application. Experimental results for ITC'99 benchmark circuits show that the hybrid test application in the proposed PSL scan design can achieve higher fault coverage than the design based on the skewed-load FF selection [1] does.

The cooperative relay network exploits the space diversity gain by allowing cooperation among users to improve transmission quality. It is an important issue to identify the cluster-head (or relay node) and its members who are to cooperate. The cluster-head consumes more battery power than an ordinary node since it has extra responsibilities, i.e., ensuring the cooperation of its members' transmissions; thereby the cluster-head has a lower throughput than the average. Since users are joining or departing the clusters from time to time, the network topology is changing and the network may not be stable. How to balance the fairness among users and the network stability is a very interesting topic. This paper proposes an adaptive weighted clustering algorithm (AWCA), in which the weight factors are introduced to adaptively control both the stability and fairness according to the number of arrival users. It is shown that when the number of arrival users is large, AWCA has the life time longer than FWCA and similar to SWCA and that when the number of arrival users is small, AWCA provides fairness higher than SWCA and close to FWCA.

We have studied effects of additive elements into the channel layers of amorphous IGZO TFTs on threshold voltage shift issues under light illumination stress condition. By addition of Hf or Si element, the Vth shift under light illumination and negative bias-temperature stress and illumination stress conditions was drastically suppressed while the switching operation of TFTs using IGZO with Mn or Cu was not observed. It was found that the addition of Si or Hf element into the IGZO channel layer leads to reducing the hole trap sites formed at or near the gate insulator/IGZO channel interface.

We proposed a novel UV curable reactive mesogen monomer for VA-LCD with Polymer-Sustained (Stabilized) Vertical Alignment (PSVA) which shows a high display performance. The experimental results reveal that the PSVA by the novel-monomer realizes less image sticking and better response time.

We propose a robust and efficient algorithm called ROCKET for clustering large-scale transaction databases. ROCKET is a divisive hierarchical algorithm that makes the most of recent hardware architecture. ROCKET handles the cases with the small and the large number of similar transaction pairs separately and efficiently. Through experiments, we show that ROCKET achieves high-quality clustering with a dramatic performance improvement.

This paper presents a software-based parallel cryptographic solution with a massive-parallel memory-embedded SIMD matrix (MTX) for data-storage systems. MTX can have up to 2,048 2-bit processing elements, which are connected by a flexible switching network, and supports 2-bit 2,048-way bit-serial and word-parallel operations with a single command. Furthermore, a next-generation SIMD matrix called MX-2 has been developed by expanding processing-element capability of MTX from 2-bit to 4-bit processing. These SIMD matrix architectures are verified to be a better alternative for processing repeated-arithmetic and logical-operations in multimedia applications with low power consumption. Moreover, we have proposed combining Content Addressable Memory (CAM) technology with the massive-parallel memory-embedded SIMD matrix architecture to enable fast pipelined table-lookup coding. Since both arithmetic logical operation and table-lookup coding execute extremely fast on these architectures, efficient execution of encryption and decryption algorithms can be realized. Evaluation results of the CAM-less and CAM-enhanced massive-parallel SIMD matrix processor for the example of the Advanced Encryption Standard (AES), which is a widely-used cryptographic algorithm, show that a throughput of up to 2.19 Gbps becomes possible. This means that several standard data-storage transfer specifications, such as SD, CF (Compact Flash), USB (Universal Serial Bus) and SATA (Serial Advanced Technology Attachment) can be covered. Consequently, the massive-parallel SIMD matrix architecture is very suitable for private information protection in several data-storage media. A further advantage of the software based solution is the flexible update possibility of the implemented-cryptographic algorithm to a safer future algorithm. The massive-parallel memory-embedded SIMD matrix architecture (MTX and MX-2) is therefore a promising solution for integrated realization of real-time cryptographic algorithms with low power dissipation and small Si-area consumption.

The brain-machine interface (BMI) is a new method for man-machine interface, which enables us to control machines and to communicate with others, without input devices but directly using brain signals. Previously, we successfully developed a real time control system for operating a robot arm using brain-machine interfaces based on the brain surface electrodes, with the purpose of restoring motor and communication functions in severely disabled people such as amyotrophic lateral sclerosis patients. A fully-implantable wireless system is indispensable for the clinical application of invasive BMI in order to reduce the risk of infection. This system includes many new technologies such as two 64-channel integrated analog amplifier chips, a Bluetooth wireless data transfer circuit, a wirelessly rechargeable battery, 3 dimensional tissue-fitting high density electrodes, a titanium head casing, and a fluorine polymer body casing. This paper describes key features of the first prototype of the BMI system for clinical application.

In this paper, we study the problem of efficient processing of conjunctive queries in Peer-to-Peer systems based on Distributed Hash Tables (P2P DHT, for short). The basic idea of our approach is to cache the search result for the queries submitted in the past, and to use them to improve the performance of succeeding query processing. More concretely, we propose to adopt Bloom filters as a concrete implementation of such a result cache rather than a list of items used in many conventional schemes. By taking such an approach, the cache size for each conjunctive query becomes as small as the size of each file index. The performance of the proposed scheme is evaluated by simulation. The result of simulation indicates that the proposed scheme is particularly effective when the size of available memory in each peer is bounded by a small value, and when the number of peers is 100, it reduces the amount of data transmissions of previous schemes by 75%.

We consider a stabilization problem of a class of input-delayed nonlinear systems that have not only feedforward, but also some non-feedforward nonlinearity. While there are some existing results that deal with input-delayed non-feedforward nonlinear systems, they often assume a small input delay. It has been often the case that for a large input delay, the results are limited to only feedforward systems. In this letter, combined with the LMI approach in [3] and the reduction method in [5], we show that some feedforward and non-feedforward systems with a large delay in the input can be stabilized via the proposed controller.

We address the stability property of the FAST TCP congestion control algorithm. Based on a continuous-time dynamic model of the FAST TCP network, we establish that FAST TCP in itself is globally exponentially stable without any specific conditions on the congestion control parameter or the update gain. Simulation results demonstrate the validity of the global exponential stability of FAST TCP.

This paper studies a switched dynamical system based on the boost converter with a solar cell input. The solar cell is modeled by a piecewise linear current-controlled voltage source. A variant of peak-current-controlled switching is used in the boost converter. Applying the mapping procedure, the system dynamics can be analyzed precisely. As a main result, we have found an important example of trade-off between the maximum power point and stability: as a parameter (relates to the clock period) varies, the average power of a periodic orbit can have a peak near a period-doubling bifurcation set and an unstable periodic orbit can have the maximum power point.

It is important to find an efficient design-for-testability methodology that satisfies both security and testability, although there exists an inherent contradiction between security and testability for digital circuits. In our previous work, we reported a secure and testable scan design approach by using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers, and showed a security level by clarifying the cardinality of those classes of shift register equivalents (SR-equivalents). However, SR-equivalents are not always secure for scan-based side-channel attacks. In this paper, we consider a scan-based differential-behavior attack and propose several classes of SR-equivalent scan circuits using dummy flip-flops in order to protect the scan-based differential-behavior attack. To show the security level of those SR-equivalent scan circuits, we introduce a differential-behavior equivalent relation and clarify the number of SR-equivalent scan circuits, the number of differential-behavior equivalent classes and the cardinality of those equivalent classes.

In this paper, we propose a text corpus design method for a Korean stereo super-wideband speech database. Since a small-sized text corpus for speech coding is generally required for speech coding, the corpus should be designed to comply with the pronunciation behavior of natural conversation in order to ensure efficient speech quality tests. To this end, the proposed design method utilizes a similarity measure between the phoneme distribution occurring from natural conversation and that from the designed text corpus. In order to achieve this goal, we first collect and refine text data from textbooks and websites. Next, a corpus is designed from the refined text data based on the similarity measure to compare phoneme distributions. We then construct a Korean stereo super-wideband speech (K-SW) database using the designed text corpus, where the recording environment is set to meet the conditions defined by ITU-T. Finally, the subjective quality of the K-SW database is evaluated using an ITU-T super-wideband codec in order to demonstrate that the K-SW database is useful for developing and evaluating super-wideband codecs.

Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to wireless transceiver SoC design, which is instrumental in allowing fast and low-cost productization, is in creating the inherent capability to assess performance and allow for low-cost built-in calibration and compensation, as well as characterization and final-testing. These internal capabilities can often rely solely on the SoCs existing processing resources, representing a zero cost adder, requiring only the development of the appropriate algorithms. This paper presents various examples of built-in measurements that have been demonstrated in wireless transceivers offered by Texas Instruments in recent years, based on the digital-RF processor (DRPTM) technology, and highlights the importance of the various types presented; built-in self-calibration and compensation, built-in self-characterization, and built-in self-testing (BiST). The accompanying statistical approach to the design and productization of such products is also discussed, and fundamental terms related with these, such as 'soft specifications', are defined.

Although a large number of query processing algorithms in spatial network database (SNDB) have been studied, there exists little research on route-based queries. Since moving objects move only in spatial networks, route-based queries, like in-route nearest neighbor (IRNN), are essential for Location-based Service (LBS) and Telematics applications. However, the existing IRNN query processing algorithm has a problem in that it does not consider time and space constraints. Therefore, we, in this paper, propose IRNN query processing algorithms which take both time and space constraints into consideration. Finally, we show the effectiveness of our IRNN query processing algorithms considering time and space constraints by comparing them with the existing IRNN algorithm.

This brief paper describes design-for-testability (DFT) circuitry that reduces testing time and thus cost of testing DC linearity of SAR ADCs. We present here the basic concepts, an actual SAR ADC chip design employing the proposed DFT, as well as measurements that verify its effectiveness. Since the DFT circuit overhead is small, it is practicable.

This letter is devoted to derivation of a transformation law which converts a class of nonlinear affine control systems with n-states and 2-iputs into simpler systems with chained structure. First, we give a problem formulation that we consider throughout this letter. We next introduce a transformation law and gives its mathematical certification. Then, we apply the transformation method to an example and consider control design based on chained structure for the example in order to confirm the effectiveness of our approach.

In this letter, we propose an improved Droptail algorithm that introduces the random packet drop strategy. Our theoretical analysis and experiments prove that the improved Droptail can match the most performance of AQM algorithms in stabilizing the TCP system and solving the global synchronization problem, while significantly reducing the complexity of the router control. This fact shows that our algorithm is superior to the most popular AQM algorithms such as RED, PI, etc.

This paper describes a new technique for the design of 3-terminal regulators in which the output voltage level can be adjusted without additional terminals or extra off-chip components. This circuit restricts the increase in the number of terminal pins by using a pin as both a voltage supply output and a voltage setup input. The voltage setup information is introduced using a serial control signal from outside the chip. Using the intermediate voltage level between the supply voltage and the regulator output, the adjustment data in the internal nonvolatile memory are safely updated without noise disturbance. To input the setup information into the chip in a stable manner, we developed a new 1-wire serial interface which combines key pattern matching and burst signal detection. To ensure high reliability, we suggested a quantitative method for evaluating the influence of noise in our new interface using a simple model with superimposed random noise. Circuits additional to those for a conventional 3-terminal regulator, include a 1-wire serial communication circuit, a low-capacity non-volatile memory, and a digital to analog (D/A) converter. A test chip was developed using 0.35 µm standard CMOS process, and there was almost no overhead to the conventional 3-terminal regulator in both chip area and power dissipation. In an on-board test with the test chip, we confirmed successful output voltage adjustment from 1.0 V to 2.7 V with approximately 6.5 mV precision.

Source-follower-based (SFB) continuous-time low-pass filters (LPF) have the advantages of low power and high linearity over other filter topologies. The second-order SFB filter cells, which are key building blocks for high-order SFB filters, are often realized by composite source follower with positive feedback. For a single branch 2nd-order SFB cell, the linearity drops severely at high frequencies in the pass band because its slew-rate is restricted by the Q factor and the pole frequency. The folded 2nd-order SFB cell provides higher linearity because it has two DC branches, and hence has another freedom to increase the slew rate. However, because of the positive feedback, the folded and unfolded 2nd-order SFB cells, especially those with high Q factors, tend to be unstable and act as relaxation oscillators under given circuit parameters. In order to obtain higher Q factor, a new topology for the 2nd-order SFB cell without positive feedback is proposed in this paper, which is unconditionally stable and can provide high linearity. Based on the folded 2nd-order SFB cell and the proposed high-Q SFB cell, a 264 MHz sixth-order LPF with 3 stages for ultra wideband (UWB) applications is designed in 0.18 µm CMOS technology. Simulation results show that the LPF achieves an IIP3 of above 12.5 dBm in the whole pass band. The LPF consumes only 4.1 mA from a 1.8 V power supply, and has a layout area of 200 µm 150 µm.