A receiver structure, which has linear computational complexity with the number of users, is proposed for decoding multiuser information data in a convolutionally coded asynchronous DS-CDMA system in multipath fading channels. The proposed receiver architecture consists of a multiuser likelihood calculator followed by a bank of soft-input soft-output (SISO) channel decoders. Information is fed back from SISO channel decoders to multiuser likelihood calculator, and the processing proceeds in an iterative fashion analogous to the decoding of turbo codes. A simplification to the above receiver structure is given too. Simulation results demonstrate that for both receiver structures at high signal-to-noise ratios (SNR) both multiple-access interference (MAI) and inter-symbol interference (ISI) are efficiently suppressed, and single-user performance is approached. Furthermore, the proposed iterative receiver is near-far resistant.

16-bit Asian language codes can not be compressed well by conventional 8-bit sampling text compression schemes. Previously, we reported the application of a word-based text compression method that uses 16-bit sampling for the compression of Japanese texts. This paper describes our further efforts in applying a word-based method with a static canonical Huffman encoder to both Japanese and Chinese texts. The method was proposed to support a multilingual environment, as we replaced the word-dictionary and the canonical Huffman code table for the respective language appropriately. A computer simulation showed that this method is effective for both languages. The obtained compression ratio was a little less than 0.5 without regarding the Markov context, and around 0.4 when accounting for the first order Markov context.

Fundamental EMI source that generates common-mode radiation from printed circuit boards (PCBs) is investigated here. It is done by modelling the ground lines of PCBs as imperfect ground. The radiation emission in the far zones from PCBs is obtained by regarding interconnects on PCBs as transmission lines and the far field emission is evaluated based on the current distribution of the lines. The finite size ground trace is defined as an imperfect ground, that can be viewed as an inductive reactance which, in turn, causes the ground return path to radiate as a wire antenna. For the accurate analysis of imperfect ground effect, we divide the equivalent circuit into N sections. In addition, based on transverse electromagnetic (TEM) assumption, we estimate the electromagnetic interference (EMI) of three typical PCB geometries, namely, coplanar strips, parallel-plate strips and microstrips. The quantitative value of induced current distribution along the ground return path depends on the physical size, geometry and length of ground traces. Measured data are presented to confirm the result of numerical analysis. A knowledge of EMI source mechanisms and their relationship to layout geometries is necessary to determine the essential features that must be taken into account to estimate emissions and provide direction for reducing EMI due to interconnects on PCBs.

We suggest a new probe message structure and an efficient probe-based deadlock detection and recovery algorithm that can be used in distributed database systems. We determine the characteristics of the probe messages and suggest an algorithm that can reduce the communication cost required for deadlock detection and recovery.

This paper investigates the impact of inter-carrier interference (ICI) due to Doppler spread on the packet error rate (PER) performance in Orthogonal Frequency and Code Division Multiplexing (OFCDM) packet wireless access employing turbo coding in a multipath fading channel, and describes the optimization of the sub-carrier spacing, Δ f, i.e., the number of sub-carriers, Nc, with an approximate 50-100 MHz bandwidth. Simulation results show that although the uncoded OFCDM in a 1-path flat Rayleigh fading channel is affected by the ICI caused by the Doppler spread when the maximum Doppler frequency, fD, becomes more than 5% of Δ f, OFCDM employing turbo coding in a 24-path Rayleigh fading channel is robust against Doppler spread and the degradation is not apparent until fD reaches more than 10% of Δ f. This is because the turbo coding gain and the frequency diversity effect compensate for the degradation due to ICI. Meanwhile, the PER performance with a larger Nc is degraded, since the effect of the error correction capability becomes smaller due to the larger variance of the despread OFCDM symbols associated with the narrower spreading bandwidth in the frequency domain. Consequently, along with the packet frame efficiency for accommodating the guard interval to compensate for the maximum multipath delay time of 1 µsec, we clarify that the optimum number of sub-carriers is approximately 512-1024 (the corresponding Δ f becomes 156.3-78.1 kHz) for broadband OFCDM packet wireless access assuming a 50-100 MHz bandwidth.

As a remarkable development of VLSI technology, a gate switching delay is reduced and a signal delay of a net comes to have a considerable effect on the clock period. Therefore, it is required to minimize signal delays in digital VLSIs. There are a number of ways to evaluate a signal delay of a net, such as cost, radius, and Elmore's delay. Delays of those models can be computed in linear time. Elmore's delay model takes both capacitance and resistance into account and it is often regarded as a reasonable model. So, it is important to investigate the properties of this model. In this paper, we investigate the properties of the model and construct a heuristic algorithm based on these properties for computing a wiring of a net to minimize the interconnection delay. We show the effectiveness of our proposed algorithm by comparing ERT algorithm which is proposed in [2] for minimizing the maximum Elmore's delay of a sink. Our proposed algorithm decreases the average of the maximum Elmore's delay by 10-20% for ERT algorithm. We also compare our algorithm with an O(n4) algorithm proposed in [15] and confirm the effectiveness of our algorithm though its time complexity is O(n3).

In an orthogonal frequency division multiplexing (OFDM) system, the bit error performance is degraded in the presence of multiple propagation paths whose excess delays are longer than the Guard Interval (GI), because the orthogonality between subcarriers cannot be maintained. In this paper, we propose a new OFDM demodulation method with a variable-length effective symbol and a multi-stage inter-carrier interference (ICI) canceller, in order to improve the bit error performance in the presence of multipaths whose excess delays are longer than the GI. The influence of the inter-symbol interference (ISI) is eliminated by the variable-length effective symbol, and then the ICI component is reduced by the multi-stage ICI canceller. The principle of the proposed method is explained, and the performance of the proposed method is then evaluated by computer simulation. The results show that the proposed method improves the system availability under more various multipath fading environments without changing the system parameters.

A wireless communications system with a transmission speed of 18 Mbit/s is presented using the 2.4 GHz ISM band. This system employs the Carrier Frequency Offset-Spread Spectrum (CFO-SS) scheme and the Dual-Polarization Staggered Transmission (DPST) scheme. The 18 Mbit/s CFO-SS system (named CFO-SS18) was developed and its performance evaluated in fields. In this paper, the detailed operating principle of CFO-SS and DPST schemes, together with the specifications and structures of CFO-SS18, are presented. Results of indoor and field tests obtained by using CFO-SS18 are also presented.

An S-band linearizer was developed using GaAs MMIC technology. We call it the even-order-distortion-implemented intermodulation distortion controller (EODIC). EODIC uses even-order intermodulation distortion (IM) components in the second harmonic frequency band to control its IM components in the fundamental frequency band. EODIC is a suitable tool to compensate near-saturated high power amplifiers (HPAs). We developed an EODIC using MMIC technology. This paper describes the principle of EODIC and then introduces the EODIC MMIC in detail. This paper also presents the IM reduction performance of an EODIC in a near-saturated HPA.

This paper proposes and investigates a coding and decoding scheme to achieve adaptive channel coding using a Finite State Machine (FSM) for Software Defined Radio (SDR). Adaptive channel coding and decoding systems that can switch between different coding rates and error correcting capabilities in order to adapt to changing applications and environments, are effective for SDR. However, in these systems, a receiver cannot always select the correct decoder which causes decoding errors, usually referred to as Decoder-Selection-Errors (DSE). We propose a trellis encoder estimation scheme that compensates for this problem. This scheme uses the circuit of FSM to limit the encoder transition and the Viterbi algorithm for maximum likelihood trellis encoder estimation. Computer simulations are applied for evaluating the DSE rate, the Bit Error Rate (BER) and Throughput of the proposed scheme in comparison with a conventional scheme.

The purpose of a testability analysis program is to estimate the difficulty of testing a fault. A good measurement can give an early warning about the testing problem so as to provide guidance in improving the testability of a circuit. There have been researches attempting to efficiently compute the testability analysis. Among those, the Controllability and Observability Procedure COP can calculate the testability value of a stuck-at fault efficiently in a tree-structured circuit but may be very inaccurate for a general circuit. The inaccuracy in COP is due to the ignorance of signal correlations. Recently, the algorithm of TAIR in [5] proposes a testability analysis algorithm, which starts from the result of COP and then gradually improves the result by applying a set of rules. The set of rules in TAIR can capture some signal correlations and therefore the results of TAIR are more accurate than COP. In this paper, we first prove that the rules in TAIR can be replaced by a closed-form formulation. Then, based on the closed-form formulation, we proposed two novel techniques to further improve the testability analysis results. Our experimental results have shown improvement over the results of TAIR.

When we use an adaptive array antenna (AAA) with the minimum mean square error (MMSE) criterion under the multipath environment, where the receiving signal level varies, it is difficult for the AAA to converge because of the distortion of the desired wave. Then, we need the equalization both in space and time domains. A tapped-delay-line adaptive array antenna (TDL-AAA) and the AAA with linear equalizer (AAA-LE) have been proposed as simple space-temporal equalization. The AAA-LE has not utilized the recursive least square (RLS) algorithm. In this paper, we propose a space-temporal simultaneous processing equalizer (ST-SPE) that is an AAA-LE with the RLS algorithm. We proposed that the first tap weight of the LE should be fixed and the necessity of that is derived from a normal equation in the MMSE criterion. We achieved the space-temporal simultaneous equalization with the RLS algorithm by this configuration. The ST-SPE can reduce the computational complexity of the space-temporal joint equalization in comparison to the TDL-AAA, when the ST-SPE has almost the same performance as the TDL-AAA in multipath environment with minimum phase condition such as appeared at line-of-sight (LOS).

Near-fields of electromagnetic waves scattered by slightly rough metal surfaces which support the surface plasmon mode at optical frequencies were studied theoretically by using the stochastic functional approach. Fidelity of near-field intensity images, defined by the correlation coefficient between the surface profile and the intensity of the scattered wave field, was investigated in order to discuss field distributions of the surface plasmon on complicated structures. We show that the fidelity strongly depends on the incident wavenumber and polarization when the incident wave corresponds to the surface plasmon mode.

In this paper, a digital compensation scheme for coefficient errors of a complex filter bank parallel A/D converter in low-IF receivers is presented. The complex filter bank is employed to suppress DC offset and image signals in the low-IF receivers and relax the requirements on the conversion rate and resolution of A/D converters. The proposed compensation scheme regenerates interference due to coefficient errors and subtracts it from the digital signal converted by an A/D converter. The proposed scheme also improves the effective resolution of A/D converters.

Computing the Eigen Value Decomposition (EVD) of a symmetric matrix is a frequently encountered problem in adaptive (or smart or software) antenna signal processing, for example, super resolution DOA (Direction Of Arrival) estimation algorithms such as MUSIC (MUltiple SIgnal Classification) and ESPRIT (Estimation of Signal Parameters via Rotational Invariance Technique). In this paper the hardware architecture of the fast EVD processor of symmetric correlation matrices for the application of an adaptive antenna technology such as DOA estimation is proposed and the basic idea is also presented. Cyclic Jacobi method is well known for the simplest algorithm and easily implemented but its convergence time is slower than other factorization algorithm like QR-method. But if considering the fast parallel computation of the EVD with a hardware architecture like ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array), the Jacobi method can be a appropriate solution, since it offers a quite higher degree of parallelism and easier implementation than other factorization algorithms. This paper computes the EVD using a Jacobi-type method, where the vector rotations and the angles of the rotations are obtained by CORDIC (COordinate Rotation DIgital Computer). The hardware architecture suitable for ASIC or FPGA with fixed-point arithmetic is presented. Because it consists of only shift and add operations, this hardware friendly feature provides easy and efficient implementation. In this paper, the computational load, the estimate of circuit scale and expected performance are discussed and the validation of fixed-point arithmetic for the practical application to MUSIC DOA estimation is examined.

This paper investigates an accurate channel estimation method using the common pilot channel (CPICH) in addition to a dedicated pilot channel (PICH) when the fading correlation between the dedicated PICH and CPICH is high, and clarifies the area in which the proposed channel estimation method is effective for adaptive antenna array transmit diversity (AAA-TD) in the forward link. Computer simulation results elucidate that although a more precise channel estimation is possible by using the primary-CPICH (P-CPICH) transmitted from an omni-directional antenna in addition to the dedicated PICH for the area where the distance, d, between a base station and a mobile terminal is longer than approximately 200 m, no improvement is obtained for the area where the value of d is shorter than approximately 200 m. Meanwhile, by employing the secondary-CPICH (S-CPICH) transmitted with several directional beams in addition to the dedicated PICH, the required average received Eb/N0 at the average BER of 10-3 is decreased by approximately 0.4 (0.2-0.4) dB compared to the channel estimation method using only the dedicated PICH regardless of the value of d when the number of antennas is 4 (8).

The off-state shunt GaAs FET, which is the most important for low distortion operation of the high power RF switch IC, is a very complicated device to analyze the RF voltage. Because the conventional measurement method has an influence on the behavior of the switch, it has not provided the correct measurement value. In this paper, we have realized a measurement method without touching the surface of the switch IC using EO-probe. As a result we achieved extremely low second and third harmonics of 70.5 dBc and 75.2 dBc, respectively at the input power of 35 dBm by adoptin SPDT switch IC composed of the multi-gate FET for the thru FET and the stacked-gate FET.

This paper presents the theoretical analysis of subband adaptive array combining cyclic prefix transmission scheme (SBAA-CP) in multipath fading environment. The exact expressions for optimal weights, array outputs and the output signal to interference plus noise ratio (SINR) are derived. The analysis shows that use of the cyclic prefix data transmission scheme can significantly improve the performance of subband adaptive array (SBAA). An example of implementing SBAA-CP as a software antenna is also presented.

The modern network service of finding the optimal path subject to multiple constraints on performance metrics such as delay, jitter, loss probability, etc. gives rise to the multi-constrained optimal-path (MCOP) QoS routing problem, which is NP-complete. In this paper, this problem is solved through both exact and heuristic algorithms. We propose an exact algorithm E_MCOP, which first constructs an aggregate weight and then uses a K-shortest-path algorithm to find the optimal solution. By means of E_MCOP, the performance of the heuristic algorithm H_MCOP proposed by Korkmaz et al. in a recent work is evaluated. H_MCOP only runs Dijkstra's algorithm (with slight modifications) twice, but it can find feasible paths with a success ratio very close to that of the exact algorithm. However, we notice that in certain cases its feasible solution has an unsatisfactorily high average cost deviation from the corresponding optimal solution. For this reason, we propose some modified algorithms based on H_MCOP that can significantly improve the performance by running Dijkstra's algorithm a few more times. The performance of the exact algorithm and heuristics is investigated through computer simulations on networks of various sizes.

The network duplicating can achieve significant improvements of the Local Area Network (LAN)'s performance, availability, and security. For LAN duplicating, a Dual-Path Ethernet Module (DPEM) is developed. Since a DPEM is simply located at the front end of any network device as a transparent add-on type independent hardware machine, it does not require sophisticated server reconfiguration. We examine the desirable properties and the characteristics on the Dual-LAN structure. Our evaluation results show that the developed scheme is more efficient than the conventional Single-LAN structures in various aspects.