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  • An Implementation of Multiple-Standard Video Decoder on a Mixed-Grained Reconfigurable Computing Platform

    Leibo LIU  Dong WANG  Yingjie CHEN  Min ZHU  Shouyi YIN  Shaojun WEI  

     
    PAPER-Computer System

      Pubricized:
    2016/02/02
      Vol:
    E99-D No:5
      Page(s):
    1285-1295

    This paper presents the design of a multiple-standard 1080 high definition (HD) video decoder on a mixed-grained reconfigurable computing platform integrating coarse-grained reconfigurable processing units (RPUs) and FPGAs. The proposed RPU, including 16×16 multi-functional processing elements (PEs), is used to accelerate compute-intensive tasks in the video decoding. A soft-core-based microprocessor array is implemented on the FPGA and adopted to speed-up the dynamic reconfiguration of the RPU. Furthermore, a mail-box-based communication scheme is utilized to improve the communication efficiency between RPUs and FPGAs. By exploiting dynamic reconfiguration of the RPUs and static reconfiguration of the FPGAs, the proposed platform achieves scalable performances and cost trade-offs to support a variety of video coding standards, including MPEG-2, AVS, H.264, and HEVC. The measured results show that the proposed platform can support H.264 1080 HD video streams at up to 57 frames per second (fps) and HEVC 1080 HD video streams at up to 52fps under 250MHz, at the same time, it achieves a 3.6× performance gain over an industrial coarse-grained reconfigurable processor for H.264 decoding, and a 6.43× performance boosts over a general purpose processor based implementation for HEVC decoding.

  • HaWL: Hidden Cold Block-Aware Wear Leveling Using Bit-Set Threshold for NAND Flash Memory

    Seon Hwan KIM  Ju Hee CHOI  Jong Wook KWAK  

     
    LETTER-Computer System

      Pubricized:
    2016/01/13
      Vol:
    E99-D No:4
      Page(s):
    1242-1245

    In this letter, we propose a novel wear leveling technique we call Hidden cold block-aware Wear Leveling (HaWL) using a bit-set threshold. HaWL prolongs the lifetime of flash memory devices by using a bit array table in wear leveling. The bit array table saves the histories of block erasures for a period and distinguishes cold blocks from all blocks. In addition, HaWL can reduce the size of the bit array table by using a one-to-many mode, where one bit is related to many blocks. Moreover, to prevent degradation of wear leveling in the one-to-many mode, HaWL uses bit-set threshold (BST) and increases the accuracy of the cold block information. The performance results illustrate that HaWL prolongs the lifetime of flash memory by up to 48% compared with previous wear leveling techniques in our experiments.

  • The Existence of a Class of Mixed Orthogonal Arrays

    Shanqi PANG  Yajuan WANG  Guangzhou CHEN  Jiao DU  

     
    LETTER-Coding Theory

      Vol:
    E99-A No:4
      Page(s):
    863-868

    The orthogonal array is an important object in combinatorial design theory, and it is applied to many fields, such as computer science, coding theory and cryptography etc. This paper mainly studies the existence of the mixed orthogonal arrays of strength two with seven factors and presents some new constructions. Consequently, a few new mixed orthogonal arrays are obtained.

  • A Cell Searching Technique without Double Counting for a Mobile Station with Multiple Antenna Arrays in Millimeter Wave Cellular Communication Systems

    In Su KIM  Hae-In PARK  Won Young YANG  Yong Soo CHO  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E99-B No:3
      Page(s):
    739-748

    This paper deals with a beamforming and cell ID detection technique for a mobile station (MS) with multiple antenna arrays in millimeter wave (mm-wave) cellular communication systems. Multiple antenna arrays, required to cover the entire space around the MS, can be used to estimate the direction of arrivals (DoAs) and cell IDs, form beams in the direction of DoAs, select a serving cell in a cooperative manner, and improve BER performance by signal combining. However, a signal may enter the overlapped region formed by two adjacent arrays in the MS, resulting in a double-counting problem during the cell searching period. In this paper, a beamforming and cell detection technique without double-counting is proposed to handle this problem, and they are evaluated by simulation in a simple scenario of an mm-wave cellular system with spatial channel model (SCM).

  • Nonlinear-Error-Free Optical Quantization Using Dense Spectral Slicing

    Takahiro KODAMA  Ryosuke MATSUMOTO  Akihiro MARUTA  Tsuyoshi KONISHI  Ken-ichi KITAYAMA  

     
    PAPER-Fiber-Optic Transmission for Communications

      Vol:
    E99-B No:3
      Page(s):
    647-653

    We numerically and experimentally demonstrate for the first time a novel all-optical quantization technique using dense spectral slicing with a specially designed arrayed waveguide grating for orthogonal frequency division multiplexed signals. By using a mode-locked laser diode with low jitter, the quantization technique can be achieved a high-speed and low-jitter operation. Both numerical and experimental results confirm the feasibility of 10 GSample/s, completely linear 3-bit step quantization for photonic analog to digital conversion. This optical quantization technique will be beneficial for ultra-high-speed optical communication using digital signal processing.

  • Novel Reconfigurable Hardware Accelerator for Protein Sequence Alignment Using Smith-Waterman Algorithm

    Atef IBRAHIM  Hamed ELSIMARY  Abdullah ALJUMAH  

     
    PAPER-Digital Signal Processing

      Vol:
    E99-A No:3
      Page(s):
    683-690

    This paper presents novel reconfigurable semi-systolic array architecture for the Smith-Waterman with an affine gap penalty algorithm to align protein sequences optimized for shorter database sequences. This architecture has been modified to enable hardware reuse rather than replicating processing elements of the semi-systolic array in multiple FPGAs. The proposed hardware architecture and the previously published conventional one are described at the Register Transfer Level (RTL) using VHDL language and implemented using the FPGA technology. The results show that the proposed design has significant higher normalized speedup (up to 125%) over the conventional one for query sequence lengths less than 512 residues. According to the UniProtKB/TrEMBL protein database (release 2015_05) statistics, the largest number of sequences (about 80%) have sequence length less than 512 residues that makes the proposed design outperforms the conventional one in terms of speed and area in this sequence lengths range.

  • Integrated Photonic Devices and Applications for 100GbE-and-Beyond Datacom Open Access

    Yoshiyuki DOI  Takaharu OHYAMA  Toshihide YOSHIMATSU  Tetsuichiro OHNO  Yasuhiko NAKANISHI  Shunichi SOMA  Hiroshi YAMAZAKI  Manabu OGUMA  Toshikazu HASHIMOTO  Hiroaki SANJOH  

     
    INVITED PAPER

      Vol:
    E99-C No:2
      Page(s):
    157-164

    We review recent progress in integrated photonics devices and their applications for datacom. In addition to current technology used in 100-Gigabit Ethernet (100GbE) with a compact form-factor of the transceiver, the next generation of technology for 400GbE seeks a larger number of wavelengths with a more sophisticated modulation format and higher bit rate per wavelength. For wavelength scalability and functionality, planar lightwave circuits (PLCs), such as arrayed waveguide gratings (AWGs), will be important, as well higher-order-modulation to ramp up the total bit rate per wavelength. We introduce integration technology for a 100GbE optical sub-assembly that has a 4λ x 25-Gb/s non-return-to-zero (NRZ) modulation format. For beyond 100GbE, we also discuss applications of 100GbE sub-assemblies that provide 400-Gb/s throughput with 16λ x 25-Gb/s NRZ and bidirectional 8λ x 50-Gb/s four-level pulse amplitude modulation (PAM4) using PLC cyclic AWGs.

  • 0.5-V Sub-ns Open-BL SRAM Array with Mid-Point-Sensing Multi-Power-Supply 5T Cell

    Khaja Ahmad SHAIK  Kiyoo ITOH  Amara AMARA  

     
    INVITED PAPER

      Vol:
    E99-A No:2
      Page(s):
    523-530

    To achieve low-voltage low-power SRAMs, two proposals are demonstrated. One is a multi-power-supply five-transistor cell (5T cell), assisted by a boosted word-line voltage and a mid-point sensing enabled by precharging bit-lines to VDD/2. The cell enables to reduce VDD to 0.5V or less for a given speed, or enhance speed for a given VDD. The other is a partial activation of a compact multi-divided open-bit-line array for low power. Layout and post-layout simulation with a 28-nm fully-depleted planar-logic SOI MOSFET reveal that a 0.5-V 5T-cell 4-kb array in a 128-kb SRAM core using the proposals is able to achieve x2-3 faster cycle time and x11 lower power than the counterpart 6T-cell array, suggesting a possibility of a 730-ps cycle time at 0.5V.

  • Improving Performance by Countering Human Body Shadowing in 60GHz Band Wireless Systems by Using Two Transmit and Two Receive Antennas

    Tomoaki NAGAYAMA  Shigeki TAKEDA  Masahiro UMEHIRA  Kenichi KAGOSHIMA  Teruyuki MIYAJIMA  

     
    PAPER-Antennas and Propagation

      Vol:
    E99-B No:2
      Page(s):
    422-429

    This paper proposes the use of two transmit and two receive antennas spaced at roughly the width of a human body to improve communication quality in the presence of shadowing by a human body in the 60GHz band. In the proposed method, the transmit power is divided between the two transmit antennas, and the receive antenna that provides the maximum receive level is then chosen. Although the receive level is reduced by 3dB, the maximum attenuation caused by human body shadowing is totally suppressed. The relationship between the antenna element spacing and the theoretical spacing based on the 1st. Fresnel zone theory is clarified. Experiments confirm that antenna spacing several centimeters wider than that given by the 1st. Fresnel zone theory is enough to attain a significant performance improvement.

  • Three-Dimensional Over-The-Air Assessment for Vertically Arranged MIMO Array Antennas

    Kun LI  Kazuhiro HONDA  Koichi OGAWA  

     
    PAPER-Antennas and Propagation

      Vol:
    E99-B No:1
      Page(s):
    167-176

    This paper presents a new methodology of the over-the-air (OTA) assessment for vertically arranged multiple-input multiple-output (MIMO) array antennas. Particular emphasis is placed on how well handset MIMO antennas with a vertically arranged structure are characterized using the limited number of scatterers implemented in a fading emulator. First we studied the mechanism of the arrangement of scatterers on the variation of channel responses using a proposed three-dimensional analytical model. It is shown that the condition of a 3D-OTA with the prescribed parameters allows the correlation to be reduced, which permits the channel capacity to increase in the same manner that sufficient scatterers are distributed over the entire solid angle. Then the appropriate scatterers arrangement for a 3D-OTA instrument considering the number of DUT antenna elements and multipath characteristics is investigated. The analytical results show that a suitable scatterers arrangement can be determined for various conditions of multipath environments and numbers of array elements, and that the arrangement can be employed for designing an actual 3D-OTA apparatus.

  • Real-Time Implementation of Lyapunov Stability Theory-Based Adaptive Filter on FPGA

    Engin Cemal MENGÜÇ  Nurettin ACIR  

     
    PAPER-Storage Technology

      Vol:
    E99-C No:1
      Page(s):
    129-137

    The Lyapunov stability theory-based adaptive filter (LST-AF) is a robust filtering algorithm which the tracking error quickly converges to zero asymptotically. Recently, the software module of the LST-AF algorithm is effectively used in engineering applications such as tracking, prediction, noise cancellation and system identification problems. Therefore, hardware implementation becomes necessary in many cases where real time procedure is needed. In this paper, an implementation of the LST-AF algorithm on Field Programmable Gate Arrays (FPGA) is realized for the first time to our knowledge. The proposed hardware implementation on FPGA is performed for two main benchmark problems; i) tracking of an artificial signal and a Henon chaotic signal, ii) estimation of filter parameters using a system identification model. Experimental results are comparatively presented to test accuracy, performance and logic occupation. The results show that our proposed hardware implementation not only conserves the capabilities of software versions of the LST-AF algorithm but also achieves a better performance than them.

  • A 12×16-Element Double-Layer Corporate-Feed Waveguide Slot Array Antenna

    Satoshi ITO  Miao ZHANG  Jiro HIROKAWA  Makoto ANDO  

     
    PAPER-Antennas and Propagation

      Vol:
    E99-B No:1
      Page(s):
    40-47

    A 12×16-element corporate-feed slot array is presented. The corporate-feed circuit for the 12×16-elemtent array consists of cross-junctions and asymmetric T-junctions, whereas the conventional one is limited to arrays of 2m×2n slots by its use of symmetric T-junctions. Simulations of the 12×16-element array show a 7.6% bandwidth for reflection less than -14dB. A 31.7-dBi gain with an antenna efficiency of 82.6% is obtained at the design frequency of 61.5GHz. The 12×16-element array is fabricated by diffusion bonding of laminated thin metal plates. Measurements indicate 31.1-dBi gain with 71.9% antenna efficiency at 61.5GHz.

  • Power Combination in 1 THz Resonant-Tunneling-Diode Oscillators Integrated with Patch Antennas

    Kouhei KASAGI  Naoto OSHIMA  Safumi SUZUKI  Masahiro ASADA  

     
    BRIEF PAPER

      Vol:
    E98-C No:12
      Page(s):
    1131-1133

    In this study, we propose and fabricate an oscillator array composed of three resonant-tunneling-diode terahertz oscillators integrated with slot-coupled patch antennas, and which does not require a Si lens. We measure the radiation pattern for single and arrayed oscillator, and calculate the output power using the integration of the pattern. The output power of a single oscillator was found to be ~15 µW. However, using an array configuration, almost combined output power of ~55 µW was obtained.

  • Estimating Living-Body Location Using Bistatic MIMO Radar in Multi-Path Environment

    Keita KONNO  Naoki HONMA  Dai SASAKAWA  Kentaro NISHIMORI  Nobuyasu TAKEMURA  Tsutomu MITSUI  Yoshitaka TSUNEKAWA  

     
    PAPER-Antennas and Propagation

      Vol:
    E98-B No:11
      Page(s):
    2314-2321

    This paper proposes a method that uses bistatic Multiple-Input Multiple-Output (MIMO) radar to locate living-bodies. In this method, directions of living-bodies are estimated by the MUltiple SIgnal Classification (MUSIC) method at the transmitter and receiver, where the Fourier transformed virtual Single-Input Multiple-Output (SIMO) channel matrix is used. Body location is taken as the intersection of the two directions. The proposal uses a single frequency and so has a great advantage over conventional methods that need a wide frequency band. Also, this method can be used in multipath-rich environments such as indoors. An experiment is performed in an indoor environment, and the MIMO channels yielded by various subject numbers and positions are measured. The result indicates that the proposed method can estimate multiple living-body locations with high accuracy, even in multipath environments.

  • Pattern Transformation Method for Digital Camera with Bayer-Like White-RGB Color Filter Array

    Jongjoo PARK  Jongwha CHONG  

     
    LETTER-Image Processing and Video Processing

      Pubricized:
    2015/08/11
      Vol:
    E98-D No:11
      Page(s):
    2021-2025

    A Bayer-like White-RGB (W-RGB) color filter array (CFA) was invented for overcoming the weaknesses of commonly used RGB based Bayer CFA. In order to reproduce full-color images from the Bayer-like W-RGB CFA, a demosaicing or a CFA interpolation process which estimates missing color channels of raw mosaiced images from CFA is an essential process for single sensor digital cameras having CFA. In the case of Bayer CFA, numerous demosaicing methods which have remarkable performance were already proposed. In order to take advantage of both remarkable performance of demosaicing method for Bayer CFA and the characteristic of high-sensitive Bayer-like W-RGB CFA, a new method of transforming Bayer-like W-RGB to Bayer pattern is required. Therefore, in this letter, we present a new method of transforming Bayer-like W-RGB pattern to Bayer pattern. The proposed method mainly uses the color difference assumption between different channels which can be applied to practical consumer digital cameras.

  • Multi-Phase Convex Lens Array for Directional Backlights to Improve Luminance Distribution of Autostereoscopic Display Open Access

    Shuta ISHIZUKA  Takuya MUKAI  Hideki KAKEYA  

     
    INVITED PAPER

      Vol:
    E98-C No:11
      Page(s):
    1023-1027

    We realize homogenous luminance of the directional backlight for the time-division multiplexing autostereoscopic display using a convex lens array with the elemental lenses whose phase of placement in each row differs from one another. The validity of the proposed optical design is confirmed by a prototype system.

  • Low Complexity Millimeter-Wave LOS-MIMO Systems with Uniform Circular Arrays for Small Cells Wireless Backhaul

    Liang ZHOU  Yoji OHASHI  Makoto YOSHIDA  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E98-B No:11
      Page(s):
    2348-2358

    The dramatic growth in wireless data traffic has triggered the investigation of fifth generation (5G) wireless communication systems. Small cells will play a very important role in 5G to meet the 5G requirements in spectral efficiency, energy savings, etc. In this paper, we investigate low complexity millimeter-wave communication systems with uniform circular arrays (UCAs) in line-of-sight (LOS) multiple-input multiple-output (MIMO) channels, which are used in fixed wireless access such as small cell wireless backhaul for 5G. First, we demonstrate that the MIMO channel matrices for UCAs in LOS-MIMO channels are circulant matrices. Next, we provide a detailed derivation of the unified optimal antenna placement which makes MIMO channel matrices orthogonal for 3×3 and 4×4 UCAs in LOS channels. We also derive simple analytical expressions of eigenvalues and capacity as a function of array design (link range and array diameters) for the concerned systems. Finally, based on the properties of circulant matrices, we propose a high performance low complexity LOS-MIMO precoding system that combines forward error correction (FEC) codes and spatial interleaver with the fixed IDFT precoding matrix. The proposed precoding system for UCAs does not require the channel knowledge for estimating the precoding matrix at the transmitter under the LOS condition, since the channel matrices are circulant ones for UCAs. Simulation results show that the proposed low complexity system is robust to various link ranges and can attain excellent performance in strong LOS environments and channel estimation errors.

  • Direction-of-Arrival Estimation Using an Array Covariance Vector and a Reweighted l1 Norm

    Xiao Yu LUO  Xiao chao FEI  Lu GAN  Ping WEI  Hong Shu LIAO  

     
    LETTER-Digital Signal Processing

      Vol:
    E98-A No:9
      Page(s):
    1964-1967

    We propose a novel sparse representation-based direction-of-arrival (DOA) estimation method. In contrast to those that approximate l0-norm minimization by l1-norm minimization, our method designs a reweighted l1 norm to substitute the l0 norm. The capability of the reweighted l1 norm to bridge the gap between the l0- and l1-norm minimization is then justified. In addition, an array covariance vector without redundancy is utilized to extend the aperture. It is proved that the degree of freedom is increased as such. The simulation results show that the proposed method performs much better than l1-type methods when the signal-to-noise ratio (SNR) is low and when the number of snapshots is small.

  • Interference Reduction Characteristics by Circular Array Based Massive MIMO in a Real Microcell Environment

    Ryochi KATAOKA  Kentaro NISHIMORI  Ngochao TRAN  Tetsuro IMAI  Hideo MAKINO  

     
    PAPER

      Vol:
    E98-B No:8
      Page(s):
    1447-1455

    The concept of massive multiple input multiple output (MIMO) has recently been proposed. It has been reported that using linear or planar arrays to implement massive MIMO yields narrow beams that can mitigate the interference signal even if interference cancellation techniques such as zero forcing (ZF) are not employed. In this work, we investigate the interference reduction performance achieved by circular array implemented massive MIMO in a real micro cell environment. The channel state information (CSI) is obtained by using a wideband channel sounder with cylindrical 96-element array in the 2-GHz band in an urban area. Circular arrays have much larger beamwidth and sidelobe level than linear arrays. In this paper, when considering the cylindrical array, the interference reduction performance between ZF and maximum ratio combining is compared when one desired user exists in the micro cell while the interference user moves around the adjacent cell. We show that ZF is essential for reducing the interference from the adjacent cell in the circular array based massive MIMO. The required number of antennas in the vertical and horizontal planes for the interference reduction is evaluated, in order to simplify the burden of signal processing for the ZF algorithm in massive MIMO. Because there are elements with low signal to noise power ratio (SNR) when considering cylindrical 96-element array, it is shown that the degradation of the signal to noise plus interference power ratio (SINR) when the number of antennas is reduced is smaller than that by ideal antenna gain reduction with a linear array. Moreover, we show that the appropriate antennas should be selected when a limited number of antennas is assumed, because the dominant waves arrive from certain specific directions.

  • TherWare: Thermal-Aware Placement and Routing Framework for 3D FPGAs with Location-Based Heat Balance

    Ya-Shih HUANG  Han-Yuan CHANG  Juinn-Dar HUANG  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E98-A No:8
      Page(s):
    1796-1805

    The emerging three-dimensional (3D) technology is considered as a promising solution for achieving better performance and easier heterogeneous integration. However, the thermal issue becomes exacerbated primarily due to larger power density and longer heat dissipation paths. The thermal issue would also be critical once FPGAs step into the 3D arena. In this article, we first construct a fine-grained thermal resistive model for 3D FPGAs. We show that merely reducing the total power consumption and/or minimizing the power density in vertical direction is not enough for a thermal-aware 3D FPGA backend (placement and routing) flow. Then, we propose our thermal-aware backend flow named TherWare considering location-based heat balance. In the placement stage, TherWare not only considers power distribution of logic tiles in both lateral and vertical directions but also minimizes the interconnect power. In the routing stage, TherWare concentrates on overall power minimization and evenness of power distribution at the same time. Experimental results show that TherWare can significantly reduce the maximum temperature, the maximum temperature gradient, and the temperature deviation only at the cost of a minor increase in delay and runtime as compared with present arts.

181-200hit(959hit)