In this paper, we present the roles played by millimeter-waves in the realization of an Internet of Things (IoT) society. Millimeter-waves are becoming essential frequency resources, enabling ultra-high-speed wireless networks supporting massive data traffic and high-resolution sensor devices. Multiple antenna technologies such as phased arrays, sector antennas, and MIMO signal processing are key technologies for putting these into practical use. In this paper, various examples of integration of multi-antenna systems are shown, as well as demonstration on 60GHz-band millimeter-wave wireless access and 79GHz-band high-resolution radar. We also propose applications to ITS for an IoT society, combining millimeter-wave wireless access and radar sensors, and discuss technical issues to be solved in the future.

In order to meet various requirements for the 5th generation mobile communication, a high SHF wideband massive-MIMO system has been widely studied which offers wide system bandwidth and high spectral efficiency. A hybrid beamforming configuration which combines analog beamforming by APAA (Active Phased Array Antenna) and digital MIMO signal processing is one of the promising approaches for reducing the complexity and power consumption of the high SHF wideband massive-MIMO system. In order to realize the hybrid beamforming configuration in high SHF band, small size, low power consumption and precise beam forming over the wide-band frequency range are strongly required for RF frontend which constitutes analog beam former. In this paper, a compact RF frontend module for high SHF wideband 5G small cell base station is proposed. This RF frontend module is prototyped. Various key components of the RF frontend module are fabricated in 15GHz band, and measured results show that high RF performances are able to meet the requirements of RF frontend.

We developed a 5.8 GHz power-variable phase-controlled magnetron (PVPCM) which controls the phase of magnetron output by a phase shifter and controls the power by the anode current of the magnetron. This method is different from the previous 2.45 GHz phase-controlled magnetron which utilizes an injection method and a phase locked loop by the anode current, since the frequency of 5.8 GHz magnetron hardly changes with the anode current. Our experiments show that the developed 5.8 GHz PVPCM had a variable output power with 1% power stability from 160 W to 329 W, the phase accuracy was nearly ±1°, and the response time was less than 100 µs. Stable output power, high phase-controlled accuracy, and fast response speed microwave sources based on the PVPCMs are suitable for phased array system for wireless power transfer.

We proposed a new architecture of antenna, transmitter and receiver feeding configuration for small synthetic aperture radar (SAR) that is compatible with 100kg class satellite. Promising applications are constellations of earth observations together with optical sensors, and responsive, disaster monitoring missions. The SAR antenna is a deployable, passive, honeycomb panel antenna with slot array that can be stowed compactly. RF (radio frequency) instruments are in a satellite body and RF signal is fed to a deployable antenna through non-contacting choke flanges at deployable hinges. This paper describes its development strategy and the present development status of the small spaceborne SAR based on this architecture.

Array antenna technology for wireless systems is highly integrated for demands such as multi-functionality and high-performance. This paper details recent technologies in Japan in design techniques based on computational electromagnetics, antenna hardware techniques in the millimeter-wave band, array signal processing to add adaptive functions, and measurement methods to support design techniques, for array antennas for future wireless systems. Prospects of these four technologies are also described.

An energy-efficient nonvolatile FPGA with assuring highly-reliable backup operation using a self-terminated power-gating scheme is proposed. Since the write current is automatically cut off just after the temporal data in the flip-flop is successfully backed up in the nonvolatile device, the amount of write energy can be minimized with no write failure. Moreover, when the backup operation in a particular cluster is completed, power supply of the cluster is immediately turned off, which minimizes standby energy due to leakage current. In fact, the total amount of energy consumption during the backup operation is reduced by 66% in comparison with that of a conventional worst-case-based approach where the long time write current pulse is used for the reliable write.

Massive multiple input multiple output (MIMO) communication system offers high rate transmission and/or support of a large number of users by invoking the power of a large array antenna, but one of its problem is the heavy computational burden required for the design and signal processing. Assuming the utilization of a large array in the transmitter side and much fewer users than the maximum possible value, this paper first presents a subarray based design approach of MIMO system with a low computational load taking into account efficient subarray grouping for the realization of higher performance; a large transmit array is first divided into subarrays based on channel gain or channel correlation, then block diagonalization is applied to each of them, and finally a large array weight is reconstructed by maximal ratio combining (MRC). In addition, the extension of the proposed method to two-stage design is studied in order to support a larger number of users; in the process of reconstruction to a large array, subarrays are again divided into groups, and block diagonalization is applied to those subarray groups. Through computer simulations, it is shown that the both channel gain and correlation based grouping strategies are effective under certain conditions, and that the number of supported users can be increased by two-stage design if certain level of performance degradation is acceptable.

This paper proposes 0-1-A-Ā LUT, a new programmable logic using atom switches, and a delay-optimal mapping algorithm for it. Atom switch is a non-volatile memory device of very small geometry which is fabricated between metal layers of a VLSI, and it can be used as a switch device of very small on-resistance and parasitic capacitance. While considerable area reduction of Look Up Tables (LUTs) used in conventional Field Programmable Gate Arrays (FPGAs) has been achieved by simply replacing each SRAM element with a memory element using a pair of atom switches, our 0-1-A-Ā LUT achieves further area and delay reduction. Unlike the conventional atom-switch-based LUT in which all k input signals are fed to a MUX, one of input signals is fed to the switch array, resulting area reduction due to the reduced number of inputs of the MUX from 2k to 2k-1, as well as delay reduction due to reduced fanout load of the input buffers. Since the fanout of this input buffers depends on the mapped logic function, this paper also proposes technology mapping algorithms to select logic function of fewer number of fanouts of input buffers to achieve further delay reduction. From our experiments, the circuit delay using our k-LUT is 0.94% smaller in the best case compared with using the conventional atom-switch-based k-LUT.

Approximate computing is considered as a promising approach to design of power- or area-efficient digital circuits. This paper proposes a systematic methodology for design and worst-case accuracy analysis of approximate array multipliers. Our methodology systematically designs a series of approximate array multipliers with different area, delay, power and accuracy characteristics so that an LSI designer can select the one which best fits to the requirements of her/his applications. Our experiments explore the trade-offs among area, delay, power and accuracy of the approximate multipliers.

This paper explores the potential of orbital angular momentum (OAM) multiplexing as a means to enable high-speed wireless transmission. OAM is a physical property of electro-magnetic waves that are characterized by a helical phase front in the propagation direction. Since the characteristic can be used to create multiple orthogonal channels, wireless transmission using OAM can enhance the wireless transmission rate. Comparisons with other wireless transmission technologies clarify that OAM multiplexing is particularly promising for point-to-point wireless transmission. We also clarify three major issues in OAM multiplexing: beam divergence, mode-dependent performance degradation, and reception (Rx) signal-to-noise-ratio (SNR) reduction. To mitigate mode-dependent performance degradation we first present a simple but practical Rx antenna design method. Exploiting the fact that there are specific location sets with phase differences of 90 or 180 degrees, the method allows each OAM mode to be received at its high SNR region. We also introduce two methods to address the Rx SNR reduction issue by exploiting the property of a Gaussian beam generated by multiple uniform circular arrays and by using a dielectric lens antenna. We confirm the feasibility of OAM multiplexing in a proof of concept experiment at 5.2 GHz. The effectiveness of the proposed Rx antenna design method is validated by computer simulations that use experimentally measured values. The two new Rx SNR enhancement methods are validated by computer simulations using wireless transmission at 60 GHz.

CMOS amperometric sensors with a microelectrode array offer great potential for counting bacteria because of their low cost, compact size, and ease of use. This paper presents a current-integration-based CMOS amperometric sensor for high-sensitivity bacteria counting. It has a current integrator for noise reduction and reportedly the most large-scale microelectrode array (1024 × 1024). This proposed sensor can count the number of bacteria ranging from a single cell to approximately a million cells. A prototype chip was fabricated using two-poly three-metal (2P3M) 0.6-µm standard CMOS technology. A 7.6 × 7.1-mm2 chip operates from a 5V supply at 1.9mA. In addition, by using the prototype chip, we performed electrochemical measurement and partial 2D imaging of silicone through constant potential amperometry. The measurement results indicate that the proposed sensor chip was able to accurately readout redox current from the 1024 × 1024 sensor array.

We propose a microphone array speech enhancement method that integrates spatial-cue-based source power spectral density (PSD) estimation and statistical speech model-based PSD estimation. The goal of this research was to clearly pick up target speech even in noisy environments such as crowded places, factories, and cars running at high speed. Beamforming with post-Wiener filtering is commonly used in many conventional studies on microphone-array noise reduction. For calculating a Wiener filter, speech/noise PSDs are essential, and they are estimated using spatial cues obtained from microphone observations. Assuming that the sound sources are sparse in the temporal-spatial domain, speech/noise PSDs may be estimated accurately. However, PSD estimation errors increase under circumstances beyond this assumption. In this study, we integrated speech models and PSD-estimation-in-beamspace method to correct speech/noise PSD estimation errors. The roughly estimated noise PSD was obtained frame-by-frame by analyzing spatial cues from array observations. By combining noise PSD with the statistical model of clean-speech, the relationships between the PSD of the observed signal and that of the target speech, hereafter called the observation model, could be described without pre-training. By exploiting Bayes' theorem, a Wiener filter is statistically generated from observation models. Experiments conducted to evaluate the proposed method showed that the signal-to-noise ratio and naturalness of the output speech signal were significantly better than that with conventional methods.

The purpose of DNA sequencing is to determine the order of nucleotides within a DNA molecule of target. The target DNA molecules are fragmented into short reads, which are short fixed-length subsequences composed of ‘A’, ‘C’, ‘G’ ‘T’, by next generation sequencing (NGS) machine. To reconstruct the target DNA from the short reads using a reference genome, which is a representative example of a species that was constructed in advance, it is necessary to determine their locations in the target DNA from where they have been extracted by aligning them onto the reference genome. This process is called short read mapping, and it is important to improve the performance of the short read mapping to realize fast DNA sequencing. We propose three types of FPGA acceleration methods based on hash table; (1) sorting and parallel comparison, (2) matching that allows one mutation to reduce the number of the candidates, (3) optimized hash function using variable masks. The first one reduces the number of accesses to off-chip memory to avoid the bottleneck by access latency. The second one enables to reduce the number of the candidates without degrading mapping sensitivity by allowing one mutation in the comparison. The last one reduces hash collisions using a table that was calculated from the reference genome in advance. We implemented the three methods on Xilinx Virtex-7 and evaluated them to show their effectiveness of them. In our experiments, our system achieves 20 fold of processing speed compared with BWA, which is one of the most popular mapping tools. Furthermore, we shows that the our system outperforms one of the fastest FPGA short read mapping systems.

In this letter, we propose a round robin-based wear leveling (RRWL) for flash memory systems. RRWL uses a block erase table (BET), which is composed of a bit array and saves the erasure histories of blocks. BET can use one-to-one mode to increase the performance of wear leveling or one-to-many mode to reduce memory consumption. However, one-to-many mode decreases the accuracy of cold block information, which results in the lifetime degradation of flash memory. To solve this problem, RRWL consistently uses one-to-one mode based on round robin method to increase the accuracy of cold block identification, with reduced memory size of BET, like in one-to-many mode. Experiments show that RRWL increases the lifetime of flash memory by up to 47% and 14%, compared with BET and HaWL, respectively.

In this paper, the virtual antenna technique is applied to a single input multiple output (SIMO) radar system to enhance the performance of the conventional beamforming direction of arrival (DOA) estimation method. Combining the virtual array generated by the interpolated array technique and the real array, the angular resolution of the DOA estimation algorithm is improved owing to the extended number of antennas and aperture size. Based on the proposed interpolation technique, we transform the position of the antenna elements in a uniform linear array (ULA) to the arbitrary positions to suppress the grating lobe and side lobe levels. In simulations, the pseudo spectrum of the Bartlett algorithm and the root mean square error (RMSE) of the DOA estimation with the signal-to-noise ratio (SNR) are analyzed for the real array and the proposed virtually extended array. Simulation results show that the angular resolution of the proposed array is better than that of the real array using the same aperture size of array and the number of antennas. The proposed technique is verified with the practical data from commercialized radar system.

This paper presents the design and characterization of an E-band 16×16-slot monopulse array antenna with full-corporate-feed fabricated by the commercially available batch process of diffusion bonding of laminated copper plates. The antenna is multi-layered, and consists of vertically-interconnected radiating elements, a corporate-feed circuit and a comparator. It has four input ports for different excitations. Sum and difference beams in different cut-planes for monopulse operation can be generated. The antenna has a quasi-planar profile, and a total size of 13.31 λ0×13.31λ0×1.52λ0 (λ0 is the wavelength at the design frequency of 78.5GHz). The antenna demonstrates a wide operation bandwidth of 17.2 (70-87.2) GHz for VSWR < 2. At 78.5GHz: 1) for the sum beam, there is a 32.6-dBi realized gain (83% antenna efficiency) and a 33.3-dBi directivity (95% aperture efficiency); 2) for the difference beams in the E-, H-, 45°-, and 135°-planes, the null depths are -53.0, -58.0, -57.8, and -65.6dB, respectively. Across the full operation band where the sum main-beam and difference null are able to consistently point at the boresight, the antenna also demonstrates excellent performance in terms of high gain, high efficiency, high isolation, low cross-polarization, and distinguished monopulse capability.

Nowadays, with the extensive use of smart devices, the amount of mobile data is experiencing an exponential growth. As a result, accommodating the large amount of traffic is important for the future 5G mobile communication. Millimeter-wave band, which has a lot of spectrum resources to meet the demand brought by the growth of mobile data, is becoming an important part of 5G technology. In order to mitigate the high path loss brought by the high frequency band, beamforming is often used to enhance the gain of a link. In this paper, we propose an iteration-based beamforming method for planar phased array. When compared to a linear array, a planar phased array points a smaller area which ensures a better link performance. We deduce that different paths of millimeter-wave channel are approximately orthogonal when the antenna array is large, which forms the basis of our iterative approach. We also discuss the development of the important millimeter-wave device-phase shifter, and its effect on the performance of the proposed beamforming method. From the simulation, we prove that our method has a performance close to the singular vector decomposition (SVD) method and is superior to the method in IEEE802.15.3c. Moreover, the channel capacity of the proposed method is at most 0.41bps/Hz less than the SVD method. We also show that the convergence of the proposed method could be achieved within 4 iterations and a 3-bit phase shifter is enough for practical implementation.

This paper introduces and uses spider monkey optimization (SMO) for synthesis sparse linear arrays, which are composed of a uniformly spaced core subarray and an extended sparse subarray. The amplitudes of all the elements and the locations of elements in the extended sparse subarray are optimized by the SMO algorithm to reduce the side lobe levels of the whole array, under a set of practical constraints. To show the efficiency of SMO, different examples are presented and solved. Simulation results of the sparse arrays designed by SMO are compared with published results to verify the effectiveness of the SMO method.

We consider the problem of two-dimensional (2-D) angles of arrival estimation using a newly proposed structure of nonuniform linear array, referred to as nested coprime array with compressed inter-element spacing (CACIS). By constructing a cross-correlation matrix of the received signals, the nested CACIS exhibits a larger number of degrees of freedom. A two-step weighted l1-norm penalty strategy is proposed to fully utilize these degrees of freedom, where the weight matrices are constructed by MUSIC spectrum function and the threshold function, respectively. The proposed method has several salient advantages over the compared method, including increased resolution and accuracy, estimating many more number of sources and suppressing spurious peaks efficiently. Simulation results validate the superiority of the proposed method.

A comprehensive model is presented for estimating the bit error rate (BER) of write disturbance in a resistive memory composed of a cross-point array. While writing a datum into the selected address, the non-selected addresses are biased by word-line (WL) and bit-line (BL). The stored datum in the non-selected addresses will be disturbed if the bias is large enough. It is necessary for the current flowing through the non-selected address to be calculated in order to estimate the BER of the write disturbance. Since it takes a long time to calculate the current flowing in a large-scale cross-point array, several simplified circuits have been utilized to decrease the calculating time. However, these simplified circuits are available to the selected address, not to the non-selected one. In this paper, new simplified circuits are proposed for calculating the current flowing through the non-selected address. The proposed and the conventional simplified circuits are used, and on that basis the trade-off between the write disturbance and the write error is discussed. Furthermore, the error correcting code (ECC) is introduced to improve the trade-off and to provide the low-cost memory chip matching current production lines.