WDM transmission experiments over cascaded sections of optical links including wavelength converting 2R-transponders have been carried out in a loop testbed. Using dispersion compensated links and simple direct modulated transponder lasers, up to 11 cascaded crossconnects and 1750 km trunk lines have been bridged with 2.5 Gbit/s NRZ signals. The limitations are given mainly due to the accumulated jitter as it is shown by numerical simulations. The results indicate, that 2R-transponders are a useful approach to a flexible WDM network design using bitrate-transparent wavelength conversion.

We have developed an InP-based monolithic optical frequency discriminator consisting of a temperature-insensitive optical filter and dual photodiodes. This integrated device detects the optical frequency deviation of the input light as differential photocurrent from the dual photodiodes, and the photocurrent is fedback to the light source for frequency stabilization through a differential amplifier. The FSR and extinction ratio of the filter are 50 GHz and 20 dB. The total opto-electronic conversion efficiency is 40%. In a frequency stabilization experiment using the developed discriminator, the frequency fluctuation of a DFB laser was reduced to less than 10 MHz.

We have developed a new type of phase interpolation direct digital synthesizer (DDS) with a symmetrically structured delay generator. The new DDS is similar to a sine output DDS in that it produces lower spurious signals, but it does not require a sine look-up table. The symmetrically structured delay generator reduces the periodic jitter in the most significant bit (MSB) of the DDS accumulator. The symmetrical structure enables the delay generator to produce highly accurate delay timing and eliminates the need to adjust the circuit constants. Experimental results confirm frequency synthesizer operation in which the spurious signal level is reduced to less than that of the accumulator.

49-GHz operation for a state-of-the-art static frequency divider using FETs is achieved with high-performance 0.1-µm-gate InAlAs/InGaAs/InP HEMTs and high-speed double-layer interconnections with a thick low-permittivity BCB inter-layer dielectric film. An experiment shows that the propagation delay for the upper-layer line in the double-layer interconnections is less than half of that for the conventional single-layer interconnections directly on InP-substrate. The frequency divider with the double-layer interconnections is about 20% faster than the conventional one with the single-layer interconnections. A delay time analysis reveals that this speed increase is due to the decrease in interconnection propagation delay.

A very low spurious frequency doubler for wireless communication systems is proposed. The key to this technique is to change the input signal into a rectangular wave, which effectively suppresses the fundamental frequency and the odd harmonic components. The desired to undesired signal ratio (D/U) is better than 50 dBc at the desired output frequency of 1.1 GHz. The proposed doubler eliminates the need for the band-pass filters which occupy a large part of the radio frequency (RF) module. High order multipliers easily are fabricated with this method. In this paper, a quadrupler is also described.

A novel dual-band internal antenna similar in size to the single-band internal antenna for cellular handsets is proposed. Our approach to realize a small and low-profile dual-band internal antenna is to use the dominant mode (TM10 mode) and the higher-order mode (TM30 mode). In order to use this approach for recent dual-band cellular systems it is necessary to lower the resonant frequency of the higher-order mode (TM30 mode). This motivated our development of a new antenna configuration with a slot on the radiation element of a quarter-wavelength shorted microstrip antenna to lower the resonant frequency of the TM30 mode. In this paper, the experimental and the analytical results for this antenna are presented. In the results, by adjusting the location and the length of the slot, the dual-frequency operation can be achieved with the frequency ratio (TM30 mode/TM10 mode) from 2 to 3. In addition, the enhancement of bandwidth is presented.

This paper describes an MOS current-mode, voltage-controlled oscillator (VCO) circuit that potentially operates with a 2 V supply voltage, 500 MHz oscillation frequency, and -90 dBc/Hz phase noise at the 1 MHz offset. It also has an improved oscillation frequency linearity of the control voltage and 11 mW power dissipation. The oscillation frequency reached 920 MHz when the supply voltage was increased to 3 V.

We are concerned with a CDMA cellular system with unbalanced traffic environment such that a cell with high traffic should be assigned a frequency additional to the common one shared with its neighboring cells. To remove quality-dropping inter-cell hard handoffs, the cell with high traffic was first partitioned into three regions. Then, the common frequency is assigned in the outermost region, and the additional frequency is operated in the innermost region, whereas both the common frequency and the additional frequency are operated in the middle region. This frequency assignment strategy is shown not only to remove inter-cell hard handoffs without requiring extra hardware, but also to reduce intra-cell hard handoffs.

Frequency chirping induced in an electorabsorption (EA) modulator can degrade transmission performance because of the chromatic dispersion of fiber. This letter studies the frequency chirping in an EA modulator from the viewpoint of the influence of the modulation bandwidth. Both simulations and experiments, in which fiber transmission was carried out applying modulation signals of different bandwidths to an EA modulator, show that a large bandwidth causes small degradation in the transmission performance. This result is attributed to the short chirping time that occurs when a large bandwidth signal is applied.

This paper proposes a new distortion analysis method for frequency-dependent FET amplifiers, which uses a novel Frequency-Dependent Complex Power Series (FDCPS) model. This model consists of a frequency-independent nonlinear amplifier represented by an odd-order complex power series and frequency-dependent input and output filters. The in-band frequency characteristics of the saturation region are represented by the frequency-dependent output filter, while the in-band frequency characteristics of the linear region are represented by the frequency-dependent input and output filters. In this method, the time-domain analysis is carried out to calculate the frequency-independent nonlinear amplifier characteristics, and the frequency-domain analysis is applied to calculate the frequency-dependent input and output filter characteristics. The third-order intermodulation (IM3) calculated by this method for a GaAs MESFET amplifier is in good agreement with the numerical results obtained by the Harmonic Balance (HB) method. Moreover, the IM3 calculated by this method also agrees well with the measured data for an L-band 3-stage GaAs MESFET amplifier. It is shown that this method is effective for calculating frequency-dependent distortion of a nonlinear amplifier with broadband modulation signals.

The frequency offset estimation is used to correct any frequency error of the local reference oscillator. In this letter, a frequency offset estimation algorithm utilizing the peak phase error detection and frequency offset smoother is proposed for burst data transmission. The basic idea of frequency offset estimator is to use a curve fitting method. The proposed peak phase error detection avoids a large phase error which yields a bad value for FOE. In order to control the AFC, frequency offset smoother by a simple filter is used. Simulation results show that the proposed algorithm is adequate for frequency offset estimation of burst data transmission.

This paper proposes a newly developed dual-frequency antenna for 800 MHz and 1500 MHz band use. A uniformly spaced array configuration, originally designed for a 800 MHz analog system, is extended to yield dual frequencies operations. An important characteristic of a base station antenna is low sidelobe level in order to suppress inter-cell interference. In the case of a uniformly spaced array configuration, sidelobe levels are increased by the emergence of grating lobes at higher frequencies. Electrical beam tilt also degrades the sidelobe level. As does the change in the excitation coefficients of the array elements at higher frequencies. These three factors are studied theoretically to yield practical sidelobe levels. One more important beam characteristic is the sector beam in the horizontal plane. The same beam width in two frequency bands is achieved by designing the novel reflector shape and determining the proper array element positions in front of the reflector. Practical antenna characteristics are confirmed by designing, manufacturing, and testing a base station antenna.

The lock-up time of a PLL frequency synthesizer mainly depends on the total loop gain. Since the gain of the conventional phase detector is constant, it is difficult to improve the lock-up time by the phase detector. In this paper, we reconsider the operation of the phase detector and propose the PLL frequency synthesizer with multi-phase detector in which the gain of phase detector is increased by using four stage phase detectors and charge pumps. Then, a higher speed lock-up time and good spurious characteristics can be achieved.

SiGe HBTs with doping level inversion, that is, a higher dopant concentration in the base than in the emitter, are realized based on the double-polysilicon self-aligned transistor scheme by means of selective epitaxy performed in a production CVD reactor. The effects of the Ge profile in the base on the transistor performance are explored. The fabricated HBT with a 12-27% graded Ge profile demonstrates a maximum cutoff frequency of 88 GHz, a maximum oscillation frequency of 65 GHz, and an ECL gate delay time of 13.8 ps.

In this paper, we propose a speedup method of frequency switching time in the phase locked loop (PLL) frequency synthesizer using the target frequency detector (TFD). The TFD detects the time Ta for any channels where the output of the PLL frequency synthesizer reaches the target frequency for the first time. At Ta, the programmable divider, the reference divider and the phase comparator are reset, and the phase of the PLL frequency synthesizer is initialized and the phase synchronization is achieved. In the proposed method, since the ringing in the transient state does not occur, the output of the PLL frequency synthesizer converges to the target frequency at Ta and the frequency switching time is speeded up. The effectiveness of the proposed method will be confirmed by experimental results.

This paper is consisting of the two novel EMC technologies that we have been developed in our laboratory. The first is the technology for measuring the RF (Radio Frequency) nearby magnetic field and estimation of the RF current in the printed circuit board (PCB) by using the small loop antenna with multi-layer PCB structure developed by our laboratory. I introduce the application of our small loop antenna with its physical structure and the analysis of the nearby magnetic field distribution of the printed circuit board applying the discrete Wavelet analysis. We can understand the behavior of the digital circuit in detail, and we can also take measures to meet the specification about the electromagnetic radiation from the digital circuit from the higher order of priority by using these technologies. The second is our proposing novel technology for reducing the electromagnetic radiation from the digital equipment by taking notice of the improvement of the de-coupling in the PCB. We confirmed the remarkable effect of this technology by redesigning the motherboard of the small-sized computer.

In this paper, the bit error rate (BER) of 16 differential amplitude phase shift keying (16DAPSK) modems in future mobile communication system is derived analytically. The channel employed in this paper is the frequency-selective and fast Rayleigh fading channel, corrupted by cochannel interference (CCI) and additive white Gaussian noise (AWGN). Exact expressions for the probability distributions of the differential phase and amplitude ratio are derived for the BER calculation. The BER and optimum boundary are obtained for various channel conditions. In addition, the results for the BER in the presence of CCI are provided.

We have developed a fabrication technique for high-performance high-thermal-stability InP/InGaAs heterojunction bipolar transistors (HBTs) for use in 40-Gb/s ICs. The HBT's T-shaped emitter electrode structure simplifies the fabrication process and enables high controllability of spacing between the emitter and the base electrodes. A highly-C-doped base, grown by gas-source MBE, and a new Pt-based metal system results in a low base resistance. An InP subcollector suppresses thermal runaway of HBTs at high collector current better than a conventional InGaAs subcollector does. Using these techniques, we fabricated a very-high-performance HBT with an extremely high cutoff frequency fT of 235 GHz. The RF measurements show that the collector current at the peak cutoff frequency is inversely proportional to collector thickness. We also fabricated a static 1/2 frequency divider, that can be used for 40-Gb/s optical transmission systems, operating up to 44 GHz. This divider confirmed that the developed HBT is applicable to 40-Gb/s optical transmission ICs.

This paper proposes a fast synchronization scheme with a short preamble signal for high data rate wireless LAN systems using orthogonal frequency division multiplexing (OFDM). The proposed OFDM burst format for fast synchronization and the demodulator for the proposed OFDM burst format are described. The demodulator, which offers automatic frequency control and symbol timing detection, enables us to shorten the preamble length to one quarter that of a conventional one. Computer simulation results show that the degradation in required Eb/N0 due to the synchronization scheme is less than 1 dB in a selective Rayleigh fading channel.

The frequency-offset estimation of a wireless asynchronous transfer mode (ATM) modem based on the orthogonal frequency division multiplexing (OFDM) is discussed. For burst synchronization operating under the time-division multiple access (TDMA) medium access control (MAC), an OFDM preamble using a multistage frequency-offset estimation technique is proposed and shown to have a good accuracy with a large estimation range. And also an averaged decision-directed channel estimation (ADDCE) technique suitable for burst data is proposed.