The aim of this article is to show the effectiveness of exploiting separability in numerical analysis of nonlinear systems. Separability is a valuable property of nonlinear mappings which appears with surprising frequency in science and engineering. By exploiting this property, computational complexity of many numerical algorithms can be substantially improved. However, this idea has not been received much attention in the fields of electronics, information and communication engineerings. In recent years, efficient algorithms that exploit the separability have been proposed in the areas of circuit analysis, homotopy methods, integer labeling methods, nonlinear programming, information theory, numerical differentiation, and neural networks. In this article, these algorithms are surveyed, and it is shown that considerable improvement of computational efficiency can be achieved by exploiting the separability.

This article proposes a four dimensional autonomous hyperchaos generator whose nonlinear element is only one diode. The circuit is analyzed by regarding the diode as an ideal switch. Hence we can derive the two dimensional return map rigorously and its Lyapunov exponents confirm the hyperchaos generation. Also, a novel mathematical basis for the simplification to the ideal switch is given.

H control theory provides a systematic frequency shaping method of control systems. The existence condition of the solution for so called standard H control problem and the form of the H controller are derived in 1989. One of the most important feature of the controller is that it has many free parameters which can be chosen independently of the H control. On the other hand there is a criticism that the time response of prototypal H control systems is slow. Therefore in this paper we introduce an H₂ control optimization by taking advantage of the free parameters to expect the improvement of the time response of the H control system. In this paper we consider state feedback case. The free parameters of state feedback H controller are not directly obtained from well known results since this problem is a kind of non-standard problem. Therefore, in the first place, we will get them via reviewing the FI (ful information) case. Then the free parameters of the state feedback H controller are shown based on the corrected FI solution. These parameters are next used to optimize an H₂ control objective in the H control system.

This paper discusses the trends and future issues in hardware description languages (HDL's) and high-level synthesis systems. First the importance of HDL's and high-level synthesis is described. Then, several HDL's and related CAD systems are briefly introduced. Finally, the requirements to future HDL's and highlevel synthesis systems are discussed from several points of view.

This paper presents a new fast fault simulation algorithm using a content addressable memory, which deals with zero-delay fault simulation of gate-level synchronous sequential circuits. The computation time of fault simulation for a single vector under the single stuck-at fault model is O(n²) for all the existing fault simulation algorithms on a sequential computers. The new algorithm attempts to reduce the computation time by processing many faults at a time by utilizing a property that a content addressable memory can be regarded as an SIMD type parallel computation machine. According to theoretical estimation, the speed performance of a simulator based on the proposed algorithm is equivalent to a fast fault simulator implemented on a vector supercomputer for a circuit of about 2400 gates.

This paper presents a survey on bicriteria network optimization problems. When there are two conflicting criteria that evaluate the solution, the bicriteria optimization is to find a solution for which these criteria are both acceptably satisfied. Standard approaches to these problems are to combine these two criteria into an aggregated single criterion. Among such problems, this paper first deals with the case in which the aggregated objective function, denoted h(f₁(x), f₂(x)), is convex in original two objectives f₁(x) and f₂(x), and, as its special case, it reviews a strongly polynomial algorithm for the bicriteria minimum-cost circulation problem. It then discusses the case in which h is concave and demonstrates that a parametric approach is effective for this case. Several interesting applications in network optimization that belong to this class are also introduced. Finally we deal with the minimum range problems which seek to find a solution such that weights of the components used in the solution are most uniform. We shall present efficient algorithms for solving these problems arised in network optimization.

LOTOS is a language developed within ISO for the formal description of communication protocols and distributed systems. In LOTOS, requirements for a distributed system are called a "service specification". Each node exchanges synchronization messages to ensure the temporal ordering for the execution of events in a service specification. The actions of each node are described as a "protocol specification". This paper gives a survey for a method to derive protocol specifications from a service specification written in a LOTOS based language. In order to derive the protocol specifications, we make the syntax tree of a given service specification and give some attributes for each node in the tree. The protocol specifications are derived automatically by evaluating these attributes. The derived protocol specifications satisfy the given service specification. We also explain a LOTOS simulator for the execution of derived protocol specifications. The related works are also summarized.

Dynamic behavior of a distributed parameter system described by the one-dimensional wave equation with a nonlinear boundary condition is examined in detail using a graphical method proposed by Witt on a digital computer. The bifurcation diagram, homoclinic orbit and one-dimensional map are obtained and examined. Results using an analog simulator are introduced and compared with that of the graphical method. The discrepancy between these results is considered, and from the comparison among the bifurcation diagrams obtained by the graphical method, it is denoted that the energy dissipation in the system considerably restrains the chaotic state in the bifurcation process.

For the efficient circuit simulation by the direct method, network tearing and latency techniques have been studied. This letter describes a circuit simulator SPLIT with hierarchical decomposition and latency. The block size of the latent subcircuit can be determined dynamically in SPLIT. We apply SPLIT to the MOS circuit simulation and verify its availability.

This paper proposes a designing algorithm for quadrilateral recursive filters which consist of four quarter-plane filters in the four quadrants. This can realize a perfect zero-phase filtering which is essential for image processing. Furthermore, several parallel processing algorithms capable of performing under very high parallel efficiency are developed on line-connected and mesh-connected processor arrays. By these proposals, the advantage of two-dimensional non-causal zero-phase recursive digital filters is made clear.

It is sometimes required to change the frequency characteristics of a digital filter during its operation. In this paper a new synthesis of variable even-order IIR digital filters is proposed. The cut-off frequency of the filter can be changed by a single parameter. The fundamental filter structure is a cascade of second-order sections. The multiplier coefficients of each section are determined by using the Taylor series expansion of the lowpass to lowpass frequency transformation. For this method any second-order section can be used as a prototype, but here in this paper only the direct form and the lattice form are described. Unlike the conventional method, any transfer functions can be used for the proposed method. Finally a designed example shows that the proposed filter has wider tuning range than the conventional filter, and the advantage of the proposed filters is confirmed.

In general, dynamic channel assignment has a better performance than fixed channel assignment in a cellular mobile communication system. However, it is complex to control the system and a lot of equipments are required in each cell when dynamic channel assignment is applied to a large service area. Therefore, it is effective to limit the size of the service area in order to correct the defects of dynamic channel assignment. So, we propose an application of dynamic channel assignment to a part of a service area when fixed channel assignment is applied to the remaining part of the area. In the system, the efficiency of channel usage in some cells sometimes becomes terribly low. The system has such a problem to be improved. We show that the rearrangement of the channel allocation is effective on the problem.

A Discrete Event System (DES) is a system that is modeled by a finite automaton. A Cooperating Discrete Event System (CDES) is a distributed system which consists of several local DESs which are synchronized with each other to accomplish its own goal. This paper describes the automatic synthesis of a CDES from a modular temporal logic specification. First, MPTS (Modular Practical Temporal Specification language) is proposed in which the new features (modular structure and domain specification) are appended to temporal logic. To overcome the "state explosion problem", which occurs in generating a global automaton in former synthesis methods using temporal logic, a compositional synthesis is proposed where automata are reduced at every composition step.

Binary Decision Diagrams (BDDs) and Shared Binary Decision Diagrams (SBDDs), which are improved BDDs, are useful for implementing VLSI logic design systems. Recently, these representations, which are graph representations of Boolean functions, have become popular because of their efficiency in terms of time and space. The forms of the BDD vary with the order of the input variables though they represent the same function. The size of the graphs greatly depends on the order. The variable ordering algorithm is one of the most important issues in the application of BDDs. In this paper, we consider methods which reduce the graph size by reordering input variables on a given BDD with a certain variable order. We propose the Minimum-Width Method which gives a considerably good order in a practicable time and space. In the method, the order is determined by width of BDDs as a cost function. In addition, we show the effect of combining our method with the local search method, and also describe the improvement using the threshold. Experimental results show that our method can reduce the size of BDDs remarkably for most examples. The method needs no additional information, such as the topological information of the circuit. The results can be a measure for evaluation of other ordering methods.

This paper investigates the compositionality of operational models for concurrency induced by labeled transition systems (LTS's). These models are defined on the basis of a metric domain first introduced by de Bakker and Zucker; the domain is a complete metric space consisting of tree-like structures called processes. Transition system specifications (TSS's) define LTS's; the set of states of such a LTS A is the set of terms generated by a signature Σ. For the syntactical operators F contained in Σ, semantic operations (on processes) associated with F are derived from the TSS S by which A is defined, provided that S satisfies certain syntactical restrictions. By means of these operations, the compositionality of the operational model induced by A is established. A similar result was obtained by Rutten from TTS's which define finitely branching LTS's. The main contribution of this paper is generalization of Rutten's result to be applicable to TSS's which are based on applicative languages including recursion, parameterized statements, and value passing, and which define infinitely branching LTS's. A version of typed λ-calculus incorporating µ-notation is employed as a formalism for treating recursion, parameterized statements, and value-passing. Infinitely branching LTS's are needed to treat programming languages including value passing such as CCS.

The subject of the paper is to propose a simple O(|V|+|E|) algorithm for finding all 3-edge-components of a given undirected multigraph G=(V, E). An 3-edge-connected component of G is defined as a maximal set of vertices such that G has at least three edge-disjoint paths between every pair of vertices in the set. The algorithm is based on the depth-first search (DFS) technique. For any fixed DFS-tree T of G, cutpairs of G are partitioned into two types: a type 1 pair consists of an edge of T and a back edge; a type 2 pair consists of two edges of T. All type 1 pairs can easily be determined in O(|V|+|E|) time. The point is that an edge set KE(T) in which any type 2 pair is included can be found in O(|V|+|E|) time. All 3-edge-components of G appear as connected components if we delete from G all edges contained in type 1 pairs or in the edge set KE(T).

The subject of the paper is to analyze time complexity of the minimum axiom set problem (MASHC) in the Horn clause propositional logic. MASHC is defined by "Given a set H of Horn clauses and a query Q, all in propositional logic, such that Q is provable over H, find an axiom set of minimum cardinality, HH, with respect to Q, where Q is provable over H if and only if Q can be shown to be true by repeating Modus Ponens starting from clauses of H under the assumption that all of them are originally assumed to be true". If Q is provable over H then H is called an axiom set (with respect to Q). As stated in the definition of MASHC, detecting if Q is provable over H is required. This leads us to a problem, called the provability detecting problem (PDPHC), defined by "Given a set H of Horn clauses and a query Q in propositional logic, determine if Q is provable over H". First an O(σ) algorithm BFSHC for PDPHC is given based on the breadth-first search, where σ is the formula size of a given set of Horn clauses. For MASHC, it is shown that the problem is NP-complete, and an O(σ) approximation algorithm FMAS is given. Its experimental evaluation is also presented.

Since Vendler classified aspect into four categories, state, achievement, activity, and accomplishment, much effort has been made to define the notion of aspect logically. It is commonly agreed that aspect represents the general temporal characteristics of events and states. However, there still remains a considerable amount of disagreement about its formal treatment. One of the major problems is that the aspect of a sentence shifts by certain types of sentence construction. For instance, adding time adverbials to a sentence modifies the original aspect, taking the progressive form of the verb changes the aspect, and so on. These phenomena are known as the aspect shifts. The other is the problem known as the imperfective paradox. The imperfective paradox is a problem of the truth definition of the progressives. The truth condition of the progressive form of the sentence is defined at an internal subinterval of the temporal range of the corresponding non-progressive sentence. If the truth condition of the progressive form of the sentence is defined using the truth condition of the non-progressive form of the sentence, there are logical contradictions of truth definition in a sentence such as "Max was building a house, but he never built it". These problems cause much confusion (1) in the truth definition of aspects, (2) in the definition of aspect operations, such as initiative, terminative, progressive, perfective, etc., and also (3) in the definition of adding time adverbials. This paper reviews the semantic problems with respect to aspect, and presents a consistent mechanism of aspect interpretation in order to settle all these semantic puzzles at once. For the sake of logical clarity, we construct a formal language, L_t, where every meaningful formula is a pair of a meaningful sentence and its aspect. The syntax of L_t describes the phenomenology of aspect shifts. The semantics of L_t defines temporal interpretation for all the meaningful sentences of L_t, with assuming the temporal interpretations of three inherent aspects, state, achievement, and activity. The proposed aspect interpretation gives a reasonable account for aspect shifts, and solves the imperfective paradox by asssuming the time structure to be backwards linear.

It has been recognized that there exist some disparities between properties of continuous control systems and those of discrete ones which are obtained from their continuous counterparts by use of a sampler and zero order hold. This still remains true even if the sampling rate becomes fast enough and sometimes causes unfavorable effects in control systems design. To reconcile with this conflict, use of delta operator has been proposed in place of z-operator recently. This note formulates a delta domain Lyapunov matrix equation and shows that the equation actually mediates the discrete Lyapunov equation and its continuous counterpart.