A buried gate AlGaAs/InGaAs heterojunction FET (HJFET) with gate breakdown voltage of 30 V was examined for high drain bias (higher than 10 V) operation. High breakdown voltage was realized due to the optimization of the narrow recess depth. A 1.4 mm HJFET has exhibited an output power of 30.2 dBm (1050 mW) with 50% power added efficiency (PAE) and 12.1 dB linear gain at 12 GHz with a 13 V drain bias. An internal matching circuit for a 16.8 mm HJFET was designed using a large-signal load impedance determined from load-pull measurement. The 16.8 mm internally-matched HJFET has delivered 38.9 dBm (7.8 W) output power with 46% PAE and 11.6 dB linear gain at 12 GHz with a drain bias of 13 V. This is the first report of higher than 10 V operation of an X- and Ku-band power HJFET with the excellent power performance.

In this paper, we present a new state space-based approach for the two-dimensional (2-D) frequency estimation problem which occurs in various areas of signal processing and communication problems. The proposed method begins with the construction of a state space model associated with the noiseless data which contains a summation of 2-D harmonics. Two auxiliary Hankel-block-Hankel-like matrices are then introduced and from which the two frequency components can be derived via matrix factorizations along with frequency shifting properties. Although the algorithm can render high resolution frequency estimates, it also calls for lots of computations. To alleviate the high computational overhead required, a highly parallelizable implementation of it via the principle subband component (PSC) of some appropriately chosen transforms have been addressed as well. Such a PSC-based transform domain implementation not only reduces the size of data needed to be processed, but it also suppresses the contaminated noise outside the subband of interest. To reduce the computational complexity induced in the transformation process, we also suggest that either the transform of the discrete Fourier transform (DFT) or the Haar wavelet transform (HWT) be employed. As a consequence, such an approach of implementation can achieve substantial computational savings; meanwhile, as demonstrated by the provided simulation results, it still retains roughly the same performance as that of the original algorithm.

We present a high performance AlGaAs/GaAs power HBT with very low thermal resistance for digital cellular phones. Device structure with emitter air-bridge is utilized and device layout is optimized to reduce thermal resistance based on three-dimensional thermal flow analysis, and in spite of a rather thick substrate (100 µm), which achieved a low thermal resistance of 23/W for a multi-finger (440 µm240 fingers) HBT. This 40 finger HBT achieved power added efficiency (PAE) of over 53%, 29.1 dBm output power (Pout) and high associated gain (Ga) of 13.5 dB with 50 kHz adjacent channel leakage power (Padj) of less than -48 dBc under a 948 MHz π/4-shifted QPSK modulation with 3.4 V emitter-collector voltage. We also investigated the difference of RF performance between two bias modes (constant base voltage and current), and found which mode is adequate for each stage in several stage power amplifier for the first time.

This paper proposes a low distortion technique which reduces transmitter intermodulation. It is shown that one of the third order transmitter intermodulation products generated can be reduced by using a parallel amplifier configuration which includes a 45 divider and a 45 combiner. It is already known that the other third order transmitter intermodulation product can be reduced by using a parallel amplifier configuration using 90 hybrids. Thus, all of the third order transmitter intermodulation can be reduced by combining these configurations. This paper also shows the experimental results obtained with a parallel amplifier using 90 hybrids and one using a 45 divider and combiner in the K-band. The spectra of these amplifiers are compared, and it is found that third order transmitter intermodulation can be reduced by more than 29 dB in the parallel amplifier using the 45 divider and combiner.

This paper describes the design, fabrication, and performance of a GaAs FET linearizer with a large source inductance, focusing mainly on (a) a mechanism of positive gain and negative phase deviations for input power, (b) stability considerations, and (c) a dependence on load impedance. In addition, in an application to the linearized amplifier, it is shown that an improvement can be achieved for adjacent channel leakage power (ACP) and third order intermodulation distortion (IM3) with the use of the linearizer.

This paper describes a concept of the quasioptical spatial power combining technique and its demonstration of active integrated antenna arrays with strong coupling as an actual example of high efficient combiner in high frequencies. Some configurations of the arrays such as a 3-element linear array and a 33 array are designed with a circuit and electromagnetic simulator. In order to predict the operating frequencies, large signal FET model parameters are determined from measured small signal S-parameters.

We have been studying on subthreshold characteristics of SOI (Silicon-On-Insulator) MOSFET's in terms of substrate bias dependence using a one-dimensional subthreshold device simulator based on Poisson equation in an SOI multilayer structure for estimating structural parameters of real devices. Here, we consider the quantum mechanical effects in the electron inversion layer of thin SOI MOSFET's, such as the two-dimensionally quantized electron states and transports, with a self-consistent solver of Poisson and Schrodinger equations and a mobility model by the relaxation time approximation. From results of simulations, we found a significant difference between this model and the classical model and concluded that the quantum mechanical effects need to be considered in analizing thin-film SOI devices.

Constantin and Rao have given a method for constructing single asymmetric error correcting (SAEC) codes based on the theory of the Abelian group, This paper uses the method of generating function in combinatorics to solve the implementation problems of the SAEC group theoretic codes. The encoding and decoding algorithms of the coding scheme perform simple arithmetic operations recursively. The idea of generating function can also be applied to t symmetric errors and simultaneously detect all unidirectional errors (t-syEC/AUED) codes for 1t3.

We have studied the flowthrough operation to simplify operation processes and to promote the efficiency of operation flows. In this paper, we introduce the Construction Manager System (CMS) that cooperates with the ATM Transport Network Operation System (ATMOS). This system directs the construction processes using the construction tickets newly defined by the GDMO (Guidelines for the Definitions of Managed Objects); these tickets and action scenarios are prepared inside the SMS (Scenario Management System). We confirm that CMS can perform construction management using the construction tickets instead of the traditional off-line communications such as the telephone and the facsimile. Furthermore, because CMS cooperates with ATMOS, it is able to manage actual network elements (NEs) and conduct board costruction processes by using construction tickets. Moreover, CMS can confirm that the construction processes of the actual NEs have actually been executed through the Q3 interface. As a result, we verify the basic technique for flowthrough operation for configuration management.

We have developed a management agent that adapts the delegation concept to achieve efficient network management. In conventional delegation architecture, a network management operator details management operations in an operation-script that describes management operation flow and such network management functions as event management and path tracing. The operator sends this script to agents to execute. In our delegation architecture, the operator sends only a script skeleton describing management operation flow alone; management functions are built into the agents in the form of fuction objects. This helps keep management traffic low. Each function object is designed by utilizing three operational objects: enhanced, primitive, and communication. Each enhanced operational object (EOO) provides a script skeleton with an individual network management function. A primitive operational object (POO) provides an EOO with managed object (MO) access functions. A communication operational object (COO) provides an EOO with a mechanism for accessing the functions of other remote EOOs. We have tested our design by applying it to a path tracing application, and we have measured the total data transfer size between a manager and an agent and the amount of memory usage in our agent's running environment. Evaluation of our implementation suggests that our design can be applied such network management functions as connection establishment and release, fault isolation, and service provisioning.

A GaAs SPDT switch IC operating at a low power supply voltage of 2.7 V has been developed for use in 1.9 GHz band personal handy phone system (PHS). In combination with MESFETs with low on-resistance and high breakdown voltage, the switch IC adopts parallel-LC resonant circuits and utilizes both stacked FETs and an additional shunt capacitor at the receiver side in order to realize low insertion loss, high isolation and low distortion characteristics. An insertion loss of 0.55 dB and an isolation of 35.8 dB were obtained at 1.9 GHz. The IC also achieved an output power of 25.0 dBm at 1 dB gain compression point, a second order distortion of -54.3 dBc and an adjacent channel leakage power of -66 dBc at 600 kHz apart from 1.9 GHz at 19 dBm output power.

This paper describes the relation between the structure and the capability on mesh-connected computers with orthogonal broadcasting. It is shown that algorithms of maximum finding for the two-way communication model can be performed on the one-way communication model without increasing the time complexity.

We present a new method for the adaptive control of nonminimum phase continuous-time systems based on the pole-zero placement using approximate inverse systems to avoid the unstable pole-zero cancellations. Using this method effect of the unstable zeros cab be compensated approximately. We show how unstable pole-zoro cancellations can be avoided, and that this method has the advantage of being able to determine an approximate inverse system independently of the plant zeros. The proposed scheme uses only the available input and output data and the stability using approximate inverse systems is analyzed. Finally, the results of computer simulation are presented to illustrate the effectiveness of the proposed method.

In contrast to previous algorithms for reconfiguring processor arrays under the assumption that spare rows and columns are placed on the perimeter of the array or on fixed positions, our new algorithm employs movable and partitionable spare rows and columns. The objective of moving and partitioning spare rows and/or columns is the elimination of faulty processors each of which is blocked in all directions to spare processors. The results of our computer simulation indicate that reconfigurability can significantly be improved.

Several multiuser detectors have been recently proposed to combat multiple-access interference and near-far problem for CDMA systems. The performance of a multi-user receiver in combining the decorrelating decision-feedback scheme for a synchronous DS/CDMA system is considered. Using the Gaussian approximation on the multiple-access interference and amplitude estimation errors, we derive a closed form expression for the BER performance of the decorrelating decision-feedback detector in single-path Rayleigh fading channel and power controlled system. And, we show that our analysis agrees with the results of simulations. A modified decision-feedback detector is also proposed and analyzes. Numerical results show that the modified dicision-feedback detector proposed in this paper results in enhanced performance.

We discuss a new decoder for the multiple-valued signed-digit number, using a current-mode CMOS transistor-oriented circuit structure. In this paper, a new decoding method with the selective summation of a redundantly represented addend "O = [-1 r]" is proposed, where r is the radix and the addend is applied to each digit with a negative value and any consecutively higher digit takes which has a value of O. A newly designed literal linear circuit is realized, which has a current-switch function that makes independently the short path when each digit has a value of O. Through the parallel connections of these current swiches, the same addend signal at the lower digit is transmitted in a higher speed, The decoder circuit is tested by using the general circuit simulation software SPICE and the circuit characteristics of the selective summation of a redundantly represented O addend and the output results of the SD decoding operation were simulated. We also evaluated the decoder circuit in terms of the processing speed and the circuit size.

Dynamic Term Rewriting Calculus is a new computation model proposed by the authors for the purpose of formal description and verification of algorithms treating Term Rewriting Systems. The computation of DTRC is basically term rewriting. The characteristic features of DTRC are dynamic change of rewriting rules during computation and hierarchical declaration of not only function symbols and variables but also rewriting rules. These features allow us to program metacomputation of TRSs in DTRC, that is , we can implement in DTRC in a natural way those algorithms which manipulate term rewriting systems as well as those procedures which verify such algorithms. In this paper, we give a formal description of DTRC. We then show some results on confluence property of DTRC.

Electric fishes generate an AC electric field around themselves by the electric organ in the tail. Spatial distortion of the field by nearby objects is detected by an electroreceptor array located an over the body surface to localize the object electrically when other senses such as vision and mechanosense are useless. Each fish has its own 'frequency band' for its electric organ discharges, and jamming of the electrolocation system occurs when two fish with similar discharge frequencies encounter. To avoid janmming, the fish shift their discharge frequencies in appropriate directions. A computational algorithm for this electrical behavior and its neuronal implementation by the brain have been discovered. The design features of the system, however, are rather complex for this simple behavior and cannot be readily explained by functional optimization processes during evolution. To gain insights into the origin of the design features, two independently evolved electric fish species which perform the same behavior are compared. Complex features of the neuronal computation may be explained by the evolutionary history of neuronal elements.

This paper focuses on recovering from processor transient faults in pipelined multiprocessor systems. A pipelined machine may employ out of order execution and branch prediction techniques to increase performance, thus a precise computation state would not be available. We propose an efficient scheme to maintain the precise computation state in a pipelined machine. The goal of this paper is to implement checkpointing and rollback recovery utilizing the technique of precise interrupt in a pipelined system. Detailed analysis is included to demonstrate the effectiveness of this method.

In this paper, we propose an efficient task scheduling scheme, called CTS (Class-based Task Scheduling), to obtain high performance in terms of high system utilization and low waiting times for tasks. While a better submesh allocation scheme can improve system performance, an allocation policy alone cannot improve performance significantly. This is due to the fact that the FCFS task scheduling policy leads to large external fragmentation. The CTS strategy maintains four separate queues, one for each incoming task class. This avoids the blacking property incurred in the FCFS scheduling. To reduce the external fragmentation, a job tends to wait for an occupied submesh of the same size instead of using a new submesh in the CTS strategy. Simulation results indicate that the proposed scheduling strategy improves the performance compared to the FCFS scheduling policy by reducing the average waiting delay significantly.