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[Keyword] integrated(390hit)

201-220hit(390hit)

  • Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators

    Jaesang LIM  Jaejoon KIM  Beomsup KIM  

     
    PAPER-General Fundamentals and Boundaries

      Vol:
    E88-A No:4
      Page(s):
    1084-1089

    A novel CMOS LC oscillator architecture combining an LC tuned oscillator and a ring structure is presented as a new design topology to deliver improved phase noise for multiphase applications. The relative enhancement in the phase noise is estimated using a linear noise modeling approach. A three-stage LC-ring oscillator fabricated in a 0.6 mm CMOS technology achieves measured phase noise of -132 dBc/Hz at 600 kHz offset from a 900 MHz carrier and dissipates 20 mW with a 2.5 V power supply.

  • Vertically Coupled Microring Resonator Filter for Integrated Add/Drop Node

    Yasuo KOKUBUN  

     
    INVITED PAPER

      Vol:
    E88-C No:3
      Page(s):
    349-362

    The add/drop wavelength filter is an essential component in the new-generation photonic network. Microring resonator filters using high index contrast (HIC) optical waveguides are recently attracting attention as add/drop filters owing to their compactness, functionality such as dispersion compensation, and ease of filter synthesis. In particular, the vertically coupled microring resonator (VCMRR) filter is highly suited for the dense, large-scale integration of filter circuits. In this review, the fundamental characteristics advantageous to the add/drop filter nodes are introduced, and the recent progress in the development of vertically coupled microring resonator filters achieved mainly by the author's group is described.

  • Optimum Solution of On-Chip A/D Converter for Cooled Type Infrared Focal Plane Array

    Sang Gu KANG  Doo Hyung WOO  Hee Chul LEE  

     
    PAPER-Electronic Circuits

      Vol:
    E88-C No:3
      Page(s):
    413-419

    Transferring the image information in analog form between the focal plane array (FPA) and the external electronics causes the disturbance of the outside noise. On-chip analog-to-digital (A/D) converter into the readout integrated circuit (ROIC) can eliminate the possibilities of the cross-talk of noise. Also, the information can be transported more efficiently in power in the digital domain compared to the analog domain. In designing on-chip A/D converter for cooled type high density infrared detector array, the most stringent requirements are power dissipation, number of bits, die area and throughput. In this study, pipelined type A/D converter was adopted because it has high operation speed characteristics with medium power consumption. Capacitor averaging technique and digital error correction for high resolution was used to eliminate the error which is brought out from the device mismatch. The readout circuit was fabricated using 0.6 µm CMOS process for 128 128 mid-wavelength infrared (MWIR) HgCdTe detector array. Fabricated circuit used direct injection type for input stage, and then S/N ratio could be maximized with increasing the integration capacitor. The measured performance of the 14 b A/D converter exhibited 0.2 LSB differential non-linearity (DNL) and 4 LSB integral non-linearity (INL). A/D converter had a 1 MHz operation speed with 75 mW power dissipation at 5 V. It took the die area of 5.6 mm2. It showed the good performance that can apply for cooled type high density infrared detector array.

  • Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation

    Retdian A. NICODIMUS  Hiroto SUZUKI  Kazuyuki WADA  Shigetaka TAKAGI  

     
    PAPER

      Vol:
    E88-A No:2
      Page(s):
    444-450

    A design optimization of active shield circuit using noise averaging method is proposed. The relation between the averaged noise and the design parameters of the active shield circuit such as circuit gain and on-chip layout is examined. A simple design guideline is also provided. Simulation results show that the active shield circuit designed by the proposed optimization method gives a better noise suppression performance of about 28% than the conventional one.

  • Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits

    Retdian A. NICODIMUS  Shigetaka TAKAGI  Kazuyuki WADA  

     
    PAPER

      Vol:
    E88-A No:2
      Page(s):
    438-443

    An active shield circuit which effectively reduces the substrate noise on the entire area inside the guard ring regardless of the noise source position is proposed. Simulation result shows that the proposed circuit can reduce the noise level to -85 dB while a conventional guard ring gives -52 dB.

  • Development of Passive Interconnection Technology for SFQ Circuits

    Yoshihito HASHIMOTO  Shinichi YOROZU  Yoshio KAMEDA  Akira FUJIMAKI  Hirotaka TERAI  Nobuyuki YOSHIKAWA  

     
    INVITED PAPER

      Vol:
    E88-C No:2
      Page(s):
    198-207

    To enable the use of passive transmission lines (PTLs) for the interconnection of single-flux-quantum (SFQ) circuits, we have implemented a driver and a receiver and have developed a method for designing SFQ circuits with passive interconnections. Basic components and properties of passive interconnections, such as the frequency characteristics of the driver and receiver, the PTL delay, and the crosstalk between PTLs, have been experimentally verified. Our developed components and design method have been applied to actual SFQ circuits, such as a 44 switch having block-to-block passive interconnections and a 22 switch having gate-to-gate passive interconnections. We have also shown the advantages of PTLs over Josephson transmission lines (JTLs). We also discuss the prospects of SFQ circuits having passive interconnections.

  • Design of Quadrature Hybrids and Directional Couplers Based on the Equivalent Admittance Approach

    Isao OHTA  Tadashi KAWAI  

     
    INVITED PAPER

      Vol:
    E88-C No:1
      Page(s):
    2-14

    This paper presents a design procedure of a directional coupler consisting of a twofold symmetric four-port circuit with four identical matching networks at each port. The intrinsic power-split ratio and the equivalent admittance of the directional coupler are formularized in terms of the eigenadmittances of the original four-port without the matching networks. These formulas are useful for judgment on the realizability of a directional coupler in a given circuit structure and for design of the matching networks. Actually, the present procedure is applied to designing various quadrature hybrids and directional couplers, and its practical usefulness as well as several new circuit structures are demonstrated.

  • Experimental Verification of Mode Coupling Phenomenon in High Permittivity NRD Guide with Small Remaining Asymmetrically Air Gap

    Futoshi KUROKI  Kouichi YAMAOKA  Motofumi YAMAGUCHI  Tsukasa YONEYAMA  

     
    LETTER

      Vol:
    E88-C No:1
      Page(s):
    110-111

    It is known that a high permittivity NRD guide suffers from irregular transmission phenomena. In this study, we clarified that this problem is caused by a mode coupling phenomenon between the operating and parasitic modes due to a small remaining asymmetrically air gap between the metal plates and high permittivity dielectric materials.

  • Fully CAD-Based Design of a Mode Transformer between NRD Guide and Vertical Strip Line and Its Applications to Junction Circuits at 60 GHz

    Futoshi KUROKI  Makoto KIMURA  Tsukasa YONEYAMA  

     
    PAPER

      Vol:
    E88-C No:1
      Page(s):
    105-109

    A mode transformer between the NRD guide and the vertical strip line was developed and applied to the right angle corner, T-junction, and 3-port junction at 60 GHz. Emphasis was placed on a fully CAD-based design procedure by using an electromagnetic field simulator. Agreement between the simulated and measured performances of the junction circuit was obtained, and thus the validity of the design procedure was confirmed. A well-balanced transmission coefficient of the 3-port junction, found to be 4 0.5 dB, was observed in the bandwidth of 2 GHz around a center frequency of 60 GHz.

  • Flexible Transmission Line Using High Permittivity LSE-NRD Guide at 60 GHz

    Futoshi KUROKI  Akira MIYAMAE  Tsukasa YONEYAMA  

     
    LETTER-Microwaves, Millimeter-Waves

      Vol:
    E87-C No:12
      Page(s):
    2195-2197

    A flexible transmission line, consisting of a thin ceramic-compounding Teflon strip, was devised by using a high permittivity LSE-NRD guide. This transmission line has the advantage of changeable shape. Low-loss performance was confirmed by measuring the transmission loss of the 180 degree bend and the S-shaped curve in the 60 GHz frequency band.

  • The Design of Compact Integrated Triple-Band Antenna for Vehicle Application

    Kyungjin OH  Taein JUNG  Jaehoon CHOI  

     
    LETTER-Antennas and Propagation

      Vol:
    E87-B No:11
      Page(s):
    3398-3401

    A compact dual feed integrated triple-band vehicle antenna for GPS and RKES/PCS operation is proposed. The GPS (1575.42 1.023 MHz) antenna element is a corner truncated microstrip patch providing circularly polarized broadside radiation pattern. The RKES/PCS (447.7375 MHz/1750-1870 MHz) antenna consists of two printed monopoles fed by coplanar waveguide (CPW) transmission line. To reduce the height of RKES antenna, modified inverted-L monopole structure is utilized. The proposed antenna satisfies all the bandwidth and gain requirements for GPS and RKES/PCS services. Good radiation characteristics for vehicle application have also been obtained.

  • A Redox Microarray--An Experimental Model for Molecular Computing Integrated Circuits--

    Masahiko HIRATSUKA  Shigeru IKEDA  Takafumi AOKI  Tatsuo HIGUCHI  

     
    PAPER

      Vol:
    E87-C No:11
      Page(s):
    1804-1808

    An experimental model of a redox microarray, which provides a foundation for constructing future massively parallel molecular computers, is proposed. The operation of a redox microarray is confirmed, using an experimental setup based on an array of microelectrodes with analog integrated circuits.

  • Pulse Modulation Techniques for Nonlinear Dynamical Systems and a CMOS Chaos Circuit with Arbitrary 1-D Maps

    Takashi MORIE  Kenichi MURAKOSHI  Makoto NAGATA  Atsushi IWATA  

     
    PAPER

      Vol:
    E87-C No:11
      Page(s):
    1856-1862

    This paper presents circuit techniques using pulse-width and pulse-phase modulation (PWM/PPM) approaches for VLSI implementation of nonlinear dynamical systems. The proposed circuits implement discrete-time continuous-state dynamics by means of analog processing in a time domain, and also approximately implement continuous-time dynamics. Arbitrary nonlinear transformation functions are generated by the process in which a PPM signal samples a voltage or current source whose waveform in the time domain has the same shape as the desired transformation function. Because a shared arbitrary nonlinear voltage or current waveform generator can be constructed by digital circuits and D/A converters, high flexibility and real-time controllability are achieved. By using one of these new techniques, we have designed and fabricated a CMOS chaos circuit with arbitrary 1-D maps using a 0.6 µm CMOS process, and demonstrate from the experimental results that the new chaos circuit successfully generated various chaos with 7.5-7.8 bit precision by using logistic, tent and chaotic-neuron maps.

  • Advanced and Intelligent RF Front End Technology

    Kevin M.K.H. LEONG  Ji-Yong PARK  Yuanxun WANG  Tatsuo ITOH  

     
    INVITED PAPER

      Vol:
    E87-C No:9
      Page(s):
    1495-1502

    Integrated implementation of RF front-end components has been shown to posses many benefits. Furthermore, it presents a new way of approaching RF design. This paper will discuss the recent developments by the author's group in the field of RF front-end technology. This will include stand-alone RF front-end components such as a self-heterodyne mixer as well as more functional front-end circuitry such as digital beamformer arrays, retrodirective arrays and an array error calibration scheme.

  • Improved HBT MMIC Active Mixer for Wireless Applications

    Man Long HER  Kun Ying LIN  Yi Chyun CHIOU  Chih Yuan HSIEH  

     
    LETTER-Microwaves, Millimeter-Waves

      Vol:
    E87-C No:6
      Page(s):
    1082-1084

    In this study, an improved heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) active mixer is designed and fabricated. The HBT MMIC active mixer that is integrated with a low-noise amplifier (LNA) and active power adder can not only achieve high isolation, but can also dispense with one active component and reduce power consumption at the same time. Measurement results show that the conversion gain, LO-RF isolation, and double sideband noise figure (DSB-NF) of the proposed mixer are 22 dB, 40 dB, and 7 dB, respectively.

  • Performance Analysis on Data Transmission Control in a Voice/Data Integrated Wireless Communication System

    Yoshihiro ISHIKAWA  Kazuhiko FUKAWA  Hiroshi SUZUKI  

     
    PAPER-Mobile Radio

      Vol:
    E87-B No:5
      Page(s):
    1131-1140

    In communication systems such as mobile telecommunication systems and the Internet, resource sharing among coexisting real-time and non-real-time services is extremely important to provide multimedia services. This paper analytically investigates the performance of the packet data control algorithm proposed in. This algorithm efficiently uses radio resources by utilizing the remaining capacity that is not used by real-time services. The state probability vectors and transition probability matrices of both the real-time and non-real-time services are first derived and then the delay characteristics, the outage probability of voice users, and the outage probability of data users are evaluated. A performance analysis with high bit-rate non-real-time services is also presented.

  • A Design for Integrated Wireless Network with Flexible Bandwidth Assignment

    Takanori NOMURA  Keita KAWANO  Kazuhiko KINOSHITA  Koso MURAKAMI  

     
    PAPER-Mobility Management

      Vol:
    E87-B No:5
      Page(s):
    1177-1183

    As various mobile communication systems have developed, dramatically integrated wireless network, where users can communicate seamlessly via several wireless access systems, have become expected. At present, there are many studies of integrated wireless network, but no study of a network design method. Therefore, in this paper, we discuss a network design method for integrated wireless networks. Because of the handover procedure, the network design where adjacent base stations are connected to the same router, regardless of radio system type, is simply considered. However, in such a design, where mobile users crowd into a particular area and users' access to the base stations located there increases, the load of these accesses is centralized to the single router. To overcome this problem, we propose a new network design wherein the base stations of heterogeneous wireless communication systems, the service areas of which overlap, are connected to a different router. In the proposed network design, although users' accesses are concentrated on the base stations located in a particular area, users in that area can be assigned bandwidth of several upper links according to the access conditions of the base stations in neighboring areas. Finally, we show the excellent performance of the proposed design by simulation experiments.

  • Flexible Resource Allocation with Partial Resource Sharing and Minimum Overflow for Integrated Services

    Felipe A. CRUZ-PEREZ  Lauro ORTIGOZA-GUERRERO  

     
    PAPER-Wireless Communication Technology

      Vol:
    E87-B No:4
      Page(s):
    826-837

    Flexible Resource Allocation (FRA) strategies selectively control the transmission rates of users allowing them to specify maximum and minimum bandwidth requirements for the service type requested ensuring a minimum quality of service (QoS) is met. Complete, Partial, and Non Resource Sharing are the three types of resource sharing policies that can be used in systems with integrated services (voice, video and data) with different QoS and elasticities requirements. In this paper, an FRA strategy with Partial Resource Sharing, called Primary Unavailable Secondary Minimum (PUSMin), is presented. An analytical method is developed to assess its performance in an environment where several service types (with different bandwidth and elasticities requirements) exist. Results show that PUSMin decreases the resource reassignment rate as the offered traffic increases. This decreases the signalling overhead and computational complexity in the Base Station Controller (BSC) or Base Transceiver Station (BTS).

  • Microphotonics Devices Based on Silicon Wire Waveguiding System

    Koji YAMADA  Tai TSUCHIZAWA  Toshifumi WATANABE  Jun-ichi TAKAHASHI  Emi TAMECHIKA  Mitsutoshi TAKAHASHI  Shingo UCHIYAMA  Hiroshi FUKUDA  Tetsufumi SHOJI  Sei-ichi ITABASHI  Hirofumi MORITA  

     
    INVITED PAPER

      Vol:
    E87-C No:3
      Page(s):
    351-358

    A silicon (Si) wire waveguiding system fabricated on silicon-on-insulator (SOI) substrates is one of the most promising platforms for highly-integrated, ultra-small optical circuits, or microphotonics devices. The cross-section of the waveguide's core is about 300-nm-square, and the minimum bending radius are a few micrometers. Recently, crucial problems involving propagation losses and in coupling with external circuits have been resolved. Functional devices using silicon wire waveguides are now being tested. In this paper, we describe our recent progress and future prospects on the microphotonics devices based on the silicon-wire waveguiding system.

  • Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET

    Muneo KUSHIMA  Koichi TANNO  Okihiko ISHIZUKA  

     
    LETTER-Analog Signal Processing

      Vol:
    E86-A No:12
      Page(s):
    3294-3296

    In this letter, a linear variable resistor circuit using an FG-MOSFET (floating-gate MOSFET) is proposed. This is based on Schlarmann's variable resistor and is very simple. The advantage of the proposed circuit is a wide-input range. The utility of the proposed circuit was confirmed by HSPICE simulation with 1.2 µm CMOS process parameters. The simulation results are reported in this letter.

201-220hit(390hit)