A novel analog decoding method using only 90-degree phase shifters is proposed to simplify the decoding method for short-range multiple-input multiple-output (MIMO) transmission. In a short-range MIMO transmission, an optimal element spacing that maximizes the channel capacity exists for a given transmit distance between the transmitter and receiver. We focus on the fact that the weight matrix by zero forcing (ZF) at the optimal element spacing can be obtained by using dividers and 90-degree phase shifters because it can be expressed by a unitary matrix. The channel capacity by the proposed method is next derived for the evaluation of the exact limitation of the channel capacity. Moreover, it is shown that an optimal weight when using directional antennas can be expressed by using only dividers, 90-degree phase shifters, and attenuators, regardless of the beam width of the directional antenna. Finally, bit error rate and channel capacity evaluations by both simulation and measurement confirm the effectiveness of the proposed method.

We consider Monte Carlo tree search problem, a variant of Min-Max tree search problem where the score of each leaf is the expectation of some Bernoulli variables and not explicitly given but can be estimated through (random) playouts. The goal of this problem is, given a game tree and an oracle that returns an outcome of a playout, to find a child node of the root which attains an approximate min-max score. This problem arises in two player games such as computer Go. We propose a simple and efficient algorithm for Monte Carlo tree search problem.

In a convex drawing of a plane graph, all edges are drawn as straight-line segments without any edge-intersection and all facial cycles are drawn as convex polygons. In a convex grid drawing, all vertices are put on grid points. A plane graph G has a convex drawing if and only if G is internally triconnected, and an internally triconnected plane graph G has a convex grid drawing on an (n-1)×(n-1) grid if either G is triconnected or the triconnected component decomposition tree T(G) of G has two or three leaves, where n is the number of vertices in G. An internally triconnected plane graph G has a convex grid drawing on a 2n×2n grid if T(G) has exactly four leaves. In this paper, we show that an internally triconnected plane graph G has a convex grid drawing on a 6n×n2 grid if T(G) has exactly five leaves. We also present an algorithm to find such a drawing in linear time. This is the first algorithm that finds a convex grid drawing of such a plane graph G in a grid of polynomial size.

Infrastructure as a Service (IaaS), a form of cloud computing, is gaining attention for its ability to enable efficient server administration in dynamic workload environments. In such environments, however, updating the software stack or content files of virtual machines (VMs) is a time-consuming task, discouraging administrators from frequently enhancing their services and fixing security holes. This is because the administrator has to upload the whole new disk image to the cloud platform via the Internet, which is not yet fast enough that large amounts of data can be transferred smoothly. Although the administrator can apply incremental updates directly to the running VMs, he or she has to carefully consider the type of update and perform operations on all running VMs, such as application restarts. This is a tedious and error-prone task. This paper presents a technique for synchronizing VMs with less time and lower administrative burden. We introduce the Virtual Disk Image Repository, which runs on the cloud platform and automatically updates the virtual disk image and the running VMs with only the incremental update information. We also show a mechanism that performs necessary operations on the running VM such as restarting server processes, based on the types of files that are updated. We implement a prototype on Linux 2.6.31.14 and Amazon Elastic Compute Cloud. An experiment shows that our technique can synchronize VMs in an order-of-magnitude shorter time than the conventional disk-image-based VM method. Also, we discuss limitations of our technique and some directions for more efficient VM updates.

Traditionally, in computer systems, file I/O has been a big performance bottleneck for I/O intensive applications. The recent advent of non-volatile byte-addressable memory (NVM) technologies such as STT-MRAM and PCM, provides a chance to store persistent data with a high performance close to DRAM's. However, as the location of the persistent storage device gets closer to the CPU, the system software layers overheads for accessing the data such as file system layer including virtual file system layer and device driver are no longer negligible. In this paper, we propose a light-weight user-level persistent storage, called UStore, which is physically allocated on the NVM and is mapped directly into the virtual address space of an application. UStore makes it possible for the application to fast access the persistent data without the system software overheads and extra data copy between the user space and kernel space. We show how UStore is easily applied to existing applications with little elaboration and evaluate its performance enhancement through several benchmark tests.

Gait-based owner authentication using accelerometers has recently been extensively studied owing to the development of wearable electronic devices. An actual gait signal is always subject to change due to many factors including variation of sensor attachment. In this research, we tackle to the practical sensor-orientation inconsistency, for which signal sequences are captured at different sensor orientations. We present an iterative signal matching algorithm based on phase-registration technique to simultaneously estimate relative sensor-orientation and register the 3D acceleration signals. The iterative framework is initialized by using 1D orientation-invariant resultant signals which are computed from 3D signals. As a result, the matching algorithm is robust to any initial sensor-orientation. This matching algorithm is used to match a probe and a gallery signals in the proposed owner authentication method. Experiments using actual gait signals under various conditions such as different days, sensors, weights being carried, and sensor orientations show that our authentication method achieves positive results.

A digital background calibration technique using signal-dependent dithering is proposed, to correct the nonlinear errors which results from capacitor mismatches and finite opamp gain in pipelined analog-to-digital converter (ADC). Large magnitude dithers are used to measure and correct both errors simultaneously in background. In the proposed calibration system, the 2.5-bit capacitor-flip-over multiplying digital-to-analog converter (MDAC) stage is modified for the injection of large magnitude dithering by adding six additional comparators, and thus only three correction parameters in every stage subjected to correction were measured and extracted by a simple calibration algorithm with multibit first stage. Behavioral simulation results show that, using the proposed calibration technique, the signal-to-noise-and-distortion ratio improves from 63.3 to 79.3dB and the spurious-free dynamic range is increased from 63.9 to 96.4dB after calibrating the first two stages, in a 14-bit 100-MS/s pipelined ADC with σ=0.2% capacitor mismatches and 60dB nonideal opamp gain. The time of calibrating the first two stages is around 1.34 seconds for the modeled ADC.

We have been developing a superconducting time-of-flight mass spectrometry (TOF-MS) system, which utilizes a superconductive strip ion detector (SSID) and a single-flux-quantum (SFQ) multi-stop time-to-digital converter (TDC). The SFQ multi-stop TDC can measure the time intervals between multiple input signals and directly convert them into binary data. In this study, we designed and implemented 24-bit SFQ multi-stop TDCs with a 3×24-bit FIFO buffer using the AIST Nb standard process (STP2), whose time resolution and dynamic range are 100ps and 1.6ms, respectively. The timing jitter of the TDC was investigated by comparing two types of TDCs: one uses an on-chip SFQ clock generator (CG) and the other uses a microwave oscillator at room temperature. We confirmed the correct operation of both TDCs and evaluated their timing jitter. The experimentally-obtained timing jitter is about 40ns and 700ps for the TDCs with and without the on-chip SFQ CG, respectively, for the measured time interval of 50µs, which linearly increases with increase of the measured time interval.

One of the most important requirements for a routing protocol in wireless body area networks (WBANs) is to lower the network's temperature increase. The temperature of a node is closely related to its activities. The proactive routing approach, which is used by existing routing protocols for WBANs, tends to produce a higher temperature increase due to more frequent activities, compared to the on-demand reactive routing approach. In this paper, therefore, we propose a reactive routing protocol for WBANs called priority-based temperature-aware routing (PTR). In addition to lowering the temperature increase, the protocol also recognizes vital nodes and prioritizes them so they are able to achieve higher throughput. Simulation results show that the PTR protocol achieves a 50% lower temperature increase compared to the conventional temperature-aware routing protocol and is able to improve throughput of vital nodes by 35% when the priority mode is enabled.

Software watermarking is a digital technique used to protect software by embedding some secret information as identification in order to discourage software piracy and unauthorized modification. Watermarking is still a relatively new field and has good potential in protecting software from privacy threats. However, there appears to be a security vulnerability in the watermark trigger behaviour, and has been frequently attacked. By tracing the watermark trigger behaviour, attackers can easily intrude into the software and locate and expose the watermark for modification. In order to address this problem, we propose an algorithm that obscures the watermark trigger behaviour by utilizing buffer overflow. The code of the watermark trigger behaviour is removed from the software product itself, making it more difficult for attackers to trace the software. Experiments show that the new algorithm has promising performance in terms of the imperceptibility of software watermark.

AC conversion has a huge variety of applications and so there are many ongoing research topics as in every type of power electronic conversion. New semiconductors allow the increase of the switching frequency fact that brings a whole new prospective improvement in converter's operation. Many other possible nonlinear operation regimes, including period doubling and chaotic oscillations, appear besides the conventional steady state operation. In this work, a nonlinear discrete-time model of an AC/AC buck type converter is proposed. A discrete time iterative map is derived to highlight the sensitive switching dynamics. The model is able to observe fast scale phenomena and short transient effects. It offers more information compared to other methods such as the averaging ones. According to Electro-Magnetic Compatibility (EMC) regulations, low wide-band noise is more acceptable than the high narrow-band, therefore the goal of this work is to spread the harmonic noise into a wide frequency spectrum which has lower amplitudes compared to the conventional comb-like spectrum with distinctive amplitudes at switching frequency multiples. Through the numerical and experimental consideration the converter can operate in a chaotic motion and the advantages of the performance improvement are also discussed.

This paper proposes a vanishing point-based road detection method. Firstly, a vanishing point is detected using a texture-based method proposed in a recent study. After that, a histogram is generated for detecting two road borders. The road area is defined as the region between the two road borders and below the vanishing point. The experimental results demonstrate that our method performs well in general road images.

In this letter, we research the method of using face and gesture image sequences to deal with the video-based bimodal emotion recognition problem, in which both Harris plus cuboids spatio-temporal feature (HST) and sparse canonical correlation analysis (SCCA) fusion method are applied to this end. To efficaciously pick up the spatio-temporal features, we adopt the Harris 3D feature detector proposed by Laptev and Lindeberg to find the points from both face and gesture videos, and then apply the cuboids feature descriptor to extract the facial expression and gesture emotion features [1],[2]. To further extract the common emotion features from both facial expression feature set and gesture feature set, the SCCA method is applied and the extracted emotion features are used for the biomodal emotion classification, where the K-nearest neighbor classifier and the SVM classifier are respectively used for this purpose. We test this method on the biomodal face and body gesture (FABO) database and the experimental results demonstrate the better recognition accuracy compared with other methods.

The problem of resource allocation to minimize the outage probability for the secondary user (SU) groups in a cognitive radio (CR) multicast network is investigated. We propose a joint power and rate allocation scheme that provides significant improvement over the conventional scheme in terms of outage probability.

In this paper, we propose a new trusted modeling approach based on state graphs. We introduce a novel method of deriving state-layer from a system call sequence in terms of probability and statistics theory, and we identify the state sequence with the help of Hidden Markov Model (HMM). We generate state transition graph according to software executing process and pruning rules. Then, we separate local function graphs according to software specific functions by semantic analysis. The state-layer is a bridge between the basic behaviors and the upper layer functions of software to compensate semantic faults. In addition, a pruning strategy of formulating state graphs is designed to precisely describe each piece of software functions. Finally, a detecting system based on our model is proposed, and a case study of RSS software reveals how our system works. The results demonstrate that our trusted model describes software behaviors successfully and can well detect un-trust behaviors, anomaly behaviors, and illegal input behaviors.

This paper proposes the state observer design for feedforward nonlinear systems with delayed output. It is shown that by using the Lyapunov-Krasovskii functional, the proposed design method ensures the asymptotic stability of estimation error for an arbitrarily large output delay. Finally, an illustrative example is given in order to show the effectiveness of our design method.

Blind source separation is a technique that can separate sound sources without such information as source location, the number of sources, and the utterance content. Multi-channel source separation using many microphones separates signals with high accuracy, even if there are many sources. However, these methods have extremely high computational complexity, which must be reduced. In this paper, we propose a computational complexity reduction method for blind source separation based on frequency domain independent component analysis (FDICA) and examine temporal data that are effective for source separation. A frame with many sound sources is effective for FDICA source separation. We assume that a frame with a low kurtosis has many sound sources and preferentially select such frames. In our proposed method, we used the log power spectrum and the kurtosis of the magnitude distribution of the observed data as selection criteria and conducted source separation experiments using speech signals from twelve speakers. We evaluated the separation performances by the signal-to-interference ratio (SIR) improvement score. From our results, the SIR improvement score was 24.3dB when all the frames were used, and 23.3dB when the 300 frames selected by our criteria were used. These results clarified that our proposed selection criteria based on kurtosis and magnitude is effective. Furthermore, we significantly reduced the computational complexity because it is proportional to the number of selected frames.

This study looks at how an e-Health System can reduce morbidity (poor health) in unreached communities. The e-Health system combines affordable sensors and Body Area Networking technology with mobile health concepts and is called a Portable Health Clinic. The health clinic is portable because all the medical devices fit inside a briefcase and are carried to unreached communities by a healthcare assistants. Patient morbidity is diagnosed using software stratification algorithm and categorized according to triage color-coding scheme within the briefcase. Morbid patients are connected to remote doctor in a telemedicine call center using the mobile network coverage. Electronic Health Records (EHR) are used for the medical consultancy and e-Prescription is generated. The effectiveness of the portable health clinic system to target morbidity was tested on 8690 patients in rural and urban areas of Bangladesh during September 2012 to January 2013. There were two phases to the experiment: the first phase identified the intensity of morbidity and the second phase re-examined the morbid patients, two months later. The experiment results show a decrease in patients to identify as morbid among those who participated in telemedicine process.

We describe a large-scale integrated circuit (LSI) design of rapid single-flux-quantum (RSFQ) circuits and demonstrate several reconfigurable data-path (RDP) processor prototypes based on the ISTEC Advanced Process (ADP2). The ADP2 LSIs are made up of nine Nb layers and Nb/AlOx/Nb Josephson junctions with a critical current density of 10kA/cm2, allowing higher operating frequencies and integration. To realize truly large-scale RSFQ circuits, careful design is necessary, with several compromises in the device structure, logic gates, and interconnects, balancing the competing demands of integration density, design flexibility, and fabrication yield. We summarize numerical and experimental results related to the development of a cell-based design in the ADP2, which features a unit cell size reduced to 30-µm square and up to four strip line tracks in the unit cell underneath the logic gates. The ADP LSIs can achieve ∼10 times the device density and double the operating frequency with the same power consumption per junction as conventional LSIs fabricated using the Nb four-layer process. We report the design and test results of RDP processor prototypes using the ADP2 cell library. The RDP processors are composed of many arrays of floating-point units (FPUs) and switch networks, and serve as accelerators in a high-performance computing system. The prototypes are composed of two-dimensional arrays of several arithmetic logic units instead of FPUs. The experimental results include a successful demonstration of full operation and reconfiguration in a 2×2 RDP prototype made up of 11.5k junctions at 45GHz after precise timing design. Partial operation of a 4×4 RDP prototype made up of 28.5k-junctions is also demonstrated, indicating the scalability of our timing design.

Voltage multiplier (VM) circuits for RF (2.45GHz)-to-DC conversion are developed for battery-less sensor nodes. Converted DC power is charged on a storage capacitor before driving a wireless sensor module. A charging time of the storage capacitor of the proposed VM circuits is reduced 1/10 of the conventional VM circuits, because they have constant current characteristics owing to self-control of body bias in diode-connected SOI MOSFETs. The wireless sensor system composed of the fabricated VM chip and a commercially available sensor module is operated using an RF signal of a wireless LAN modem (2.45GHz) as a power source.