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  • A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation

    Norihiro KAMAE  Akira TSUCHIYA  Hidetoshi ONODERA  

     
    PAPER

      Vol:
    E97-A No:3
      Page(s):
    734-740

    A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.

  • Comprehensive Performance Analysis of Two-Way Multi-Relay System with Amplify-and-Forward Relaying

    Siye WANG  Yanjun ZHANG  Bo ZHOU  Wenbiao ZHOU  Dake LIU  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E97-B No:3
      Page(s):
    666-673

    In this paper, we consider a two-way multi-relay scenario and analyze the bit error rate (BER) and outage performance of an amplify-and-forward (AF) relaying protocol. We first investigate the bit error probability by considering channel estimation error. With the derivation of effective signal-to-noise ratio (SNR) at the transceiver and its probability density function (PDF), we can obtain a closed form formulation of the total average error probability of two-way multi-relay system. Furthermore, we also derive exact expressions of the outage probability for two-way relay through the aid of a modified Bessel function. Finally, numerical experiments are performed to verify the analytical results and show that our theoretical derivations are exactly matched with simulations.

  • The Impact of Opportunistic User Scheduling on Outage Probability of CR-MIMO Systems

    Donghun LEE  Byung Jang JEONG  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E97-B No:3
      Page(s):
    686-690

    In this paper, we study the impact of opportunistic user scheduling on the outage probability of cognitive radio (CR) multiple-input multiple-output (MIMO) systems in the high power region where the peak transmit power constraint is higher than the peak interference constraint. The primary contributions of this paper are the derivation of exact closed-form expressions of the proposed scheduled CR-MIMO systems for outage probability and asymptotic analysis to quantify the diversity order and signal to noise ratio (SNR) gain. Through exact analytical results, we provide the achievable outage probability of the proposed scheduled systems as a function of SNR. Also, through asymptotic analysis, we show that the scheduled CR-MIMO systems provide some diversity order gain over the non-scheduled CR-MIMO systems which comes from multi-user diversity (MUD). Also, the SNR gain of the proposed scheduled systems is identical to that of the non-scheduled CR-MIMO systems.

  • High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology

    Masamitsu TANAKA  Atsushi KITAYAMA  Masakazu OKADA  Tomohito KOUKETSU  Takumi TAKINAMI  Masato ITO  Akira FUJIMAKI  

     
    PAPER

      Vol:
    E97-C No:3
      Page(s):
    166-172

    We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.

  • SOI CMOS Voltage Multiplier Circuits with Body Bias Control Technique for Battery-Less Wireless Sensor System

    Yasushi IGARASHI  Tadashi CHIBA  Shin-ichi O'UCHI  Meishoku MASAHARA  Kunihiro SAKAMOTO  

     
    PAPER

      Vol:
    E97-A No:3
      Page(s):
    741-748

    Voltage multiplier (VM) circuits for RF (2.45GHz)-to-DC conversion are developed for battery-less sensor nodes. Converted DC power is charged on a storage capacitor before driving a wireless sensor module. A charging time of the storage capacitor of the proposed VM circuits is reduced 1/10 of the conventional VM circuits, because they have constant current characteristics owing to self-control of body bias in diode-connected SOI MOSFETs. The wireless sensor system composed of the fabricated VM chip and a commercially available sensor module is operated using an RF signal of a wireless LAN modem (2.45GHz) as a power source.

  • Joint Power and Rate Allocation in Cognitive Radio Multicast Networks for Outage Probability Minimization

    Ding XU  Qun LI  

     
    LETTER-Communication Theory and Signals

      Vol:
    E97-A No:3
      Page(s):
    904-906

    The problem of resource allocation to minimize the outage probability for the secondary user (SU) groups in a cognitive radio (CR) multicast network is investigated. We propose a joint power and rate allocation scheme that provides significant improvement over the conventional scheme in terms of outage probability.

  • Enhanced Cycle-Conserving Dynamic Voltage Scaling for Low-Power Real-Time Operating Systems

    Min-Seok LEE  Cheol-Hoon LEE  

     
    PAPER-Software System

      Vol:
    E97-D No:3
      Page(s):
    480-487

    For battery based real-time embedded systems, high performance to meet their real-time constraints and energy efficiency to extend battery life are both essential. Real-Time Dynamic Voltage Scaling (RT-DVS) has been a key technique to satisfy both requirements. This paper presents EccEDF (Enhanced ccEDF), an efficient algorithm based on ccEDF. ccEDF is one of the most simple but efficient RT-DVS algorithms. Its simple structure enables it to be easily and intuitively coupled with a real-time operating system without incurring any significant cost. ccEDF, however, overlooks an important factor in calculating the available slacks for reducing the operating frequency. It calculates the saved utilization simply by dividing the slack by the period without considering the time needed to run the task. If the elapsed time is considered, the maximum utilization saved by the slack on completion of the task can be found. The proposed EccEDF can precisely calculate the maximum unused utilization with consideration of the elapsed time while keeping the structural simplicity of ccEDF. Further, we analytically establish the feasibility of EccEDF using the fluid scheduling model. Our simulation results show that the proposed algorithm outperforms ccEDF in all simulations. A simulation shows that EccEDF consumes 27% less energy than ccEDF.

  • Secrecy Capacity and Outage Performance of Correlated Fading Wire-Tap Channel

    Jinxiao ZHU  Yulong SHEN  Xiaohong JIANG  Osamu TAKAHASHI  Norio SHIRATORI  

     
    PAPER-Fundamental Theories for Communications

      Vol:
    E97-B No:2
      Page(s):
    396-407

    The fading channel model is seen as an important approach that can efficiently capture the basic time-varying properties of wireless channels, while physical layer security is a promising approach to providing a strong form of security. This paper focuses on the fundamental performance study of applying physical layer security to achieve secure and reliable information transmission over the fading wire-tap channel. For the practical scenario where the main channel is correlated with the eavesdropper channel but only the real time channel state information (CSI) of the main channel is known at the transmitter, we conduct a comprehensive study on the fundamental performance limits of this system by theoretically modeling its secrecy capacity, transmission outage probability and secrecy outage probability. With the help of these theoretical models, we then explore the inherent performance tradeoffs under fading wire-tap channel and also the potential impact of channel correlation on such tradeoffs.

  • Efficient Pedestrian Detection Using Multi-Scale HOG Features with Low Computational Complexity

    Soojin KIM  Kyeongsoon CHO  

     
    LETTER-Pattern Recognition

      Vol:
    E97-D No:2
      Page(s):
    366-369

    In this paper, an efficient method to reduce computational complexity for pedestrian detection is presented. Since trilinear interpolation is not used, the amount of required operations for histogram of oriented gradient (HOG) feature calculation is significantly reduced. By calculating multi-scale HOG features with integral HOG in a two-stage approach, both high detection rate and speed are achieved in the proposed method.

  • Design of Miniature Implantable Tag Antenna for Radio-Frequency Identification System at 2.45GHz and Received Power Analysis

    HoYu LIN  Masaharu TAKAHASHI  Kazuyuki SAITO  Koichi ITO  

     
    PAPER-Antennas and Propagation

      Vol:
    E97-B No:1
      Page(s):
    129-136

    In recent years, there has been rapid developments in radio-frequency identification (RFID) systems, and their industrial applications include logistics management, automatic object identification, access and parking management, etc. Moreover, RFID systems have also been introduced for the management of medical instruments in medical applications to improve the quality of medical services. In recent years, the combination of such a system with a biological monitoring system through permanent implantation in the human body has been suggested to reduce malpractice events and ameliorate the patient suffering. This paper presents an implantable RFID tag antenna design that can match the conjugate impedance of most integrated circuit (IC) chips (9.3-j55.2Ω at 2.45GHz. The proposed antenna can be injected into the human body through a biological syringe, owing to its compact size of 9.3mm × 1.0mm × 1.0mm. The input impedance, transmission coefficient, and received power are simulated by a finite element method (FEM). A three-layered phantom is used to confirm antenna performance.

  • Floorplan Driven Architecture and High-Level Synthesis Algorithm for Dynamic Multiple Supply Voltages

    Shin-ya ABE  Youhua SHI  Kimiyoshi USAMI  Masao YANAGISAWA  Nozomu TOGAWA  

     
    PAPER-High-Level Synthesis and System-Level Design

      Vol:
    E96-A No:12
      Page(s):
    2597-2611

    In this paper, we propose an adaptive voltage huddle-based distributed-register architecture (AVHDR architecture), which integrates dynamic multiple supply voltages and interconnection delay into high-level synthesis. In AVHDR architecture, voltages can be dynamically assigned for energy reduction. In other words, low supply voltages are assigned to non-critical operations, and leakage power is cut off by turning off the power supply to the sleeping functional units. Next, an AVHDR-based high-level synthesis algorithm is proposed. Our algorithm is based on iterative improvement of scheduling/binding and floorplanning. In the iteration process, the modules in each huddle can be placed close to each other and the corresponding AVHDR architecture can be generated and optimized with floorplanning information. Experimental results show that on average our algorithm achieves 43.9% energy-saving compared with conventional algorithms.

  • A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier

    Hyunui LEE  Masaya MIYAHARA  Akira MATSUZAWA  

     
    PAPER-Circuit Design

      Vol:
    E96-A No:12
      Page(s):
    2508-2515

    This paper presents a 12-bit interpolated pipeline analog to digital converter (ADC) using body voltage controlled amplifier for current biasing and common mode feedback (CMFB). The proposed body voltage control method allows the amplifier to achieve small power consumption and large output swing. The proposed amplifier has a power consumption lower than 15.6mW, almost half of the folded cascode amplifier satisfying 12-bit, 400MS/s ADC operation. Moreover, the proposed amplifier secures 600mV output swing, which is one drain source voltage (VDS) wider compared with the telescopic amplifier. The 12-bit interpolated pipeline ADC using the proposed amplifier is fabricated in a 1P9M 90nm CMOS technology with a 1.2V supply voltage. The ADC achieves an effective number of bit (ENOB) of about 10-bit at 300MS/s and an figure of merit (FoM) of 0.2pJ/conv. when the frequency of the input signal is sufficiently low.

  • Photo-Induced Threshold and Onset Voltage Shifts in Organic Thin-Film Transistors Open Access

    Ichiro FUJIEDA  Tse Nga NG  Tomoya HOSHINO  Tomonori HANASAKI  

     
    INVITED PAPER

      Vol:
    E96-C No:11
      Page(s):
    1360-1366

    We have studied photo-induced effects in a p-type transistor based on a [1]benzothieno[3,2-b]benzothiophene (BTBT) derivative. Repetition of blue light irradiation and electrical characterization under dark reveals that its threshold voltage gradually shifts in the positive direction as the cumulative exposure time increases. This shift is slowly reversed when the transistor is stored under dark. The onset voltage defined as the gate bias at which the sub-threshold current exceeds a certain level behaves in a similar manner. Mobility remains more or less the same during this exposure period and the storage period. Time evolution of the threshold voltage shift is fit by a model assuming two charged meta-stable states decaying independently. A set of parameters consists of a decay constant for each state and the ratio of the two states. A single parameter set reproduces the positive shift during the exposure period and the negative shift during the storage period. Time evolution of the onset voltage is reproduced by the same parameter set. We have also studied photo-induced effects in two types of n-type transistors where either a pure solution of a perylene derivative or a solution mixed with an insulating polymer is used for printing each semiconductor layer. A similar behavior is observed for these transistors: blue light irradiation under a negative gate bias shifts the threshold and the onset voltages in the negative direction and these shifts are reversed under dark. The two-component model reproduces the behavior of these voltage shifts and the parameter set is slightly different among the two transistors made from different semiconductor solutions. The onset voltage shift is well correlated to the threshold voltage shift for the three types of organic transistors studied here. The onset voltage is more sensitive to illumination than the threshold voltage and its sensitivity differs among transistors.

  • Outage Performance Analysis of a Multiuser Two-Way Relaying Network with Feedback Delay

    Jie YANG  Xiaofei ZHANG  Kai YANG  

     
    LETTER-Communication Theory and Signals

      Vol:
    E96-A No:10
      Page(s):
    2052-2056

    The outage performance of a multiuser two-way amplify-and-forward (AF) relaying network, where N-th best selection scheme with the consideration to the feedback delay, is investigated. Specifically, the new closed-form expressions for cumulative distribution function (CDF) and outage probability (OP) are presented over time varying Rayleigh-fading channels. Furthermore, simple approximate OP is derived assessing the high signal-to-noise-ratio (SNR), which identifies the diversity behavior. Numerical results show excellent agreement with theoretical results.

  • Multi-Stage Automatic NE and PoS Annotation Using Pattern-Based and Statistical-Based Techniques for Thai Corpus Construction

    Nattapong TONGTEP  Thanaruk THEERAMUNKONG  

     
    PAPER-Natural Language Processing

      Vol:
    E96-D No:10
      Page(s):
    2245-2256

    Automated or semi-automated annotation is a practical solution for large-scale corpus construction. However, the special characteristics of Thai language, such as lack of word-boundary and sentence-boundary markers, trigger several issues in automatic corpus annotation. This paper presents a multi-stage annotation framework, containing two stages of chunking and three stages of tagging. The two chunking stages are pattern matching-based named entity (NE) extraction and dictionary-based word segmentation while the three succeeding tagging stages are dictionary-, pattern- and statist09812490981249ical-based tagging. Applying heuristics of ambiguity priority, NE extraction is performed first on an original text using a set of patterns, in the order of pattern ambiguity. Next, the remaining text is segmented into words with a dictionary. The obtained chunks are then tagged with types of named entities or parts-of-speech (PoS) using dictionaries, patterns and statistics. Focusing on the reduction of human intervention in corpus construction, our experimental results show that the dictionary-based tagging process can assign unique tags to 64.92% of the words, with the remaining of 24.14% unknown words and 10.94% ambiguously tagged words. Later, the pattern-based tagging can reduce unknown words to only 13.34% while the statistical-based tagging can solve the ambiguously tagged words to only 3.01%.

  • Opportunistic Feedback and User Selection for Multiuser Two-Way Amplify-and-Forward Relay in Time-Varying Channels

    Yong-Up JANG  Eui-Rim JEONG  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E96-B No:10
      Page(s):
    2661-2667

    This paper proposes an opportunistic feedback and user selection method for a multiuser two-way relay channel (MU-TWRC) in a time-varying environments where a base station (BS) and a selected mobile station (MS), one of K moving MSs, exchange messages during two time slots via an amplify-and-forward relay station. Specifically, under the assumption of perfect channel reciprocity, we analyze the outage probabilities of several channel feedback scenarios, including the proposed scheme. Based on the analysis, the transmission rates are optimized and the optimal user selection method is proposed to maximize the expected sum throughput. The simulation results indicate that, with opportunistic feedback, the performance can be significantly improved compared to that without feedback. Moreover, the performance is nearly identical to that with full feedback, and close to the case of perfect channel state information at BS for low mobility MSs.

  • A 24GHz Transformer Coupled CMOS VCO for a Wide Linear Tuning Range

    Jae-Hoon SONG  Byung-Sung KIM  Sangwook NAM  

     
    BRIEF PAPER-Electronic Circuits

      Vol:
    E96-C No:10
      Page(s):
    1348-1350

    In this paper, a 24GHz transformer-coupled VCO is presented for a wide linear tuning range in the 0.13-µm CMOS process. The measured results of the proposed VCO show that the center frequency is 23.5GHz with 7.4% frequency tuning range. The output frequency curve has wide linear tuning region (5.5%) at the middle of the curve. Also, the VCO exhibits good phase noise of -110.23dBc/Hz at an offset frequency of 1 MHz. It has a compact chip size of 430 × 500µm2. The VCO core DC power consumption is 5.4mW at 1.35V VDD.

  • A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design

    Li-Rong WANG  Kai-Yu LO  Shyh-Jye JOU  

     
    BRIEF PAPER-Electronic Circuits

      Vol:
    E96-C No:10
      Page(s):
    1351-1355

    This paper proposes a new double-edge-triggered implicitly level-converting flip-flop, suitable for a low-power and low-voltage design. The design employs a sense amplifier architecture to reduce the delay and power consumption. Experimentally, when implemented with a 130-nm, single-Vt and 0.84V VDD process, it achieves 64% power-delay product (PDP) improvement, and moreover, 78% PDP improvement when implemented with a mixed-Vt technology, as compared to that of the classic double-edge-triggered flip-flop design.

  • Performance Analysis of a Two-Way Relay Network with Multiple Interferers

    Dongwook CHOI  Jae Hong LEE  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E96-B No:10
      Page(s):
    2668-2675

    This paper analyzes the performance of a two-way relay network experiencing co-channel interference from multiple interferers due to aggressive frequency reuse in cellular networks. We discuss two different scenarios: Outages are declared individually for each user (individual outage) and an outage is declared simultaneously for all users (common outage). We derive the closed-form expressions for the individual and common outage probabilities of the two-way relay network with multiple interferers. The validity of our analytical results is verified by a comparison with simulation results. It is shown that the analytical results perfectly match the simulation results of the individual and common outage probabilities. Also, it is shown that the individual and common outage probabilities increase as the number of interferers increases.

  • An Efficient Hybrid Cryptographic Scheme for Wireless Sensor Network with Network Coding

    Man LIANG  Haibin KAN  

     
    LETTER-Cryptography and Information Security

      Vol:
    E96-A No:9
      Page(s):
    1889-1894

    Wireless sensor network (WSN) using network coding is vulnerable to pollution attacks. Existing authentication schemes addressing this attack either burden the sensor node with a higher computation overhead, or fail to provide an efficient way to mitigate two recently reported attacks: tag pollution attacks and repetitive attacks, which makes them inapplicable to WSN. This paper proposes an efficient hybrid cryptographic scheme for WSN with securing network coding. Our scheme can resist not only normal pollution attacks, but the emerging tag pollution and repetitive attacks in an efficient way. In particular, our scheme is immediately suited for distributing multiple generations using a single public key. Experimental results show that our scheme can significantly improve the computation efficiency at a sensor node under the two above-mentioned attacks.

181-200hit(917hit)