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[Keyword] PAS(566hit)

301-320hit(566hit)

  • A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems

    Osamu WATANABE  Rui ITO  Shigehito SAIGUSA  Tadashi ARAI  Tetsuro ITAKURA  

     
    PAPER

      Vol:
    E90-C No:6
      Page(s):
    1247-1252

    A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.

  • A Study to Realize a 1-V Operational Passive Σ-Δ Modulator by Using a 90 nm CMOS Process

    Toru CHOI  Tatsuya SAKAMOTO  Yasuhiro SUGIMOTO  

     
    LETTER

      Vol:
    E90-C No:6
      Page(s):
    1304-1306

    A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.

  • Challenges in Designing CMOS Wireless Systems-on-a-Chip

    Masoud ZARGARI  David SU  

     
    INVITED PAPER

      Vol:
    E90-C No:6
      Page(s):
    1142-1148

    Over the past ten years, the demand for low-cost, low-power, and small form-factor portable wireless devices has led to the integration of RF transceivers on the same silicon as digital processors to form wireless systems-on-a-chip. This paper describes the challenges in designing CMOS systems-on-a-chip for wireless communications. RF transceiver building blocks for signal amplification, frequency translation, and frequency selectivity are examined with special emphasis on low noise amplifiers, power amplifiers, mixers, and frequency synthesizers. System-on-a-chip integration issues such as leakage currents of digital logic, calibration techniques, and noise coupling are also discussed.

  • A Second-Order Multibit Complex Bandpass ΔΣAD Modulator with I, Q Dynamic Matching and DWA Algorithm

    Hao SAN  Yoshitaka JINGU  Hiroki WADA  Hiroyuki HAGIWARA  Akira HAYAKAWA  Haruo KOBAYASHI  Tatsuji MATSUURA  Kouichi YAHAGI  Junya KUDOH  Hideo NAKANE  Masao HOTTA  Toshiro TSUKADA  Koichiro MASHIKO  Atsushi WADA  

     
    PAPER

      Vol:
    E90-C No:6
      Page(s):
    1181-1188

    We have designed, fabricated and measured a second-order multibit switched-capacitor complex bandpass ΔΣAD modulator to evaluate our new algorithms and architecture. We propose a new structure of a complex bandpass filter in the forward path with I, Q dynamic matching, that is equivalent to the conventional one but can be divided into two separate parts. As a result, the ΔΣ modulator, which employs our proposed complex filter can also be divided into two separate parts, and there are no signal lines crossing between the upper and lower paths formed by complex filters and feedback DACs. Therefore, the layout design of the modulator can be simplified. The two sets of signal paths and circuits in the modulator are changed between I and Q while CLK is changed between high and low by adding multiplexers. Symmetric circuits are used for I and Q paths at a certain period of time, and they are switched by multiplexers to those used for Q and I paths at another period of time. In this manner, the effect of mismatches between I and Q paths is reduced. Two nine-level quantizers and four DACs are used in the modulator for low-power implementations and higher signal-to-noise-and-distortion (SNDR), but the nonlinearities of DACs are not noise-shaped and the SNDR of the ΔΣAD modulator degrades. We have also employed a new complex bandpass data-weighted averaging (DWA) algorithm to suppress nonlinearity effects of multibit DACs in complex form to achieve high accuracy; it can be realized by just adding simple digital circuitry. To evaluate these algorithms and architecture, we have implemented a modulator using 0.18 µm CMOS technology for operation at 2.8 V power supply; it achieves a measured peak SNDR of 64.5 dB at 20 MS/s with a signal bandwidth of 78 kHz while dissipating 28.4 mW and occupying a chip area of 1.82 mm2. These experimental results demonstrate the effectiveness of the above two algorithms, and the algorithms may be extended to other complex bandpass ΔΣAD modulators for application to low-IF receivers in wireless communication systems.

  • Design and Analysis of Scalable WDM-Based Ethernet Hybrid-PON Architecture

    Tae-Yeon KIM  NamUk KIM  Sang-Ho LEE  Jeong-Ju YOO  Byong-Whi KIM  

     
    PAPER

      Vol:
    E90-B No:5
      Page(s):
    1032-1041

    To overcome the demerits of two passive optical networks; the small link capacity of the TDM-PON, and the ineffective link utilization of the WDM-PON; we propose a novel access network architecture featuring a WDM-based feeder network and a TDM-based distribution network. In this paper, we examine the design issues of the key constituent of SWE-PON (Scalable WDM-based Ethernet hybrid-PON) to validate its economic and practical feasibility. For flawless network operation, the wavelength tuning rule is investigated so that it does not collide between wavelengths from the tunable lasers belonging to the WDM coupler. Also, the potential problem between the tunable laser and the reflective operational device is analyzed in detail. From the numerical analysis and simulation, we demonstrate the variation of the network performance in terms of the upstream traffic delay and throughput of the ONU in accordance with the sharing structure of distribution network and the number of tunable laser devices (TLDs) at the feeder network.

  • Semi-Irregular LDPC Codes Used in MBC

    Rong SUN  Arika FUKUDA  Kaiji MUKUMOTO  Xinmei WANG  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E90-B No:4
      Page(s):
    998-1000

    Based on the channel properties of of the meteor burst communication, a kind of semi-irregular LDPC codes suitable for MBC is presented. Simulation results show that the application of this kind of semi-irregular LDPC codes in MBC yields better performance than the regular ones. Some theoretical analyses are given.

  • Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation

    Masaaki IIJIMA  Masayuki KITAMURA  Masahiro NUMA  Akira TADA  Takashi IPPOSHI  Shigeto MAEGAWA  

     
    PAPER-Digital

      Vol:
    E90-C No:4
      Page(s):
    666-674

    In this paper, we propose an Active Body-biasing Controlled (ABC)-Bootstrap PTL (Pass-Transistor Logic) on PD-SOI for ultra low power design. Although simply lowering the supply voltage (VDD) causes a lack of driving power, our boosted voltage scheme employing a strong capacitive coupling with ABC-SOI improves a driving power and allows lower voltage operation. We also present an SOI-SRAM design boosting the word line (WL) voltage higher than VDD in short transition time without dual power supply rails. Simulation results have shown improvement in both the delay time and power consumption.

  • Performance Analysis of IPACT Media Access Control Protocols for Gigabit Ethernet-PONs

    Jaeyong LEE  Byungchul KIM  Jihye SHIN  

     
    PAPER-Fiber-Optic Transmission for Communications

      Vol:
    E90-B No:4
      Page(s):
    845-855

    In this paper, we examine the Interleaved Polling with Adaptive Cycle Time (IPACT) that was proposed to control upstream traffic for Gigabit Ethernet-PONs, a promising technology for the Fiber To The Home (FTTH). We analyzed the performance for the gated service and the limited service mathematically. To do this, the IPACT protocol was modeled as a polling system and analyzed by using mean-value analysis technique. The traffic arrival rate λ was divided into three regions, and each region was analyzed separately and merged appropriately by using an interpolation method. The average packet delay, average queue size, and average cycle time of both the gated service and the limited service were obtained through the analysis. In order to evaluate the accuracy of the mathematical analysis, discrete event simulation was performed for the IPACT protocol. Simulation results show the accuracy of the mathematical analysis. The analysis results can be widely used in the design of the FTTH system based on EPON, as the performance results in the present study can be obtained in a rather short time. We can design an appropriate system depending on various traffic conditions by adjusting system parameters, such as the number of users N, the maximum transfer window WMAX, and so on.

  • Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology

    Hiroyuki ITO  Hideyuki SUGITA  Kenichi OKADA  Tatsuya ITO  Kazuhisa ITOI  Masakazu SATO  Ryozo YAMAUCHI  Kazuya MASU  

     
    LETTER-Microwaves, Millimeter-Waves

      Vol:
    E90-C No:3
      Page(s):
    641-643

    This paper proposes high-Q distributed constant passive devices using wafer-level chip scale package (WL-CSP) technology, which can be realized on a Si CMOS chip. A 90directional coupler using the WL-CSP technology has center frequency of 25.6 GHz, insertion loss of -0.5 dB and isolation of -29.8 dB in the measurement result. The WL-CSP technology contributes to realize low-loss RF passive devices on Si CMOS chip, which is indispensable to achieve small-size, cost-effective and low-power monolithic wireless communication circuits (MWCCs).

  • Comments on Modified User Friendly Remote Authentication Scheme with Smart Cards

    Eun-Jun YOON  Kee-Young YOO  

     
    LETTER-Fundamental Theories for Communications

      Vol:
    E90-B No:2
      Page(s):
    331-333

    Recently, Wu-Chieu proposed an improvement to their original scheme, in order to make the scheme withstand impersonation attacks. However, the improved scheme is susceptible to an off-line password guessing attack and is inefficiently designed. Accordingly, the current letter demonstrates the vulnerability of Wu-Chieu's modified scheme to an off-line password guessing attack and evaluates the efficiency of their schemes and related schemes.

  • An Efficient and Leakage-Resilient RSA-Based Authenticated Key Exchange Protocol with Tight Security Reduction

    SeongHan SHIN  Kazukuni KOBARA  Hideki IMAI  

     
    PAPER-Information Security

      Vol:
    E90-A No:2
      Page(s):
    474-490

    Both mutual authentication and generation of session keys can be accomplished by an authenticated key exchange (AKE) protocol. Let us consider the following situation: (1) a client, who communicates with many different servers, remembers only one password and has insecure devices (e.g., mobile phones or PDAs) with very-restricted computing power and built-in memory capacity; (2) the counterpart servers have enormous computing power, but they are not perfectly secure against various attacks (e.g., virus or hackers); (3) neither PKI (Public Key Infrastructures) nor TRM (Tamper-Resistant Modules) is available. The main goal of this paper is to provide security against the leakage of stored secrets as well as to attain high efficiency on client's side. For those, we propose an efficient and leakage-resilient RSA-based AKE (RSA-AKE) protocol suitable for the above situation whose authenticity is based on password and another secret. In the extended model where an adversary is given access to the stored secret of client, we prove that its security of the RSA-AKE protocol is reduced tightly to the RSA one-wayness in the random oracle model. We also show that the RSA-AKE protocol guarantees several security properties (e.g., security of password, multiple sever scenario with only one password, perfect forward secrecy and anonymity). To our best knowledge, the RSA-AKE protocol is the most efficient, in terms of both computation costs of client and communication costs, over the previous AKE protocols of their kind (using password and RSA).

  • Improved Design of Thermal-Via Structures and Circuit Parameters for Advanced Collector-Up HBTs as Miniature High-Power Amplifiers

    Hsien-Cheng TSENG  Pei-Hsuan LEE  Jung-Hua CHOU  

     
    LETTER-Microwaves, Millimeter-Waves

      Vol:
    E90-C No:2
      Page(s):
    539-542

    An improved methodology, based on the genetic algorithm, is developed to design thermal-via structures and circuit parameters of advanced InGaP and InGaAs collector-up heterojunction bipolar transistors (C-up HBTs), which are promising miniature high-power amplifiers (HPAs) in cellular communication systems. Excellent simulated and measured results demonstrate the usefulness of this technique.

  • Minimum Credit Method for Dynamic Bandwidth Allocation in EPON

    Man-Soo HAN  Bin-Young YUN  Bongtae KIM  

     
    LETTER-Fiber-Optic Transmission for Communications

      Vol:
    E90-B No:2
      Page(s):
    349-353

    We suggest a new minimum credit method for the dynamic bandwidth allocation in EPON. In the suggested method, to eliminate the unused transmission time-slot, each ONU requests no more than a predetermined maximum. We analyze the upstream channel resource wastage when traffic is light. Based on the analysis, we derive a minimum credit that eliminate the upstream channel resource wastage. The OLT estimates a traffic load and grants a minimum credit when the request is smaller than the minimum credit and traffic is light. Using simulation, we show the minimum credit discipline is superior than the existing methods in the mean delay and the frame loss rate.

  • Mitigating Dictionary Attacks with Text-Graphics Character CAPTCHAs

    Chanathip NAMPREMPRE  Matthew N. DAILEY  

     
    PAPER-Application

      Vol:
    E90-A No:1
      Page(s):
    179-186

    We propose a new construct, the Text-Graphics Character (TGC) CAPTCHA, for preventing dictionary attacks against password authentication systems allowing remote access via dumb terminals. Password authentication is commonly used for computer access control. But password authentication systems are prone to dictionary attacks, in which attackers repeatedly attempt to gain access using the entries in a list of frequently-used passwords. CAPTCHAs (Completely Automated Public Turing tests to tell Computers and Humans Apart) are currently being used to prevent automated "bots" from registering for email accounts. They have also been suggested as a means for preventing dictionary attacks. However, current CAPTCHAs are unsuitable for text-based remote access. TGC CAPTCHAs fill this gap. In this paper, we define two TGC CAPTCHAs and incorporate one of them in a prototype based on the SSH (Secure Shell) protocol suite. We also prove that, if a TGC CAPTCHA is easy for humans and hard for machines, then the resulting CAPTCHA is secure. We provide empirical evidence that our TGC CAPTCHAs are indeed easy for humans and hard for machines through a series of experiments. We believe that a system exploiting a TGC CAPTCHA will not only help improve the security of servers allowing remote terminal access, but also encourage a healthy spirit of competition in the fields of pattern recognition, computer graphics, and psychology.

  • Security Analysis of a Nonce-Based User Authentication Scheme Using Smart Cards

    Junghyun NAM  Seungjoo KIM  Sangjoon PARK  Dongho WON  

     
    LETTER-Information Security

      Vol:
    E90-A No:1
      Page(s):
    299-302

    A remote user authentication scheme is a two-party protocol whereby an authentication server in a distributed system confirms the identity of a remote individual logging on to the server over an untrusted, open network. Recently, Lee et al. have proposed an efficient nonce-based scheme for remote user authentication using smart cards. This work reviews Lee et al.'s authentication scheme and provides a security analysis on the scheme. Our analysis shows that Lee et al.'s scheme does not achieve its basic aim of authenticating remote users and furthermore has a very hazardous method for changing passwords. In addition, we recommend some changes to the scheme so that it can attain at least its main security goal.

  • Universally Composable Hierarchical Hybrid Authenticated Key Exchange

    Haruki OTA  Kazuki YONEYAMA  Shinsaku KIYOMOTO  Toshiaki TANAKA  Kazuo OHTA  

     
    PAPER-Protocols

      Vol:
    E90-A No:1
      Page(s):
    139-151

    Password-based authenticated key exchange protocols are more convenient and practical, since users employ human-memorable passwords that are simpler to remember than cryptographic secret keys or public/private keys. Abdalla, Fouque, and Pointcheval proposed the password-based authenticated key exchange protocol in a 3-party model (GPAKE) in which clients trying to establish a secret do not share a password between themselves but only with a trusted server. On the other hand, Canetti presented a general framework, which is called universally composable (UC) framework, for representing cryptographic protocols and analyzing their security. In this framework, the security of protocols is maintained under a general protocol composition operation called universal composition. Canetti also proved a UC composition theorem, which states that the definition of UC-security achieves the goal of concurrent general composition. A server must manage all the passwords of clients when the 3-party password-based authenticated key exchange protocols are realized in large-scale networks. In order to resolve this problem, we propose a hierarchical hybrid authenticated key exchange protocol (H2AKE). In H2AKE, forwarding servers are located between each client and a distribution server, and the distribution server sends the client an authentication key via the forwarding servers. In H2AKE, public/private keys are used between servers, while passwords are also used between clients and forwarding servers. Thus, in H2AKE, the load on the distribution server can be distributed to the forwarding servers concerning password management. In this paper, we define hierarchical hybrid authenticated key exchange functionality. H2AKE is the universal form of the hierarchical (hybrid) authenticated key exchange protocol, which includes a 3-party model, and it has the characteristic that the construction of the protocol can flexibly change according to the situation. We also prove that H2AKE is secure in the UC framework with the security-preserving composition property.

  • Analysis of Throughput in M-WDMA MAC Protocol for WDMA Networks

    Changho YUN  Tae-Sik CHO  Kiseon KIM  

     
    LETTER-Network

      Vol:
    E90-B No:1
      Page(s):
    156-159

    Multimedia Wavelength Division Multiple Access (M-WDMA) specially designed to accommodate multimedia traffic is a well-known media access control (MAC) protocol. This paper extensively analyzes the throughput of M-WDMA. Specifically, this analysis considers a wide range of network conditions including varying traffic loads, probabilistic occupancy of time segment, various traffic distribution patterns (TDPs) and channel sharing methods (CSMs) under both symmetric and asymmetric traffic load patterns (TLPs). Thus, the analytic behavior of M-WDMA can be investigated for designing a WDMA network managing multimedia traffic under practical environments.

  • OFDM Error Vector Magnitude Distortion Analysis

    Shingo YAMANOUCHI  Kazuaki KUNIHIRO  Hikaru HIDA  

     
    PAPER-Active Circuits/Devices/Monolithic Microwave Integrated Circuits

      Vol:
    E89-C No:12
      Page(s):
    1836-1842

    We derived explicit formulas for evaluating the error vector magnitude (EVM) from the amplitude distortion (AM-AM) and phase distortion (AM-PM) of power amplifiers (PAs) in orthogonal frequency-division multiplexing (OFDM) systems, such as the IEEE 802.11a/g wireless local area networks (WLANs) standards. We demonstrated that the developed formulas allowed EVM simulation of a memoryless PA using only a single-tone response (i.e. without OFDM modulation and demodulation), thus enabling us to easily simulate the EVM using a harmonic-balance (HB) simulator. This HB simulation technique reduced the processing time required to simulate the EVM of a PA for the IEEE 802.11a standard by a factor of ten compared to a system-level (SL) simulation. We also demonstrated that the measured EVM of a PA module for the IEEE 802.11g could accurately be predicted by applying the measured static AM-AM and AM-PM characteristics to the derived formulas.

  • Implementation of S-Parameter of Active Elements for FDTD Analysis

    Naobumi MICHISHITA  Takashi HIBINO  Hiroyuki ARAI  

     
    PAPER-Passive Circuits/Components

      Vol:
    E89-C No:12
      Page(s):
    1843-1850

    In the design of an active integrated antenna, it is necessary to analyze problems such as unwanted emissions or mutual coupling between elements. In this paper, we clarify the problems in implementing S-parameters for an FDTD analysis. Cubic spline interpolation is suitable for the construction of the S-parameter data. The implementation methods of terminal resistors and vias are examined. The proposed FDTD analysis becomes stable after correcting the discrete time lag in the formation of the incident wave. The validity of the proposed method is verified in its application to the low pass filter and the frequency tunable band pass filter.

  • Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule

    Kazunori SHIMIZU  Tatsuyuki ISHIKAWA  Nozomu TOGAWA  Takeshi IKENAGA  Satoshi GOTO  

     
    PAPER-VLSI Architecture

      Vol:
    E89-A No:12
      Page(s):
    3602-3612

    In this paper, we propose a power-efficient LDPC decoder architecture based on an accelerated message-passing schedule. The proposed decoder architecture is characterized as follows: (i) Partitioning a pipelined operation not to read and write intermediate messages simultaneously enables the accelerated message-passing schedule to be implemented with single-port SRAMs. (ii) FIFO-based buffering reduces the number of SRAM banks and words of the LDPC decoder based on the accelerated message-passing schedule. The proposed LDPC decoder keeps a single message for each non-zero bit in a parity check matrix as well as a classical schedule while achieving the accelerated message-passing schedule. Implementation results in 0.18 [µm] CMOS technology show that the proposed decoder architecture reduces an area of the LDPC decoder by 43% and a power dissipation by 29% compared to the conventional architecture based on the accelerated message-passing schedule.

301-320hit(566hit)