The existing literature focuses on the applications of fast filter bank due to its excellent frequency responses with low complexity. However, the topic is not addressed related to the general transfer function expressions of the corresponding subfilters for a specific channel. To do this, in this paper, general closed-form transfer function expressions for fast filter bank are derived. Firstly, the cascaded structure of fast filter bank is modelled by a binary tree, with which the index of the subfilter at each stage within the channel can be determined. Then the transfer functions for the two outputs of a subfilter are expressed in a unified form. Finally, the general closed-form transfer functions for the channel and its corresponding subfilters are obtained by variables replacement if the prototype lowpass filters for the stages are given. Analytical results and simulations verify the general expressions. With such closed-form expressions lend themselves easily to analysis and direct computation of the transfer functions and the frequency responses without the structure graph.

The low-hit-zone (LHZ) frequency hopping sequence (FHS) sets are widely applicable in quasi-synchronous frequency hopping multiple-access (QS-FHMA) systems. In order to reduce mutual interference (MI) in the zone around the signal origin between different users, we recommend the LHZ FHS set instead of the conventional FHS set. In this letter, we propose a design of LHZ FHS sets via interleaving techniques. The obtained sequences can be confirmed that they are near-optimal in relation to the Peng-Fan-Lee bound.

The performance of a fully wireless-power-transfer (WPT) node network, in which each node transfers (and receives) energy through a wireless channel when it has sufficient (and insufficient) energy in its battery, was theoretically analyzed. The lost job ratio (LJR), namely, is the ratio of (i) the amount of jobs that cannot be done due to battery of a node running out to (ii) the amount of jobs that should be done, is used as a performance metric. It describes the effect of the battery of each node running out and how much additional energy is needed. Although it is known that WPT can reduce the probability of the battery running out among a few nodes within a small area, the performance of a fully WPT network has not been clarified. By using stochastic geometry and first-passage-time analysis for a diffusion process, the expected LJR was theoretically derived. Numerical examples demonstrate that the key parameters determining the performance of the network are node density, threshold switching of statuses between “transferring energy” and “receiving energy,” and the parameters of power conversion. They also demonstrate the followings: (1) The mean energy stored in the node battery decreases in the networks because of the loss caused by WPT, and a fully WPT network cannot decrease the probability of the battery running out under the current WPT efficiency. (2) When the saturation value of power conversion increases, a fully WPT network can decrease the probability of the battery running out although the mean energy stored in the node battery still decreases in the networks. This result is explained by the fact that the variance of stored energy in each node battery becomes smaller due to transfer of energy from nodes of sufficient energy to nodes of insufficient energy.

This study proposes a new asynchronous Multi-Rate Multiple-Access Differential Chaos Shift Keying (MRMA-DCSK) scheme, ensuring significant data rates for all users. This scheme assigns a unique chaos sequence with a different length to each user. During the first data transmission period, each user transmits the chaos sequence as the reference signal, followed by multiple data bits by sharing the same reference signal in subsequent periods. The proposed scheme affects the bit-error-rate (BER) performance with the number of users, data rate related parameters (L), and length of chaos signals. The simulation results are verified by the derived analysis and show that the proposed scheme achieves higher data rates (from 1/2 to L/L+1) than a conventional scheme while enhancing bit-error-rate (BER) performance.

Thanks to the development of the 6th generation mobile network that makes it possible for us to move towards an intelligent ubiquitous information society, among which some novel technologies represented by cell-free network has also attracted widespread academic attention. Cell-free network has brought distinguished gains to the network capacity with its strong ability against inter-cell interference. Unfortunately, further improvement demands more base stations (BSs) to be settled, which incurs steep cost increase. To address this issue, reconfigurable intelligent surface (RIS) with low cost and power consumption is introduced in this paper to replace some of the trivial BSs in the system, then, a RIS-aided cell-free network paradigm is formulated. Our objective is to solve the weighted sum-rate (WSR) maximization problem by jointly optimizing the beamforming design at BSs and the phase shift of RISs. Due to the non-convexity of the formulated problem, this paper investigates a joint optimizing scheme based on block coordinate descent (BCD) method. Subsequently, on account of the majority of the precious work reposed perfect channel state information (CSI) setup for the ultimate performance, this paper also extends the proposed algorithm to the case wherein CSI is imperfect by utilizing successive convex approximation (SCA). Finally, simulation results demonstrate that the proposed scheme shows great performance and robustness in perfect CSI scenario as well as the imperfect ones.

In this study, aiming at clarifying the characteristics of air-to-ground radio wave propagation in mountainous areas, a transmission experiment was performed between a drone equipped with a transmitter and three receivers set up on the ground using a 920MHz band wireless system at Uchigatani forest, which is located in Yamato-cho, Gujo-shi, Gifu Prefecture. In the experiment, we simultaneously measured the received signal strength indicator (RSSI) and the drone's latitude, longitude, and height from the ground. Then, we verified whether the measured data has the line-of-sight between the transmitter and receivers using a geographic information system and analyzed characteristics of the RSSI, packet loss rate, and fading concerning the height from the ground and distance between the transmitter and receivers. The results showed that increasing the drone's altitude to 90m or more makes the link more stable and that the fading distribution in mountainous terrains is different from in other terrains.

Today's electronic devices must meet many requirements, such as those related to performance, limits to the radiated electromagnetic field, size, etc. For such a design, the requirement is to have a solution that simultaneously meets multiple objectives that sometimes include conflicting requirements. In addition, it is also necessary to consider uncertain parameters. This paper proposes a new combination of statistical analysis using the Polynomial Chaos (PC) method for dealing with the random and multi-objective satisfactory design using the Preference Set-based Design (PSD) method. The application in this paper is an Electromagnetic Interference (EMI) filter for a practical case, which includes plural element parameters and uncertain parameters, which are resistors at the source and load, and the performances of the attenuation characteristics. The PC method generates simulation data with high enough accuracy and good computational efficiency, and these data are used as initial data for the meta-modeling of the PSD method. The design parameters of the EMI filter, which satisfy required performances, are obtained in a range by the PSD method. The authors demonstrate the validity of the proposed method. The results show that applying a multi-objective design method using PSD with a statistical method using PC to handle the uncertain problem can be applied to electromagnetic designs to reduce the time and cost of product development.

This paper analyzes the typical functions of digital control circuit and its function modules, and develops a set of digital control circuit equipment based on Advanced RISC Machines (ARM) with typical function modules, including principle design, interference injection trace design, function design, and study the failure mode and threshold of typical function modules. Based on continuous wave (CW) and pulse wave, the direct power injection (DPI) method is used to test the conduction immunity of the digital control circuit, and the failure mode and sensitivity threshold of the digital control circuit are quantitatively obtained. This method can provide experimental verification for the immunity ability of the digital control circuit to different electromagnetic interference.

To cope with ever growing mobile data traffic, we recently proposed a concept of cellular ultra-dense radio access network (RAN). In the cellular ultra-dense RAN, a number of distributed antennas are deployed in the base station (BS) coverage area (cell) and user-clusters are formed to perform small-scale distributed multiuser multi-input multi-output (MU-MIMO) transmission and reception in each user-cluster in parallel using the same frequency resource. We also proposed a decentralized interference coordination (IC) framework to effectively mitigate both intra-cell and inter-cell interferences caused in the cellular ultra-dense RAN. The inter-cell IC adopted in this framework is the fractional frequency reuse (FFR), realized by applying the channel segregation (CS) algorithm, and is called CS-FFR in this paper. CS-FFR divides the available bandwidth into several sub-bands and allocates multiple sub-bands to different cells. In this paper, focusing on the optimization of the CS-FFR, we find by computer simulation the optimum bandwidth division number and the sub-band allocation ratio to maximize the link capacity. We also discuss the convergence speed of CS-FFR in a cellular ultra-dense RAN.

Hybrid automatic repeat request (HARQ) is an essential technology that efficiently reduces the transmission error rate. However, for ultra-reliable low latency communications (URLLC) in the 5th generation mobile communication systems and beyond, the increase in latency due to retransmission must be minimized in HARQ. In this paper, we propose a highly-efficient low-latency HARQ method built on non-orthogonal multiple access (NOMA) for URLLC while minimizing the performance loss for coexisting services (use cases) such as enhanced mobile broadband (eMBB). The proposed method can be seen as an extension of the conventional link-level non-orthogonal HARQ to the system-level protocol. This mitigates the problems of the conventional link-level non-orthogonal HARQ, which are decoding error under poor channel conditions and an increase in transmission delay due to restrictions in retransmission timing. In the proposed method, delay-sensitive URLLC packets are preferentially multiplexed with best-effort eMBB packets in the same channel using superposition coding to reduce the transmission latency of the URLLC packet while alleviating the throughput loss in eMBB. This is achieved using a weighted channel-aware resource allocator (scheduler). The inter-packet interference multiplexed in the same channel is removed using a successive interference canceller (SIC) at the receiver. Furthermore, the transmission rates for the initial transmission and retransmission are controlled in an appropriate manner for each service in order to deal with decoding errors caused by error in transmission rate control originating from a time varying channel. We show that the proposed method significantly improves the overall performance of a system that simultaneously provides eMBB and URLLC services.

Non-orthogonal multiple access (NOMA), which combines multiple user signals and transmits the combined signal over one channel, can achieve high spectral efficiency for mobile communications. However, combining the multiple signals can lead to degradation of bit error rates (BERs) of NOMA under severe channel conditions. In order to improve the BER performance of NOMA, this paper proposes a new NOMA scheme based on orthogonal space-time block codes (OSTBCs). The proposed scheme transmits several multiplexed signals over their respective orthogonal time-frequency channels, and can gain diversity effects due to the orthogonality of OSTBC. Furthermore, the new scheme can detect the user signals using low-complexity linear detection in contrast with the conventional NOMA. The paper focuses on the Alamouti code, which can be considered the simplest OSTBC, and theoretically analyzes the performance of the linear detection. Computer simulations under the condition of the same bit rate per channel show that the Alamouti code based scheme using two channels is superior to the conventional NOMA using one channel in terms of BER performance. As shown by both the theoretical and simulation analyses, the linear detection for the proposed scheme can maintain the same BER performance as that of the maximum likelihood detection, when the two channels have the same frequency response and do not bring about any diversity effects, which can be regarded as the worst case.

This paper reviews and discusses a brief history of Nyquist ADCs. Bipolar flash ADCs for early development stage of HDTV and digital oscilloscopes, a Bi-CMOS two-step flash ADC using resistive interpolation for home HDTV receivers, a CMOS two-step flash ADC using capacitive interpolation for handy camcorders, pipelined ADCs using CMOS operational amplifiers, CMOS flash ADCs using dynamic comparator and digital offset compensation, SAR ADCs using low noise dynamic comparators and MOM capacitors, and hybrid ADCs are reviewed.

Electrophysiology, which is the study of the electrical properties of biological tissues and cells, has become indispensable in modern clinical research, diagnostics, disease monitoring and therapeutics. In this paper we present a brief history of this discipline and how integrated circuit design shaped electrophysiology in the last few decades. We will discuss how biopotential amplifier design has evolved from the classical three-opamp architecture to more advanced high-performance circuits enabling long-term wearable monitoring of the autonomous and central nervous system. We will also discuss how these integrated circuits evolved to measure in-vivo neural circuits. This paper targets readers who are new to the domain of biopotential recording and want to get a brief historical overview and get up to speed on the main circuit design concepts for both wearable and in-vivo biopotential recording.

A power-scalable sub-sampling phase-locked loop (SSPLL) is proposed for realizing dual-mode operation; high-performance mode with good phase noise and power-saving mode with moderate phase noise. It is the most efficient way to reduce power consumption by lowering the supply voltage. However, there are several issues with the low-supply millimeter-wave (mmW) SSPLL. This work discusses some techniques, such as a back-gate forward body bias (FBB) technique, in addition to employing a CMOS deeply depleted channel process (DDC).

This paper presents a high-NIR sensitivity SOI-gate lock-in pixel with improved modulation contrast. The proposed pixel has a shallow buried channel and intermediate gates to create both a high lateral electric field and a potential barrier to parasitic light sensitivity. Device simulation results showed that parasitic light sensitivity reduced from 13.7% to 0.13% compared to the previous structure.

Energy harvesting has been widely investigated as a potential solution to supply power for Internet of Things (IoT) devices. Computing devices must operate intermittently rather than continuously, because harvested energy is unstable and some of IoT applications can be periodic. Therefore, processors for IoT devices with intermittent operation must feature a hibernation mode with zero-standby-power in addition to energy-efficient normal mode. In this paper, we describe the layout design and measurement results of a nonvolatile standard cell memory (NV-SCM) and nonvolatile flip-flops (NV-FF) with a nonvolatile memory using Fishbone-in-Cage Capacitor (FiCC) suitable for IoT processors with intermittent operations. They can be fabricated in any conventional CMOS process without any additional mask. NV-SCM and NV-FF are fabricated in a 180nm CMOS process technology. The area overhead by nonvolatility of a bit cell are 74% in NV-SCM and 29% in NV-FF, respectively. We confirmed full functionality of the NV-SCM and NV-FF. The nonvolatile system using proposed NV-SCM and NV-FF can reduce the energy consumption by 24.3% compared to the volatile system when hibernation/normal operation time ratio is 500 as shown in the simulation.

This paper presents on-chip characterization of electrostatic discharge (ESD) impacts applied on the Si-substrate backside of a flip-chip mounted integrated circuit (FC-IC) chip. An FC-IC chip has an open backside and there is a threat of reliability problems and malfunctions caused by the backside ESD. We prepared a test FC-IC chip and measured Si-substrate voltage fluctuations on its frontside by an on-chip monitor (OCM) circuit. The voltage surges as large as 200mV were observed on the frontside when a 200-V ESD gun was irradiated through a 5kΩ contact resistor on the backside of a 350μm thick Si substrate. The distribution of voltage heights was experimentally measured at 20 on-chip locations among thinned Si substrates up to 40μm, and also explained in full-system level simulation of backside ESD impacts with the equivalent models of ESD-gun operation and FC-IC chip assembly.

The complexity and scale of Networks-on-Chip (NoCs) are growing as more processing elements and memory devices are implemented on chips. However, under strict power budgets, it is also critical to lower the power consumption of NoCs for the sake of energy efficiency. In this paper, we therefore present three novel input unit designs for on-chip routers attempting to shrink their power consumption while still conserving the network performance. The key idea behind our designs is to organize buffers in the input units with characteristics of the network traffic in mind; as in our observations, only a small portion of the network traffic are long packets (composed of multiple flits), which means, it is fair to implement hybrid, asymmetric and reconfigurable buffers so that they are mainly targeting at short packets (only having a single flit), hence the smaller power consumption and area overhead. Evaluations show that our hybrid, asymmetric and reconfigurable input unit designs can achieve an average reduction of energy consumption per flit by 45%, 52.3% and 56.2% under 93.6% (for hybrid designs) and 66.3% (for asymmetric and reconfigurable designs) of the original router area, respectively. Meanwhile, we only observe minor degradation in network latency (ranging from 18.4% to 1.5%, on average) with our proposals.

In this research, we investigated the threshold voltage (VTH) control by partial polarization of metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) with 5 nm-thick nondoped HfO2 gate insulator utilizing Kr-plasma sputtering for Pt gate electrode deposition. The remnant polarization (2Pr) of 7.2 μC/cm2 was realized by Kr-plasma sputtering for Pt gate electrode deposition. The memory window (MW) of 0.58 V was realized by the pulse amplitude and width of -5/5 V, 100 ms. Furthermore, the VTH of MFSFET was controllable by program/erase (P/E) input pulse even with the pulse width below 100 ns which may be caused by the reduction of leakage current with decreasing plasma damage.

Reducing on-chip microwave crosstalk is crucial for semiconductor spin qubit integration. Toward crosstalk reduction and qubit integration, we investigate on-chip microwave crosstalk for gate electrode pad designs with (i) etched trenches between contact pads or (ii) contact pads with reduced sizes. We conclude that the design with feature (ii) is advantageous for high-density integration of semiconductor qubits with small crosstalk (below -25 dB at 6 GHz), favoring the introduction of flip-chip bonding.