This letter theoretically analyzes and minimizes the L2-sensitivity for all-pass fractional delay digital filters of which structure is given by the normalized lattice structure. The L2-sensitivity is well known as one of the useful evaluation functions for measuring the performance degradation caused by quantizing filter coefficients into finite number of bits. This letter deals with two cases: L2-sensitivity minimization problem with scaling constraint, and the one without scaling constraint. It is proved that, in both of these two cases, any all-pass fractional delay digital filter with the normalized lattice structure becomes an optimal structure that analytically minimizes the L2-sensitivity.

This paper deals with a state-space approach for adaptive second-order IIR notch digital filters with constrained poles and zeros. A simplified iterative algorithm is derived from the gradient-descent method to minimize the mean-squared output of an adaptive notch digital filter. Then, stability and parameter-estimation bias are analyzed for the simplified iterative algorithm. A numerical example is presented to demonstrate the validity and effectiveness of the proposed adaptive state-space notch digital filter and parameter-estimation bias analysis.

This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.

A new method for hiding information in digital images is proposed. Our method differs from existing techniques in that the information is hidden in a mixture of colors carefully tuned on a specific device according to the device's signal-to-luminance (gamma) characteristics. Because these reproduction characteristics differ in general from device to device and even from model to model, the hidden information appears when the cover image is viewed on a different device, and hence the hiding property is device-dependent. To realize this, we modulated a cover image using two identically-looking checkerboard patterns and switched them locally depending on the hidden information. Reproducing these two patterns equally on a different device is difficult. A possible application of our method would be secure printing where an image is allowed to be viewed only on a screen but a warning message appears when it is printed.

This paper focuses on the potential value and future prospects of using virtual reality (VR) technology in online education. In detailing online education and the latest VR technology, we focus on metaverse construction and artificial intelligence (AI) for educational VR use. In particular, we describe a virtual university campus in which on-demand VR lectures are conducted in virtual lecture halls, automated evaluations of student learning and training using machine learning, and the linking of multiple digital campuses.

Digital Microfluidic Biochips (DMFBs) can execute biochemical experiments very efficiently, and thus they are drawing attention recently. In biochemical experiments on a DMFB, “sample preparation” is an important task to generate a sample droplet with the desired concentration value. We merge/split droplets in a DMFB to perform sample preparation. When we split a droplet into two droplets, the split cannot be done evenly in some cases. By some unbalanced splits, the generated concentration value may have unacceptable errors. This paper shows that we can decrease the impact of errors caused by unbalanced splits if we duplicate some mixing nodes in a given dilution graph for most cases. We then propose an efficient method to transform a dilution graph in order to decrease the impact of errors caused by unbalanced splits. We also present a preliminary experimental result to show the potential of our method.

Although intervention practices like mindfulness meditation have proven effective in treating psychosis, there is no clarity on the mechanism of information propagation in the brain. In this study, we formulated a network optimization problem and searched for the optimal solution using Digital Annealer developed by Fujitsu Ltd. This is inspired by quantum computing and is effective in solving large-scale combinatorial optimization problems to find the information propagation pathway in the brain that contributes to the realization of mindfulness. Specifically, we defined the optimal network state as the state of the brain network that is considered to be associated with the mindfulness state. We formulated the problem into two network optimization problems — the minimum vertex-cover problem and the maximum-flow problem — to search for the information propagation pathway that is important for realizing the state. In the minimum vertex-cover problem, we aimed to identify brain regions that are important for the realization of the mindfulness state, and identified eight regions, including four that were suggested to be consistent with previous studies. We formulated the problem as a maximum-flow problem to identify the information propagation pathways in the brain that contribute to the activation of these four identified regions. As a result, approximately 30% of the connections in the brain network structure of this study were identified, and the pathway with the highest flow rate was considered to characterize the bottom-up emotion regulation during mindfulness. The findings of this study could be useful for more direct interventions in the context of mindfulness, which are being investigated by neurofeedback and other methods. This is because existing studies have not clarified the information propagation pathways that contribute to the realization of the brain network states that characterize mindfulness states. In addition, this approach may be useful as a methodology to identify information propagation pathways in the brain that contribute to the realization of higher-order human cognitive activities, such as mindfulness, within large-scale brain networks.

With the rapid deployment of the Internet of Things, where various devices are connected to communication networks, remote driving applications for Unmanned Vehicles (UVs) are attracting attention. In addition to automobiles, autonomous driving technology is expected to be applied to various types of equipment, such as small vehicles equipped with surveillance cameras to monitor building internally and externally, autonomous vehicles that deliver office supplies, and wheelchairs. When a UV is remotely controlled, the control accuracy deteriorates due to transmission delay and jitter. The accuracy must be kept high to realize UV control system by a cloud server. In this study, we investigate the effectiveness of Digital Twin Computing (DTC) for path tracking control of a UV. We show the results of simulations that use transmission delay values measured on the Internet with some cloud servers. Through the results, we quantitatively clarify that application of DTC improves control accuracy on path tracking control. We also clarify that application of jitter buffer, which absorbs the transmission delay fluctuation, can further improve the accuracy.

This paper proposes a reference-clock-less quick-start-up CDR that resumes from a stand-by state only with a 4-bit preamble utilizing a phase generator with an embedded Time-to-Digital Converter (TDC). The phase generator detects 1-UI time interval by using its internal TDC and works as a self-tunable digitally-controlled delay line. Once the phase generator coarsely tunes the recovered clock period, then the residual time difference is finely tuned by a fine Digital-to-Time Converter (DTC). Since the tuning resolution of the fine DTC is matched by design with the time resolution of the TDC that is used as a phase detector, the fine tuning completes instantaneously. After the initial coarse and fine delay tuning, the feedback loop for frequency tracking is activated in order to improve Consecutive Identical Digits (CID) tolerance of the CDR. By applying the frequency tracking architecture, the proposed CDR achieves more than 100bits of CID tolerance. A prototype implemented in a 65nm bulk CMOS process operates at a 0.9-2.15Gbps continuous rate. It consumes 5.1-8.4mA in its active state and 42μA leakage current in its stand-by state from a 1.0V supply.

Cyber-physical systems (CPSs) assisted by digital twins (DTs) integrate sensing-actuation loops over communication networks in various infrastructure services and applications. This study overviews the concept, methodology, and applications of the integrated communication quality estimation and control for the DT-assisted CPSs from both communications and control perspectives. The DT-assisted CPSs can be considered as networked control systems (NCSs) with virtual dynamic models of physical entities. A communication quality estimation observer (CQEO), which is an extended version of the communication disturbance observer (CDOB) utilized for time-delay compensation in NCSs, is proposed to estimate the integrated effects of the quality of services (QoS) and cyberattacks on the NCS applications. A path diversity technique with the CQEO is also proposed to achieve reliable NCSs. The proposed technique is applied to two kinds of NCSs: remote motor control and haptic communication systems. Moreover, results of the simulation on a haptic communication system show the effectiveness of the proposed approach. In the end, future research directions of the CQEO-based scheme are presented.

In this paper, we report an experimental and numerical analysis of ultrahigh-speed coherent Nyquist pulse transmission. First, we describe a low-nonlinearity dispersion compensator for ultrahigh-speed coherent Nyquist pulse transmission; it is composed of a chirped fiber Bragg grating (CFBG) and a liquid crystal on silicon (LCoS) device. By adopting CFBG instead of inverse dispersion fiber, the nonlinearity in a 160km transmission line was more than halved. Furthermore, by eliminating the group delay fluctuation of the CFBG with an LCoS device, the residual group delay was reduced to as low as 1.42ps over an 11nm bandwidth. Then, by using the transmission line with the newly constructed low-nonlinearity dispersion compensator, we succeeded in improving the BER performance of single-channel 15.3Tbit/s-160km transmission by one-third compared with that of a conventional dispersion-managed transmission line and obtained a spectral efficiency of 8.7bit/s/Hz. Furthermore, we numerically analyzed the BER performance of its Nyquist pulse transmission. The numerical results showed that the nonlinear impairment in the transmission line is the main factor limiting the transmission performance in a coherent Nyquist pulse transmission, which becomes more significant at higher baud rates.

In order to further reduce the transmission rate of multi-channel satellite broadcast signals, whose carrier-to-noise ratio (CNR fluctuates due to rainfall attenuation, we propose a novel digitized radio-over-fiber (DRoF) -based optical re-transmission system based on adaptive combination compression for ultra-high definition (UHD) broadcasting satellite (BS)/communications satellite (CS) broadcast signals. The proposed system reduces the optical re-transmission rate of BS/CS signals as much as possible while handling input CNR fluctuations. Therefore, the transmission rate of communication signals in time-division multiplexing (TDM) transmission is ensured, and network sharing of communication signals and broadcast signals via passive optical network (PON) is realized. Based on the ITU-R P.618-13 prediction model, an experimental evaluation is performed using estimates of the long-term statistics of attenuation due to rainfall. The attenuation is evaluated as a percentage of the time that long-term re-transmission service is available. It is shown that the proposed system is able to accommodate a wide range of rainfall attenuation and achieve a 99.988% time percentage for the duration of service provision. In order to show the rate reduction effect of the proposed system, the quantization bit reduction effect as a function of the input CNR, which depends on rainfall attenuation, is experimentally confirmed. Experiments show that service operation time of 99.978% can be achieved by 3-bit transmission. This means a 62.5% reduction in transmission rate is realized compared to conventional fixed quantization. Furthermore, the average quantization bit number in our system for service operation times is 3.000, indicating that most service operation times are covered by just 3-bit transmission.

In this paper, an algorithm based on Taylor series expansion is proposed to calculate the logarithm (log2x) of IEEE754 binary32 accuracy floating-point number by a multi-domain partitioning method. The general mantissa (1≤x<2) is multiplied by 2, 4, 8, … (or equivalently left-shifted by 1, 2, 3, … bits), the regions of (2≤x<4), (4≤x<8), (8≤x<16),… are considered, and Taylor-series expansion is applied. In those regions, the slope of f(x)=log2 x with respect to x is gentle compared to the region of (1≤x<2), which reduces the required number of terms. We also consider the trade-offs among the numbers of additions, subtractions, and multiplications and Look-Up Table (LUT) size in hardware to select the best algorithm for the engineer's design and build the best hardware device.

Manufacturers are coping with increasing pressures in quality, cost and efficiency as more and more industries are moving from traditional setup to industry 4.0 based digitally transformed setup due to its numerous playbacks. Within the manufacturing domain organizational structures and processes are complex, therefore adopting industry 4.0 and finding an optimized re-engineered business process is difficult without using a systematic methodology. Authors have developed Business Process Re-engineering (BPR) and Business Process Optimization (BPO) methods but no consolidated methodology have been seen in the literature that is based on industry 4.0 and incorporates both the BPR and BPO. We have presented a consolidated and systematic re-engineering and optimization framework for a manufacturing industry setup. The proposed framework performs Evolutionary Multi-Objective Combinatorial Optimization using Multi-Objective Genetic Algorithm (MOGA). An example process from an aircraft manufacturing factory has been optimized and re-engineered with available set of technologies from industry 4.0 based on the criteria of lower cost, reduced processing time and reduced error rate. At the end to validate the proposed framework Business Process Model and Notation (BPMN) is used for simulations and perform comparison between AS-IS and TO-BE processes as it is widely used standard for business process specification. The proposed framework will be used in converting an industry from traditional setup to industry 4.0 resulting in cost reduction, increased performance and quality.

A 32-bit arithmetic logic unit (ALU) is designed for a rapid single flux quantum (RSFQ) bit-parallel processor. In the ALU, clocked gates are partially replaced by clockless gates. This reduces the number of D flip flops (DFFs) required for path balancing. The number of clocked gates, including DFFs, is reduced by approximately 40 %, and size of the clock distribution network is reduced. The number of pipeline stages becomes modest. The layout design of the ALU and simulation results show the effectiveness of using clockless gates in wide datapath circuits.

The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic element based on the quantum flux parametron. AQFP circuits can operate with energy dissipation near the thermodynamic and quantum limits by maximizing the energy efficiency of adiabatic switching. We have established the design methodology for AQFP logic and developed various energy-efficient systems using AQFP logic, such as a low-power microprocessor, reversible computer, single-photon image sensor, and stochastic electronics. We have thus demonstrated the feasibility of the wide application of AQFP logic in future information and communications technology. In this paper, we present a tutorial review on AQFP logic to provide insights into AQFP circuit technology as an introduction to this research field. We describe the historical background, operating principle, design methodology, and recent progress of AQFP logic.

Extremely energy-efficient logic devices are required for future low-power high-performance computing systems. Superconductor electronic technology has a number of energy-efficient logic families. Among them is the adiabatic quantum-flux-parametron (AQFP) logic family, which adiabatically switches the quantum-flux-parametron (QFP) circuit when it is excited by an AC power-clock. When compared to state-of-the-art CMOS technology, AQFP logic circuits have the advantage of relatively fast clock rates (5 GHz to 10 GHz) and 5 - 6 orders of magnitude reduction in energy before cooling overhead. We have been developing extremely energy-efficient computing processor components using the AQFP. The adder is the most basic computational unit and is important in the development of a processor. In this work, we designed and measured a 16-bit parallel prefix carry look-ahead Kogge-Stone adder (KSA). We fabricated the circuit using the AIST 10 kA/cm2 High-speed STandard Process (HSTP). Due to a malfunction in the measurement system, we were not able to confirm the complete operation of the circuit at the low frequency of 100 kHz in liquid He, but we confirmed that the outputs that we did observe are correct for two types of tests: (1) critical tests and (2) 110 random input tests in total. The operation margin of the circuit is wide, and we did not observe any calculation errors during measurement.

We present detailed measurements and analysis of the guided acoustic wave Brillouin scattering (GAWBS)-induced depolarization noise in a multi-core fiber (MCF) used for a digital coherent optical transmission. We first describe the GAWBS-induced depolarization noise in an uncoupled four-core fiber (4CF) with a 125μm cladding and compare the depolarization noise spectrum with that of a standard single-mode fiber (SSMF). We found that off-center cores in the 4CF are dominantly affected by higher-order TRn,m modes rather than the TR2,m mode unlike in the center core, and the total power of the depolarization noise in the 4CF was almost the same as that in the SSMF. We also report measurement results for the GAWBS-induced depolarization noise in an uncoupled 19-core fiber with a 240μm cladding. The results indicate that the amounts of depolarization noise generated in the cores are almost identical. Finally, we evaluate the influence of GAWBS-induced polarization crosstalk (XT) on a coherent QAM transmission. We found that the XT limits the achievable multiplicity of the QAM signal to 64 in a transoceanic transmission with an MCF.

This paper presents examination result of possibility for automatic unclear region detection in the CAD system for colorectal tumor with real time endoscopic video image. We confirmed that it is possible to realize the CAD system with navigation function of clear region which consists of unclear region detection by YOLO2 and classification by AlexNet and SVMs on customizable embedded DSP cores. Moreover, we confirmed the real time CAD system can be constructed by a low power ASIC using customizable embedded DSP cores.

Non-linear behavioral models play a key role in designing digital pre-distorters (DPDs) for non-linear power amplifiers (NLPAs). In general, more complex behavioral models have better capability, but they should be converted into simpler versions to assist implementation. In this paper, a conversion from a complex fifth order inverse of a parallel Wiener (PRW) model to a simpler memory polynomial (MP) model is developed by using frequency domain expressions. In the developed conversion, parameters of the converted MP model are calculated from those of original fifth order inverse and frequency domain statistics of the transmit signal. Since the frequency domain statistics of the transmit signal can be precalculated, the developed conversion is deterministic, unlike the conventional conversion that identifies a converted model from lengthy input and output data. Computer simulations are conducted to confirm that conversion error is sufficiently small and the converted MP model offers equivalent pre-distortion to the original fifth order inverse.