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[Keyword] driver(84hit)

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  • Sub-60-mV Charge Pump and its Driver Circuit for Extremely Low-Voltage Thermoelectric Energy Harvesting Open Access

    Hikaru SEBE  Daisuke KANEMOTO  Tetsuya HIROSE  

     
    PAPER

      Pubricized:
    2024/04/09
      Vol:
    E107-C No:10
      Page(s):
    400-407

    Extremely low-voltage charge pump (ELV-CP) and its dedicated multi-stage driver (MS-DRV) for sub-60-mV thermoelectric energy harvesting are proposed. The proposed MS-DRV utilizes the output voltages of each ELV-CP to efficiently boost the control clock signals. The boosted clock signals are used as switching signals for each ELV-CP and MS-DRV to turn switch transistors on and off. Moreover, reset transistors are added to the MS-DRV to ensure an adequate non-overlapping period between switching signals. Measurement results demonstrated that the proposed MS-DRV can generate boosted clock signals of 350 mV from input voltage of 60 mV. The ELV-CP can boost the input voltage of 100 mV with 10.7% peak efficiency. The proposed ELV-CP and MS-DRV can boost the low input voltage of 56 mV.

  • Computer-Aided Design of Cross-Voltage-Domain Energy-Optimized Tapered Buffers Open Access

    Zhibo CAO  Pengfei HAN  Hongming LYU  

     
    PAPER-Electronic Circuits

      Pubricized:
    2024/04/09
      Vol:
    E107-C No:9
      Page(s):
    245-254

    This paper introduces a computer-aided low-power design method for tapered buffers that address given load capacitances, output transition times, and source impedances. Cross-voltage-domain tapered buffers involving a low-voltage domain in the frontier stages and a high-voltage domain in the posterior stages are further discussed which breaks the trade-off between the energy dissipation and the driving capability in conventional designs. As an essential circuit block, a dedicated analytical model for the level-shifter is proposed. The energy-optimized tapered buffer design is verified for different source and load conditions in a 180-nm CMOS process. The single-VDD buffer model achieves an average inaccuracy of 8.65% on the transition loss compared with Spice simulation results. Cross-voltage tapered buffers can be optimized to further remarkably reduce the energy consumption. The study finds wide applications in energy-efficient switching-mode analog applications.

  • Real-Time Safety Driving Advisory System Utilizing a Vision-Based Driving Monitoring Sensor Open Access

    Masahiro TADA  Masayuki NISHIDA  

     
    LETTER-Human-computer Interaction

      Pubricized:
    2024/03/15
      Vol:
    E107-D No:7
      Page(s):
    901-907

    In this study, we use a vision-based driving monitoring sensor to track drivers’ visual scanning behavior, a key factor for preventing traffic accidents. Our system evaluates driver’s behaviors by referencing the safety knowledge of professional driving instructors, and provides real-time voice-guided safety advice to encourage safer driving. Our system’s evaluation of safe driving behaviors matched the instructor’s evaluation with accuracy over 80%.

  • A Driver Fatigue Detection Algorithm Based on Dynamic Tracking of Small Facial Targets Using YOLOv7

    Shugang LIU  Yujie WANG  Qiangguo YU  Jie ZHAN  Hongli LIU  Jiangtao LIU  

     
    PAPER-Image Recognition, Computer Vision

      Pubricized:
    2023/08/21
      Vol:
    E106-D No:11
      Page(s):
    1881-1890

    Driver fatigue detection has become crucial in vehicle safety technology. Achieving high accuracy and real-time performance in detecting driver fatigue is paramount. In this paper, we propose a novel driver fatigue detection algorithm based on dynamic tracking of Facial Eyes and Yawning using YOLOv7, named FEY-YOLOv7. The Coordinate Attention module is inserted into YOLOv7 to enhance its dynamic tracking accuracy by focusing on coordinate information. Additionally, a small target detection head is incorporated into the network architecture to promote the feature extraction ability of small facial targets such as eyes and mouth. In terms of compution, the YOLOv7 network architecture is significantly simplified to achieve high detection speed. Using the proposed PERYAWN algorithm, driver status is labeled and detected by four classes: open_eye, closed_eye, open_mouth, and closed_mouth. Furthermore, the Guided Image Filtering algorithm is employed to enhance image details. The proposed FEY-YOLOv7 is trained and validated on RGB-infrared datasets. The results show that FEY-YOLOv7 has achieved mAP of 0.983 and FPS of 101. This indicates that FEY-YOLOv7 is superior to state-of-the-art methods in accuracy and speed, providing an effective and practical solution for image-based driver fatigue detection.

  • Prediction of Driver's Visual Attention in Critical Moment Using Optical Flow

    Rebeka SULTANA  Gosuke OHASHI  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2023/01/26
      Vol:
    E106-D No:5
      Page(s):
    1018-1026

    In recent years, driver's visual attention has been actively studied for driving automation technology. However, the number of models is few to perceive an insight understanding of driver's attention in various moments. All attention models process multi-level image representations by a two-stream/multi-stream network, increasing the computational cost due to an increment of model parameters. However, multi-level image representation such as optical flow plays a vital role in tasks involving videos. Therefore, to reduce the computational cost of a two-stream network and use multi-level image representation, this work proposes a single stream driver's visual attention model for a critical situation. The experiment was conducted using a publicly available critical driving dataset named BDD-A. Qualitative results confirm the effectiveness of the proposed model. Moreover, quantitative results highlight that the proposed model outperforms state-of-the-art visual attention models according to CC and SIM. Extensive ablation studies verify the presence of optical flow in the model, the position of optical flow in the spatial network, the convolution layers to process optical flow, and the computational cost compared to a two-stream model.

  • A Low Power 100-Gb/s PAM-4 Driver with Linear Distortion Compensation in 65-nm CMOS

    Xiangyu MENG  Kangfeng WEI  Zhiyi YU  Xinlun CAI  

     
    PAPER-Electronic Circuits

      Pubricized:
    2022/07/01
      Vol:
    E106-C No:1
      Page(s):
    7-13

    This paper proposes a low-power 100Gb/s four-level pulse amplitude modulation driver (PAM-4 Driver) based on linear distortion compensation structure for thin-film Lithium Niobate (LiNbO3) modulators, which manages to achieve high linearity in the output. The inductive peaking technology and open drain structure enable the overall circuit to achieve a 31-GHz bandwidth. With an area of 0.292 mm2, the proposed PAM-4 driver chip is designed in a 65-nm process to achieve power consumption of 37.7 mW. Post-layout simulation results show that the power efficiency is 0.37 mW/Gb/s, RLM is more than 96%, and the FOM value is 8.84.

  • A High-Speed Interface Based on a Josephson Latching Driver for Adiabatic Quantum-Flux-Parametron Logic

    Fumihiro CHINA  Naoki TAKEUCHI  Hideo SUZUKI  Yuki YAMANASHI  Hirotaka TERAI  Nobuyuki YOSHIKAWA  

     
    PAPER

      Pubricized:
    2021/12/03
      Vol:
    E105-C No:6
      Page(s):
    264-269

    The adiabatic quantum flux parametron (AQFP) is an energy-efficient, high-speed superconducting logic device. To observe the tiny output currents from the AQFP in experiments, high-speed voltage drivers are indispensable. In the present study, we develop a compact voltage driver for AQFP logic based on a Josephson latching driver (JLD), which has been used as a high-speed driver for rapid single-flux-quantum (RSFQ) logic. In the JLD-based voltage driver, the signal currents of AQFP gates are converted into gap-voltage-level signals via an AQFP/RSFQ interface and a four-junction logic gate. Furthermore, this voltage driver includes only 15 Josephson junctions, which is much fewer than in the case for the previously designed driver based on dc superconducting quantum interference devices (60 junctions). In measurement, we successfully operate the JLD-based voltage driver up to 4 GHz. We also evaluate the bit error rate (BER) of the driver and find that the BER is 7.92×10-10 and 2.67×10-3 at 1GHz and 4GHz, respectively.

  • An Evaluation of a New Type of High Efficiency Hybrid Gate Drive Circuit for SiC-MOSFET Suitable for Automotive Power Electronics System Applications Open Access

    Masayoshi YAMAMOTO  Shinya SHIRAI  Senanayake THILAK  Jun IMAOKA  Ryosuke ISHIDO  Yuta OKAWAUCHI  Ken NAKAHARA  

     
    INVITED PAPER

      Pubricized:
    2021/11/26
      Vol:
    E105-A No:5
      Page(s):
    834-843

    In response to fast charging systems, Silicon Carbide (SiC) power semiconductor devices are of great interest of the automotive power electronics applications as the next generation of fast charging systems require high voltage batteries. For high voltage battery EVs (Electric Vehicles) over 800V, SiC power semiconductor devices are suitable for 3-phase inverters, battery chargers, and isolated DC-DC converters due to their high voltage rating and high efficiency performance. However, SiC-MOSFETs have two characteristics that interfere with high-speed switching and high efficiency performance operations for SiC MOS-FET applications in automotive power electronics systems. One characteristic is the low voltage rating of the gate-source terminal, and the other is the large internal gate-resistance of SiC MOS-FET. The purpose of this work was to evaluate a proposed hybrid gate drive circuit that could ignore the internal gate-resistance and maintain the gate-source terminal stability of the SiC-MOSFET applications. It has been found that the proposed hybrid gate drive circuit can achieve faster and lower loss switching performance than conventional gate drive circuits by using the current source gate drive characteristics. In addition, the proposed gate drive circuit can use the voltage source gate drive characteristics to protect the gate-source terminals despite the low voltage rating of the SiC MOS-FET gate-source terminals.

  • CoLaFUZE: Coverage-Guided and Layout-Aware Fuzzing for Android Drivers

    Tianshi MU  Huabing ZHANG  Jian WANG  Huijuan LI  

     
    PAPER

      Pubricized:
    2021/07/28
      Vol:
    E104-D No:11
      Page(s):
    1902-1912

    With the commercialization of 5G mobile phones, Android drivers are increasing rapidly to utilize a large quantity of newly emerging feature-rich hardware. Most of these drivers are developed by third-party vendors and lack proper vulnerabilities review, posing a number of new potential risks to security and privacy. However, the complexity and diversity of Android drivers make the traditional analysis methods inefficient. For example, the driver-specific argument formats make traditional syscall fuzzers difficult to generate valid inputs, the pointer-heavy code makes static analysis results incomplete, and pointer casting hides the actual type. Triggering code deep in Android drivers remains challenging. We present CoLaFUZE, a coverage-guided and layout-aware fuzzing tool for automatically generating valid inputs and exploring the driver code. CoLaFUZE employs a kernel module to capture the data copy operation and redirect it to the fuzzing engine, ensuring that the correct size of the required data is transferred to the driver. CoLaFUZE leverages dynamic analysis and symbolic execution to recover the driver interfaces and generates valid inputs for the interfaces. Furthermore, the seed mutation module of CoLaFUZE leverages coverage information to achieve better seed quality and expose bugs deep in the driver. We evaluate CoLaFUZE on 5 modern Android mobile phones from the top vendors, including Google, Xiaomi, Samsung, Sony, and Huawei. The results show that CoLaFUZE can explore more code coverage compared with the state-of-the-art fuzzer, and CoLaFUZE successfully found 11 vulnerabilities in the testing devices.

  • Explanatory Rule Generation for Advanced Driver Assistant Systems

    Juha HOVI  Ryutaro ICHISE  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2021/06/11
      Vol:
    E104-D No:9
      Page(s):
    1427-1439

    Autonomous vehicles and advanced driver assistant systems (ADAS) are receiving notable attention as research fields in both academia and private industry. Some decision-making systems use sets of logical rules to map knowledge of the ego-vehicle and its environment into actions the ego-vehicle should take. However, such rulesets can be difficult to create — for example by manually writing them — due to the complexity of traffic as an operating environment. Furthermore, the building blocks of the rules must be defined. One common solution to this is using an ontology specifically aimed at describing traffic concepts and their hierarchy. These ontologies must have a certain expressive power to enable construction of useful rules. We propose a process of generating sets of explanatory rules for ADAS applications from data using ontology as a base vocabulary and present a ruleset generated as a result of our experiments that is correct for the scope of the experiment.

  • How Centrality of Driver Nodes Affects Controllability of Complex Networks

    Guang-Hua SONG  Xin-Feng LI  Zhe-Ming LU  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2021/05/20
      Vol:
    E104-D No:8
      Page(s):
    1340-1348

    Recently, the controllability of complex networks has become a hot topic in the field of network science, where the driver nodes play a key and central role. Therefore, studying their structural characteristics is of great significance to understand the underlying mechanism of network controllability. In this paper, we systematically investigate the nodal centrality of driver nodes in controlling complex networks, we find that the driver nodes tend to be low in-degree but high out-degree nodes, and most of driver nodes tend to have low betweenness centrality but relatively high closeness centrality. We also find that the tendencies of driver nodes towards eigenvector centrality and Katz centrality show very similar behaviors, both high eigenvector centrality and high Katz centrality are avoided by driver nodes. Finally, we find that the driver nodes towards PageRank centrality demonstrate a polarized distribution, i.e., the vast majority of driver nodes tend to be low PageRank nodes whereas only few driver nodes tend to be high PageRank nodes.

  • A Low-Power Current-Reuse LNA for 3D Ultrasound Beamformers Open Access

    Yohei NAKAMURA  Shinya KAJIYAMA  Yutaka IGARASHI  Takashi OSHIMA  Taizo YAMAWAKI  

     
    PAPER

      Vol:
    E104-A No:2
      Page(s):
    492-498

    3D ultrasound imagers require low-noise amplifier (LNA) with much lower power consumption and smaller chip area than conventional 2D imagers because of the huge amount of transducer channels. This paper presents a low-power small-size LNA with a novel current-reuse circuitry for 3D ultrasound imaging systems. The proposed LNA is composed of a differential common source amplifier and a source-follower driver which share the current without using inductors. The LNA was fabricated in a 0.18-μm CMOS process with only 0.0056mm2. The measured results show a gain of 21dB and a bandwidth of 9MHz. The proposed LNA achieves an average noise density of 11.3nV/√Hz, and the 2nd harmonic distortion below -40dBc with 0.1-Vpp input. The supply current is 85μA with a 1.8-V power supply, which is competitive with conventional LNAs by finer CMOS process.

  • Estimation of Switching Loss and Voltage Overshoot of Active Gate Driver by Neural Network

    Satomu YASUDA  Yukihisa SUZUKI  Keiji WADA  

     
    BRIEF PAPER

      Pubricized:
    2020/05/01
      Vol:
    E103-C No:11
      Page(s):
    609-612

    An active gate driver IC generates arbitrary switching waveform is proposed to reduce the switching loss, the voltage overshoot, and the electromagnetic interference (EMI) by optimizing the switching pattern. However, it is hard to find optimal switching pattern because the switching pattern has huge possible combinations. In this paper, the method to estimate the switching loss and the voltage overshoot from the switching pattern with neural network (NN) is proposed. The implemented NN model obtains reasonable learning results for data-sets.

  • Driver Drowsiness Estimation by Parallel Linked Time-Domain CNN with Novel Temporal Measures on Eye States

    Kenta NISHIYUKI  Jia-Yau SHIAU  Shigenori NAGAE  Tomohiro YABUUCHI  Koichi KINOSHITA  Yuki HASEGAWA  Takayoshi YAMASHITA  Hironobu FUJIYOSHI  

     
    PAPER

      Pubricized:
    2020/04/10
      Vol:
    E103-D No:6
      Page(s):
    1276-1286

    Driver drowsiness estimation is one of the important tasks for preventing car accidents. Most of the approaches are binary classification that classify a driver is significantly drowsy or not. Multi-level drowsiness estimation, that detects not only significant drowsiness but also moderate drowsiness, is helpful to a safer and more comfortable car system. Existing approaches are mostly based on conventional temporal measures which extract temporal information related to eye states, and these measures mainly focus on detecting significant drowsiness for binary classification. For multi-level drowsiness estimation, we propose two temporal measures, average eye closed time (AECT) and soft percentage of eyelid closure (Soft PERCLOS). Existing approaches are also based on a time domain convolutional neural network (CNN) as deep neural network models, of which layers are linked sequentially. The network model extracts features mainly focusing on mono-temporal resolution. We found that features focusing on multi-temporal resolution are effective to multi-level drowsiness estimation, and we propose a parallel linked time-domain CNN to extract the multi-temporal features. We collected an own dataset in a real environment and evaluated the proposed methods with the dataset. Compared with existing temporal measures and network models, Our system outperforms the existing approaches on the dataset.

  • A Deep Neural Network for Real-Time Driver Drowsiness Detection

    Toan H. VU  An DANG  Jia-Ching WANG  

     
    LETTER-Image Recognition, Computer Vision

      Pubricized:
    2019/09/25
      Vol:
    E102-D No:12
      Page(s):
    2637-2641

    We develop a deep neural network (DNN) for detecting driver drowsiness in videos. The proposed DNN model that receives driver's faces extracted from video frames as inputs consists of three components - a convolutional neural network (CNN), a convolutional control gate-based recurrent neural network (ConvCGRNN), and a voting layer. The CNN is to learn facial representations from global faces which are then fed to the ConvCGRNN to learn their temporal dependencies. The voting layer works like an ensemble of many sub-classifiers to predict drowsiness state. Experimental results on the NTHU-DDD dataset show that our model not only achieve a competitive accuracy of 84.81% without any post-processing but it can work in real-time with a high speed of about 100 fps.

  • Optimization of Flashing Period for Line Display Using Saccade Eyeball Movement Open Access

    Kousuke KANAZAWA  Shota KAZUNO  Makiko OKUMURA  

     
    INVITED PAPER

      Vol:
    E101-C No:11
      Page(s):
    851-856

    In this paper, we developed saccade-induced line displays including flashing period controllers. The displays speeded up the flashing period of one line using LED drivers and Arduino Uno equipped with AVR microcomputers. It was shown that saccades were easily induced when the observer alternately looks at the two fast flashing line displays apart. Also, we were able to find the optimum flashing period using a controller that can speed up the flashing period and change its speed. We found that the relationship between the viewing angle of the observer and the optimum flashing period is almost proportional.

  • Study on Driver Agent Based on Analysis of Driving Instruction Data — Driver Agent for Encouraging Safe Driving Behavior (1) —

    Takahiro TANAKA  Kazuhiro FUJIKAKE  Takashi YONEKAWA  Misako YAMAGISHI  Makoto INAGAMI  Fumiya KINOSHITA  Hirofumi AOKI  Hitoshi KANAMORI  

     
    PAPER-Human-computer Interaction

      Pubricized:
    2018/01/24
      Vol:
    E101-D No:5
      Page(s):
    1401-1409

    In recent years, the number of traffic accidents caused by elderly drivers has increased in Japan. However, cars are an important mode of transportation for the elderly. Therefore, to ensure safe driving, a system that can assist elderly drivers is required. We propose a driver-agent system that provides support to elderly drivers during and after driving and encourages them to improve their driving. This paper describes the prototype system and the analysis conducted of the teaching records of a human instructor, the impression caused by the instructions on a subject during driving, and subjective evaluation of the driver-agent system.

  • 25-Gbps 3-mW/Gbps/ch VCSEL Driver Circuit in 65-nm CMOS for Multichannel Optical Transmitter

    Toru YAZAKI  Norio CHUJO  Takeshi TAKEMOTO  Hiroki YAMASHITA  Akira HYOGO  

     
    PAPER

      Vol:
    E101-A No:2
      Page(s):
    402-409

    This paper describes the design and experiment results of a 25Gbps vertical-cavity surface emitting laser (VCSEL) driver circuit for a multi channel optical transmitter. To compensate for the non-linearity of the VCSEL and achieve high speed data rate communication, an asymmetric pre-emphasis technique is proposed for the VCSEL driver. An asymmetric pre-emphasis signal can be created by adjusting the duty ratio of the emphasis signal. The VCSEL driver adopts a double cascode connection that can apply a drive current from a high voltage DC bias and feed-forward compensation that can enhance the band-width for common-cathode VCSEL. For the design of the optical module structure, a two-tier low temperature co-fired ceramics (LTCC) package is adopted to minimize the wire bonding between the signal pad on the LTCC and the anode pad on the VCSEL. This structure and circuit reduces the simulated deterministic jitter from 12.7 to 4.1ps. A test chip was fabricated with the 65-nm standard CMOS process and demonstrated to work as an optical transmitter. An experimental evaluation showed that this VCSEL driver with asymmetric pre-emphasis reduced the total deterministic jitter up to 8.6ps and improved the vertical eye opening ratio by 3% compared with symmetric pre-emphasis at 25Gbps with a PRBS=29-1 test signal. The power consumption of the VCSEL driver was 3.0mW/Gbps/ch at 25Gbps. An optical transmitter including the VCSEL driver achieved 25-Gbps, 4-ch fully optical links.

  • Ontology-Based Driving Decision Making: A Feasibility Study at Uncontrolled Intersections

    Lihua ZHAO  Ryutaro ICHISE  Zheng LIU  Seiichi MITA  Yutaka SASAKI  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2017/04/05
      Vol:
    E100-D No:7
      Page(s):
    1425-1439

    This paper presents an ontology-based driving decision making system, which can promptly make safety decisions in real-world driving. Analyzing sensor data for improving autonomous driving safety has become one of the most promising issues in the autonomous vehicles research field. However, representing the sensor data in a machine understandable format for further knowledge processing still remains a challenging problem. In this paper, we introduce ontologies designed for autonomous vehicles and ontology-based knowledge base, which are used for representing knowledge of maps, driving paths, and perceived driving environments. Advanced Driver Assistance Systems (ADAS) are developed to improve safety of autonomous vehicles by accessing to the ontology-based knowledge base. The ontologies can be reused and extended for constructing knowledge base for autonomous vehicles as well as for implementing different types of ADAS such as decision making system.

  • A 50-Gb/s Optical Transmitter Based on a 25-Gb/s-Class DFB-LD and a 0.18-µm SiGe BiCMOS LD Driver

    Takashi TAKEMOTO  Yasunobu MATSUOKA  Hiroki YAMASHITA  Takahiro NAKAMURA  Yong LEE  Hideo ARIMOTO  Tatemi IDO  

     
    PAPER-Optoelectronics

      Vol:
    E99-C No:9
      Page(s):
    1039-1047

    A 50-Gb/s optical transmitter, consisting of a 25-Gb/s-class lens-integrated DFB-LD (with -3-dB bandwidth of 20GHz) and a LD-driver chip based on 0.18-µm SiGe BiCMOS technology for inter and intra-rack transmissions, was developed and tested. The DFB-LD and LD driver chip are flip-chip mounted on an alumina ceramic package. To suppress inter-symbol interference due to a shortage of the DFB-LD bandwidth and signal reflection between the DFB-LD and the package, the LD driver includes a two-tap pre-emphasis circuit and a high-speed termination circuit. Operating at a data rate of 50Gb/s, the optical transmitter enhances LD bandwidth and demonstrated an eye opening with jitter margin of 0.23UI. Power efficiency of the optical transmitter at a data rate of 50Gb/s is 16.2mW/Gb/s.

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