We studied theoretically and experimentally an InGaAs/InAlAs/InP polarization-insensitive multiple quantum well (MQW) electroabsorption (EA) modulator operating over a very wide wavelength range in 1.55 µm wavelength region. One of the simplest possible potential-tailored quantum well, "pre-biased" quantum well (PBQW) is used to achieve wide-wavelength polarization insensitivity. PBQW is basically a rectangular quantum well with a thin barrier inserted near one edge of well. This thin barrier effectively introduces "pre-bias" to a rectangular quantum well and the same amount of Stark shift is achieved for electron-heavy hole and electron-light hole transition energies. By incorporating tensile strain into PBQW, polarization-insensitive modulation is achieved over 60 nm wavelength range, from 1510 nm to 1570 nm. This MQW-EA modulator plays an important role in wavelength division multiplexing (WDM) transmission and switching systems.

In this letter, we describe a four thin-film-transistor (TFT) pixel circuit based on hydrogenated amorphous silicon (a-Si:H) technology for the active-matrix organic light-emitting diode (AMOLED) display applications. The circuit uses current-writing mechanism and can automatically adjust the threshold-voltage shifts of both the organic light-emitting diodes (OLEDs) and the TFTs induced by the circuit aging or process variations. Experimental results indicate virtually no variation of the output driving current after long-term bias-temperature-stress (BTS).

IC interconnect transmission line effects due to the characteristics of a silicon substrate and current return path impedances are physically investigated and experimentally characterized. With the investigation, a novel transmission line model is developed, taking these effects into account. Then an accurate signal delay on the IC interconnect lines is analyzed by using the transmission line model. The transmission line effects of the metal-insulator-semiconductor IC interconnect structure are experimentally verified with s-parameter-based wafer level signal-transient characterizations for various test patterns. They are designed and fabricated with a 0.35 µm CMOS process technology. Throughout this work, it is demonstrated that the conventional ideal RC- or RLC-model of the IC interconnects without considering these detailed physical phenomena is not accurate enough to verify the pico-second level timing of high-performance VLSI circuits.

Long-period fiber gratings (LPGs) using a high-silica core fiber are presented. A high-silica core fiber has a residual stress in the core, and the grating structure is formed by stress releasing of the core using a focused CO2 laser beam. The dependence of the transmission spectrum on temperature and tensile strength is measured, and low dependence compared with conventional LPGs is observed. These unique characteristics are caused by the difference of temperature and tensile strength changes of the effective indices for the fundamental propagation mode and the cladding mode in the high-silica core fiber.

A nonlinear inverse filter is proposed for restoring signals degraded by a linear system and additive Gaussian noise. The proposed filter consists of combination of a linear high pass filter and an ε-filter, which is modified from the cascaded linear filter. The nonlinear property of the ε-filter is utilized to suppress pre-enhanced additive random noise and to restore sharp edges. It is demonstrated that the filter can be reduced to a multi-layered neural network model, and the optimal design is described by using the back propagation algorithm. The nonlinear function is approximated by a piecewise linear function, which results in simple and robust training algorithm. An application to image restoration is also presented, illustrating the effectiveness over the linear filter, especially when the amplitude of additive noise is small.

In a real-time system, it is required to reduce the response time to an interrupt signal, as well as the execution time of a Real-Time Operating System (RTOS). In order to satisfy this requirement, we have proposed a method of implementing some of the functionalities of an RTOS using hardware. Based on this idea, we have implemented a VLSI chip, called STRON (silicon TRON: The Realtime Operating system Nucleus), to enhance the performance of an RTOS, where the STRON chip works as a peripheral unit of any MPU. In this paper we describe the hardware architecture of the STRON chip and the performance evaluation results of the RTOS using the STRON chip. The following results were obtained. (1) The STRON chip is implemented in only about 10,000 gates when the number of each object (task, event flag, semaphore, and interrupt) is 7. (2) The task scheduler can execute within 8 clocks in a fixed period using the hardware algorithm when the number of tasks is 7. (3) Most of the basic µITRON system calls using the STRON chip can be executed in a fixed period of a few microseconds. (4) The execution time of a system call, measured by a multitask application program model, can be reduced to about one-fifth that in the case of the conventional software RTOS. (5) The total performance, including context switching, is about 2.2 times faster than that of the software RTOS. We conclude that the execution time of the part of the system call implemented by the STRON chip can almost be ignored, but the part of the interface software and context switching related to the architecture of a MPU strongly influence the total performance of an RTOS.

Silicon-based monolithic microwave integrated circuits (MMICs) present an interesting option for low-cost consumer wireless systems. SiGe/Si heterojunction bipolar transistors (HBTs) are a major driving force behind Si-based MMICs, because they offer excellent microwave performance without aggressive lateral scaling. This article reviews opportunities for receiver frontend components (low-noise amplifiers and mixers) using SiGe HBTs.

A high-frequency, low-noise silicon bipolar transistor that can be used in over-10 Gb/s optical communication systems and wireless communication systems has been developed. The silicon bipolar transistor was fabricated using self-aligned metal/IDP (SMI) technology, which produces a self-aligned base electrode of stacked layers of metal and in-situ doped poly-Si (IDP) by low-temperature selective tungsten CVD. It provides a low base resistance and high-cutoff frequency. The base resistance is reduced to half that of a transistor with a conventional poly-Si base electrode. By using the SMI technology and optimizing the depth of the emitter and the link base, we achieved the maximum oscillation frequency of 80 GHz, a minimum gate delay in an ECL of 11.6 ps, and the minimum noise figure of 0.34 dB at 2 GHz, which are the highest performances among those obtained from ion-implanted base Si bipolar transistors, and are comparable to those of SiGe base heterojunction bipolar transistors.

The growth behavior of copper particle on crystalline and amorphous silicon surfaces has been investigated. The study reveals that the growth behavior of copper particle depends on the substrate condition. When samples are intentionally contaminated in ultrapure water, both crystalline and amorphous silicon surfaces show no difference in their contamination levels. However, copper particles were not observed on an amorphous silicon surface except dipping in dilute CuCl2 solution. The copper concentration on an amorphous silicon surface after dipping in a 0.5% HF solution is similar to the level after contaminating in ultrapure water. The copper contamination level on a crystalline silicon surface, except from CuCl2 solution, decreased two orders of magnitude as compared with ultrapure water. The copper impurity level on crystalline silicon surface was reduced by two orders by cleaning in a sulfuric acid-hydrogen peroxide mixture. The sulfuric acid-hydrogen peroxide mixture cleaning was not effective on an amorphous silicon surface. When native oxide pre-existed on an amorphous silicon surface before contamination, however, the sulfuric acid-hydrogen peroxide mixture cleaning was effective for removing copper impurity. Our results suggest that copper contamination on an amorphous silicon surface have the characteristics of bonding directly with silicon and/or existing in the native oxide, in contrast with the situation on crystalline silicon surface. After contamination with 1000 ppm copper in CuF2 solution, the etch rate of an amorphous silicon film in a 0.5% HF solution was approximately one order of magnitude faster than that of crystalline silicon. This is attributed to the difference in crystalline structure between crystalline silicon and amorphous silicon.

It is known that AND-EXOR two-level networks obtained by AND-EXOR expressions with positive literals are easily testable. They are based on the single-rail-input logic, and require (n+4) tests to detect their single stuck-at faults, where n is the number of the input variables. We present three-level networks obtained from single-rail-input OR-AND-EXOR expressions and propose a more easily testable realization than the AND-EXOR networks. The realization is an OR-AND-EXOR network which limits the fan-in of the AND and OR gates to n/r and r respectively, where r is a constant (1 r n). We show that only (r+n/r) tests are required to detect the single stuck-at faults by adding r extra variables to the network.

Recent technologies for increasing memory density in random access memory optical disks including magnetic super resolution method, super resolution method in phase change disk, blue laser diode, near field optics, and photo chromic memory are reviewed.

Recent technologies for increasing memory density in random access memory optical disks including magnetic super resolution method, super resolution method in phase change disk, blue laser diode, near field optics, and photo chromic memory are reviewed.

An optical add-drop multiplexer with a grating-loaded directional coupler in silica waveguides is demonstrated. The device for this configuration has a large fabrication tolerance and is small in size. A new scheme, in which the coupling length of the directional coupler is twice the complete coupling length, enables low cross-talk for both add and drop operations. This device is polarization-independent due to its relatively low-temperature process.

An optical add-drop multiplexer with a grating-loaded directional coupler in silica waveguides is demonstrated. The device for this configuration has a large fabrication tolerance and is small in size. A new scheme, in which the coupling length of the directional coupler is twice the complete coupling length, enables low cross-talk for both add and drop operations. This device is polarization-independent due to its relatively low-temperature process.

The full-band Monte Carlo technique is currently the most accurate device simulation method, but its usefulness is limited because it is very CPU intensive. This work describes efficient algorithms in detail, which raise the efficiency of the full-band Monte Carlo method to a level where it becomes applicable in the device design process beyond exemplary simulations. The k-space is discretized with a nonuniform tetrahedral grid, which minimizes the discretization error of the linear energy interpolation and memory requirements. A consistent discretization of the inverse mass tensor is utilized to formulate efficient transport parameter estimators. Particle scattering is modeled in such a way that a very fast rejection technique can be used for the generation of the final state eliminating the main cause of the inefficiency of full-band Monte Carlo simulations. The developed full-band Monte Carlo simulator is highly efficient. For example, in conjunction with the nonself-consistent simulation technique CPU times of a few CPU minutes per bias point are achieved for substrate current calculations. Self-consistent calculations of the drain current of a 60nm-NMOSFET take about a few CPU hours demonstrating the feasibility of full-band Monte Carlo simulations.

Equipment simulation can provide valuable support in reactor design and process optimization. This article describes the physical and chemical models used in this technique and the current state of the art of the available software tools is reviewed. Moreover, the potential of equipment simulation will be highlighted by means of three recent examples from advanced quarter micron silicon process development. These include a vertical batch reactor for LPCVD of arsenic doped silicon oxide, a multi station tungsten CVD reactor, and a plasma reactor for silicon etching.

Recent years have seen great advances in our understanding and modeling of the coupled diffusion of dopants and defects in silicon during integrated circuit fabrication processes. However, the ever-progressing shrinkage of device dimensions and tolerances leads to new problems and a need for even better models. In this review, we address some of the advances in the understanding of defect-mediated diffusion, focusing on the equations and parameters appropriate for modeling of dopant diffusion in submicron structures.

Computational sensor (smart sensor, vision chip in other words) is a very small integrated system, in which processing and sensing are unified on a single VLSI chip. It is designed for a specific targeted application. Research activities of computational sensor are described in this paper. There have been quite a few proposals and implementations in computational sensors. Firstly, their approaches are summarized from several points of view, such as advantage vs. disadvantage, neural vs. functional, architecture, analog vs. digital, local vs. global processing, imaging vs. processing, new processing paradigms. Then, several examples are introduced which are spatial processings, temporal processings, A/D conversions, programmable computational sensors. Finally, the paper is concluded.

Peculiar patterns of SiO2 contamination around the periphery of the contact trace caused by silicone vapor under switching at the boundary of 1.6 W were confirmed. For micro relays, the electrical power conditions are restricted to lower level. Therefore, it is important to ascertain the upper limit of the electrical power conditions for normal operation. The peculiar pattern is important as it is recognized as the first stage of the origination of contact failure. Causes of this pattern were discussed from the viewpoints of temperature distribution in the contact trace, molten metallic bridge, micro arc discharge, and supply of silicone vapor with oxygen. It is proposed that during the closing contacts, as maximum Joule heating occurs at the periphery of the true contact area and silicone vapor with oxygen is easily supplied at the periphery, SiO2 grows around the contact trace. For the opening contacts, as the bridge or micro arc appears, silicone vapor with oxygen is supplied only outside of the contacts. Thus SiO2 is formed mainly around the periphery of the trace. Moreover, SiO2 was scattered radially depending on the sputtering of molten metal under rupture of the bridge. Therefore, the peculiar pattern forms as a result.

In a DC 50 V/3.3 A circuit, the spatial distributions of the spectral intensities of breaking arcs near the cathode for silver contacts were measured on the contact surfaces of three different shapes: flat and spherical (1 mm radius and 2 mm radius) and the arc temperature and the metal-vapor quantity were calculated from the spectral intensities. The influence of the contact shape on the arc temperature and the metal-vapor quantity were also examined, as well as the arc tracks on the contact surfaces and the gain and loss of the contacts. Findings show the distributions of spectral intensities are non-symmetrical from the beginning to the extinction of the breaking arc for the flat contact: However, they are symmetrical in the latter half of the breaking in spite of the number of breaking arcs and the shape of contact surface for the spherical contact. The relationship between the area of the arc tracks on the cathode and the shape of contact surface is the same as the relationship between the existent areas of measured spectra and the shape of the contact surface. For the spherical contacts, the arc temperature and the metal-vapor quantity are affected a little by the radius of the curved of contact surface and the number of breaking arcs. However, the longer the arc duration, the higher the metal-vapor quantity is in the latter period of the breaking arc. For the flat contacts, the metal-vapor quantity is lower than those for the spherical contacts. The gain and loss of the contacts are less and the arc duration is shorter for the flat contact than for the spherical contact.