This paper proposes an analytical model of maximum operating frequency of class-D zero-voltage-switching (ZVS) inverter. The model includes linearized drain-source parasitic capacitance and any duty ratio. The nonlinear drain-source parasitic capacitance is equally linearized through a charge-related equation. The model expresses the relationship among frequency, shunt capacitance, duty ratio, load impedance, output current phase, and DC input voltage under the ZVS condition. The analytical result shows that the maximum operating frequency under the ZVS condition can be obtained when the duty ratio, the output current phase, and the DC input voltage are set to optimal values. A 650 V/30 A SiC-MOSFET is utilized for both simulated and experimental verification, resulting in good consistency.

L-type LC/CL matching circuits are well known for their simple analytical solutions and have been applied to many radio-frequency (RF) circuits. When actually constructing a circuit, parasitic elements are added to inductors and capacitors. Therefore, each L and C element has a self-resonant frequency, which affects the characteristics of the matching circuit. In this paper, the parallel parasitic capacitance to the inductor and the series parasitic inductor to the capacitance are taken up as parasitic elements, and the details of the effects of the self-resonant frequency of each element on the S11, voltage standing wave ratio (VSWR) and S21 characteristics are reported. When a parasitic element is added, each characteristic basically tends to deteriorate as the self-resonant frequency decreases. However, as an interesting feature, we found that the combination of resonant frequencies determines the VSWR and passband characteristics, regardless of whether it is the inductor or the capacitor.

This study proposed a novel decoupling method for four planar inverted-F antennas (PIFAs) operating at 2.0GHz (f0). The edge-to-edge and center-to-center spacings of the adjacent PIFAs are extremely small (0.05λ0 and 0.17λ0, respectively), resulting in strong mutual coupling among them. In our previous study, we proposed a structure consisting of parasitic elements (PEs) and a bridge line (BL) for the decoupling of two PIFAs. One attractive feature of the proposed method is that no adjustment of the original structure and size of the PIFAs is necessary. However, as the number of PIFAs increases to four, their decoupling becomes considerably more complicated, and impedance mismatch is also an issue to be considered. Therefore, in this study, PEs and BLs are functionally developed to simultaneously achieve low mutual coupling and improved impedance matching of the four PIFAs. The simulated results showed that loading the proposed PEs and BLs onto the four PIFAs could reduce as well as maintain all mutual coupling for less than -10dB, and simultaneously improve impedance matching. Therefore, the total antenna efficiency at 2.0GHz could be significantly improved from 64.2% to 84.8% for PIFA1 and PIFA4, and from 35.9% to 74.2% for PIFA2 and PIFA3. Four PIFAs with PEs and BLs were fabricated and measured to validate the simulation results.

This paper presents a high-NIR sensitivity SOI-gate lock-in pixel with improved modulation contrast. The proposed pixel has a shallow buried channel and intermediate gates to create both a high lateral electric field and a potential barrier to parasitic light sensitivity. Device simulation results showed that parasitic light sensitivity reduced from 13.7% to 0.13% compared to the previous structure.

In this study, a novel decoupling method using parasitic elements (PEs) connected by a bridge line (BL) for two planar inverted-F antennas (PIFAs) is proposed. The proposed method is developed from a well-known decoupling method that uses a BL to directly connect antenna elements. When antenna elements are connected directly by a BL, strong mutual coupling can be reduced, but the resonant frequency shifts to a different frequency. Hence, to shift the resonant frequency toward the desired frequency, the original size of the antenna elements must be adjusted. This is disadvantageous if the method is applied in cases where the design conditions render it difficult to connect the antennas directly or adjust the original antenna size. Therefore, to easily reduce mutual coupling in such a case, a decoupling method that does not require both connecting antennas directly and adjusting the original antenna size is necessitated. This study demonstrates that using PEs connected by a BL reduces the mutual coupling from -6.6 to -14.1dB, and that the resonant frequency is maintained at the desired frequency (2.0GHz) without having to adjust the original PIFAs size. In addition, impedance matching can be adjusted to the desired frequency, resulting in an improved total antenna efficiency from 77.4% to 94.6%. This method is expected to be a simple and effective approach for reducing the mutual coupling between larger numbers of PIFA elements in the future.

Urban area suffers severe multipath effects due to its complex infrastructure environment and sector antenna is a popular choice as a base station antenna in those areas. Within sector antennas, omni cell antenna is utilized as supporting antenna to cover low reception areas between them. This paper proposes a slant 45° dual polarized omnidirectional antenna to operate as the omni cell antenna in those environments. The frequency band covers the IMT band, ranging from 1920MHz to 2170MHz with directivity focusing in horizontal plane. The antenna structure consists of a loop slot antenna array as excitation element which is placed inside a cylindrical slot antenna as parasitic element. Good performance is achieved in both S-parameter and directivity results, with a gain of more than 4 dBi and a gain difference of less than 1.5dB. The measurement results also agree well with the simulation results and the final design confirms that the proposed antenna works effectively as a slant ±45 ° dual polarized omnidirectional antenna.

This paper improves radiation patterns and impedance matching of a broadband sleeve dipole antenna. A broadband sleeve dipole antenna is designed and the effect of the structure parameters on the |S11| characteristics is calculated. Current distributions of the resonance frequencies are calculated. A broadband sleeve dipole antenna with plate element is proposed. Better impedance matching is obtained by adjusting the size of the plate element. The nulls of the radiation patterns are reduced at high frequencies and the gain in the horizontal direction is improved.

This paper presents the Received-Signal-Strength-Indicator (RSSI) based living-body radar, which uses only a single RF front-end and a few parasitic antennas. This radar measures the RSSI variation at the single active antenna while varying the terminations of the parasitic antennas. The propagation channel is estimated from just the temporal transition of RSSI; our proposal reconstructs the phase information of the signal. In this paper, we aim to estimate the direction of living-body. Experiments are carried out and it is found that most angular errors are within the limit of the angular width of the living-body.

In this work, the metal-oxide-metal (MOM) capacitor in the scaled CMOS process has been modeled at high frequencies using an EM simulator, and its layout has been optimized. The modeled parasitic resistance consists of four components, and the modeled parasitic inductance consists of the comb inductance and many mutual inductances. Each component of the parasitic resistance and inductance show different degrees of dependence on the finger length and on the number of fingers. The substrate network parameters also have optimum points. As such, the geometric dependence of the characteristics of the MOM capacitor is investigated and the optimum layout in the constant-capacitance case is proposed by calculating the results of the model. The proposed MOM capacitor structures for 50fF at f =60GHz are L =5μm with M =3, and, L =2μm with M =5 and that for 100fF at f =30GHz are L =9μm with M =3, and L =4μm with M =5. The target process is 65-nm CMOS.

A 1.9GHz film bulk acoustic resonator (FBAR)-based low-phase-noise complementary cross-coupled voltage-controlled oscillator (VCO) is presented. The FBAR-VCO is designed and fabricated in 0.18µm CMOS process. The DC latch and the low frequency instability are resolved by employing the NMOS source coupling capacitor and the DC blocked cross-coupled pairs. Since no additional voltage headroom is required, the proposed FBAR-VCO can be operated at a low power supply voltage of 1.1V with a wide voltage swing of 0.9V. An effective phase noise optimization is realized by a reasonable trade-off between the output resistance and the trans-conductance of the cross-coupled pairs. The measured performance shows the proposed FBAR-VCO achieves a phase noise of -148dBc/Hz at 1MHz offset with a figure of merit (FoM) of -211.6dB.

We describe a calculation tool and modeling methods to find self and mutual inductance and current distribution in superconductive multilayer circuit layouts. Accuracy of the numerical solver is discussed and compared with experimental measurements. Effects of modeling parameter selection on calculation results are shown, and we make conclusions on the selection of modeling parameters for fast but sufficiently accurate calculations when calibration methods are used. Circuit theory for the calculation of branch impedances from the output of the numerical solver is discussed, and compensation for solution difficulties is shown through example. We elaborate on the construction of extraction models for superconductive integrated circuits, with and without resistive branches. We also propose a method to calculate current distribution in a multilayer circuit with multiple bias current feed points. Finally, detailed examples are shown where the effects of stacked vias, bias pillars, coupling, ground connection stacks and ground return currents in circuit layouts for the AIST advanced process (ADP2) and standard process (STP2) are analyzed. We show that multilayer inductance and current distribution extraction in such circuits provides much more information than merely branch inductance, and can be used to improve layouts; for example through reduced coupling between conductors.

This paper presents a 20GHz Class-C VCO using a noise sensitivity mitigation technique. A radio frequency Class-C VCO suffers from the AM-PM conversion, caused by the non-linear capacitance of cross coupled pair. In this paper, the phase noise degradation mechanism is discussed, and a desensitization technique of AM-PM noise is proposed. In the proposed technique, AM-PM sensitivity is canceled by tuning the tail impedance, which consists of 4-bit resistor switches. A 65-nm CMOS prototype of the proposed VCO demonstrates the oscillation frequency from 19.27 to 22.4GHz, and the phase noise of -105.7dBc/Hz at 1-MHz offset with the power dissipation of 6.84mW, which is equivalent to a Figure-of-Merit of -183.73dBc/Hz.

Two types of 3D folded dipole antenna with feed line (FDAFL) were reported for a small terminal, which covered WiMAX 2.5/3.5GHz bands and WLAN 2.4GHz band. In this study, folded monopole antenna (FMA) is proposed as a variant of FDAFL. We show the broadband characteristics of FMA and determine the most suitable configuration of FMA array for realizing MIMO system. Also, a multiband variant is created by introducing a parasitic element to FMA. The result is a multiband FMA array with parasitic elements operating at 5GHz band of WiMAX and WLAN as well as WiMAX 2.5/3.5GHz bands and WLAN 2.4GHz band with total antenna efficiency of between 70% to 96% and the envelope correlation coefficient of less than 0.02. Finally, a prototype antenna is implemented, and we confirm the validity of the simulation by comparison to measured results.

In this paper, the measurement of capacitance variation, of an on-chip power distribution network (PDN) due to the change of internal states of a CMOS logic circuit, is studied. A state-dependent PDN-capacitance model that explains measurement results will be also proposed. The model is composed of capacitance elements related to MOS transistors, signal and power supply wires, and substrate. Reflecting the changes of electrode potentials, the capacitance elements become state-dependent. The capacitive elements are then all connected in parallel between power supply and ground to form the proposed model. By using the proposed model, state-dependence of PDN-capacitances for different logic circuits are studied in detail. The change of PDN-capacitance exceeds 12% of its total capacitance in some cases, which corresponds to 6% shift of anti-resonance frequency. Consideration of the state-dependence is important for modeling the PDN-capacitance.

This paper describes a novel technique to replace some of the driven elements in an array antenna with parasitic elements. First, the antenna characteristics are studied by simulation for a basic unit array with one driven and two parasitic elements. The entire antenna is backed with a flat reflector to conform to practical applications. The parasitic elements are excited by the neighboring driven elements through the electromagnetic coupling effect. It is shown that at the optimal coupling condition, the radiation patterns are almost identical with those of an array antenna whose elements are all driven without coupling. The simulation result is confirmed by performing an experiment at 5.8GHz (λ =51.7mm). Finally, a 12-element array is formed by combining four unit arrays. The simulation results show that the maximum antenna gain is 19.4dBi, indicating that there is no penalty with respect to the antenna gain of a fully driven 12-element array. Therefore, the array antenna can be considerably simplified by replacing 67% of its elements with parasitic elements.

Single front-end architecture with parasitic antenna element (PAE) in compact array system has been proposed for enhancing spectral efficiency and miniaturizing the receiver. Although most of studies paid attention to design optimal receiver with antenna mutual coupling on fading correlation, relatively little attention has been paid to noise. In this paper, we propose a low noise model for single front-end MIMO receiver system with PAE which includes arbitrary signal and noise coupling. The proposed model articulates physical noise sources and relates their spatial correlation with array receive antennas, parasitic element, front-end and matching circuit. A matching circuit is designed to achieve minimum noise figure. After that, the optimal PAE value is derived to maximize channel capacity. We present numerical analysis to verify the proposed system on certain conditions.

Switched parasitic capacitors of sleep blocks with a tri-mode power gating structure are implemented to reduce on-chip resonant supply noise in 1.2 V, 65 nm standard CMOS process. The tri-mode power gating structure makes it possible to store charge into the parasitic capacitance of the power gated blocks. The proposed method achieves 53.1% and 57.9% noise reduction for wake-up noise and 130 MHz periodic supply noise, respectively. It also realizes noise cancelling without discharging time before using parasitic capacitors of sleep blocks, and shows 8.4x boost of the effective capacitance value with 2.1% chip area overhead. The proposed method can save the chip area for reducing resonant supply noise more effectively.

In recent years, wireless communication technology has been studied intensively. In particular, MIMO which employs several transmit and receive antennas is a key technology for enhancing spectral efficiency. However, conventional MIMO architectures require some transceiver circuits for the sake of transmitting and receiving separate signals, which incurs the cost of one RF front-end per antenna. In addition to that, MIMO systems are assumed to be used in low spatial correlation environment between antennas. Since a short distance between each antenna causes high spatial correlation and coupling effect, it is difficult to miniaturize wireless terminals for mobile use. This paper shows a novel architecture which enables mobile terminals to be miniaturized and to work with a single RF front-end by means of adaptive analog beam-forming with parasitic antenna elements and antenna switching for spatial multiplexing. Furthermore, statistical analysis of the proposed architecture is also discussed in this paper.

A multiband monopole antenna with modified fractal loop parasitic is presented. Especially, bow-tie stubs and a modified fractal loop are attached to the sides and bottom of a strip line monopole antenna, respectively, in order to generate the multi-resonant frequencies for the applications of wireless communication systems. The characteristics of the presented antenna have been examined by using the simulation software. The comparison between the simulated and measured results confirms the good agreement. The results show good multiband operation with 10 dB impedance bandwidths of 15.55%, 8.75%, and 31.94% at the resonant frequencies of 1.8 GHz, 2.4 GHz, and 3.6 GHz, respectively, which cover the operating band applications of DCS 1800, WLAN (IEEE802.11 b/g), WiMAX, and IMT advanced system (4G mobile communication system).

A novel NMOS Electrostatic Discharge (ESD) clamp circuit is proposed for a 0.35 µm Bipolar-CMOS-DMOS (BCD) process. The proposed ESD clamp has a non-snapback characteristic because of gate-coupled effect. This proposed ESD clamp circuit is developed without additional components made possible by replacing a capacitor with an isolated parasitic capacitor. The result of the proposed ESD clamp circuit is measured by 100 ns Transmission Line Pulse (TLP) system. From the measurement, it was observed that the proposed ESD clamp has approximately 40% lower triggering voltage compared to the conventional gate-grounded NMOS ESD clamp. This is achieved without degradation of the other ESD design key parameter. The proposed ESD clamp also has high robustness characteristics compared to the conventional RC-triggered NMOS ESD clamp circuit.