We present our recent work on monolithically integrated devices comprising a variety of functional elements such as high speed optical transmitters and receivers, electro-absorption modulators integrated with tunable dispersion compensators and fast-tunable wavelength converters.

We present recent progress of high-speed Mach-Zehnder modulator technologies for advanced modulation formats. Multi-level quadrature amplitude modulation signal can be synthesized by using parallel Mach-Zehnder modulators. We can generate complicated multi-level optical signals from binary data streams, where binary modulated signals are vectorially summed in optical circuits. Frequency response of each Mach-Zehnder interferometer is also very important to achieve high-speed signals. We can enhance the bandwidth of the response, with thin substrate. 87 Gbaud modulation was demonstrated with a dual-parallel Mach-Zehnder modulator.

This paper describes the recent advances in semiconductor photodiodes for use in ultra-high-speed optical systems. We developed two types of waveguide photodiodes (WG-PD) -- an evanescently coupled waveguide photodiode (EC-WG-PD) and a separated-absorption-and-multiplication waveguide avalanche photodiode (WG-APD). The EC-WG-PD is very robust under high optical input operation because of its distribution of photo current density along the light propagation. The EC-WG-PD simultaneously exhibited a high external quantum efficiency of 70% for both 1310 and 1550 nm, and a wide bandwidth of more than 40 GHz. The WG-APD, on the other hand, has a wide bandwidth of 36.5 GHz and a gain-bandwidth product of 170 GHz as a result of its small waveguide mesa structure and a thin multiplication layer. Record high receiver sensitivity of -19.6 dBm at 40 Gbps was achieved. Additionally, a monolithically integrated dual EC-WG-PD for differential phase shift-keying (DPSK) systems was developed. Each PD has equivalent characteristics with 3-dB-down bandwidth of more than 40 GHz and external quantum efficiency of 70% at 1550 nm.

We present a novel high-speed transmitter consisting of a frequency modulated DBR laser and optical filters. The refractive index modulation in the phase control region of the DBR laser allows high-speed frequency modulation. The generated frequency modulated signal is converted to an intensity modulated signal using the edge of the optical filter pass band. We present theoretical simulations of high-speed modulation characteristics and extension of transmission reach. With the proposed transmitter, we review the experimental demonstration of 180-km transmission of a 10-Gb/s signal with a tuning range of 27 nm and 60-km transmission of a 20-Gb/s signal.

We have developed a high-speed electroabsorption modulator integrated distributed feedback (EA/DFB) lasers. Transmission performance over 10 km was investigated under 25 Gbps and 43 Gbps modulation. In addition, the feasibility of wide temperature range operation was also investigated. An uncooled EA/DFB laser can contribute to the realization of low-power-consumption, small-footprint and cost-effective transceiver module. In this study, we used the temperature-tolerant InGaAlAs materials in an EA modulator. A wide temperature ranged 12 km transmission with over 9.6 dB dynamic extinction ratio was demonstrated under 25 Gbps modulation. A 43 Gbps 10 km transmission was also demonstrated. The laser achieved a clear, opened eye diagram with a dynamic extinction ratio over 7 dB from 25 to 85. The modulated output power was more than +2.9 dBm even at 85. These devices are suitable for next-generation, high-speed network systems, such as 40 Gbps and 100 Gbps Ethernet.

We have developed InGaAs-based VCSELs operating around 1.1 µm for high-speed optical interconnections. By applying GaAsP barrier layers, temperature characteristics were considerably improved compared to GaAs barrier layers. As a result, 25 Gbps 100 error-free operation was achieved. These devices also exhibited high reliability. No degradation was observed over 3,000 hours under operation temperature of 150 and current density of 19 kA/cm². We also developed VCSELs with tunnel junctions for higher speed operation. High modulation bandwidth of 24 GHz and a relaxation oscillation frequency of 27 GHz were achieved. 40 Gbps error-free operation was also demonstrated.

A compact (13.38.05.6 mm) 40 Gbit/s 1.55-µm electroabsorption (EA) modulator monolithically integrated distributed feedback (DFB) laser diode (EML) [1] module integrated with a driver IC has been developed. Its compactness was realized by employing a broadband feed-through and a bias tee which were accurately designed by 3-dimensional (3D) electromagnetic simulation. It was confirmed that the simulation results of the frequency response and the actual measurement results are corresponding well. Clear eye opening of the 40 Gbit/s optical output waveform of the fabricated EML module was observed. Degradation was not observed even when the 40 Gbit/s electrical signal was launched into the module via the flexible printed circuit (FPC).

Optical buffer memory for 10-Gb/s data signal is demonstrated experimentally using a polarization bistable vertical-cavity surface-emitting laser (VCSEL). The optical buffer memory is based on an optical AND gate function and the polarization bistability of the VCSEL. Fast AND gate operation responsive to 50-ps-width optical pulses is achieved experimentally by increasing the detuning frequency between an injection light into the VCSEL and a lasing light from the VCSEL. A specified bit is extracted from the 10-Gb/s data signal by the fast AND gate operation and is stored as the polarization state of the VCSEL by the polarization bistability. The corresponding numerical simulations are also performed using two-mode rate equations taking into account the detuning frequency. The simulation results confirm the fast AND gate operation by increasing the detuning frequency as well as the experimental results.

A 2.5 GHz 8-phase phase-locked loop (PLL) is proposed for 10-Gbps system on chip (SoC) transmission links application. The proposed PLL has several features which use new design techniques. The first one is a new variable delay cell (VDC) for the voltage control oscillator (VCO). Its advantages over the conventional delay cell are: wide-range output frequency and low noise sensitivity with low K_VCO. The second feature is that, the PLL consists of a self-calibration circuit (SCC) which protects the PLL from variations in the process, voltage and temperature (PVT). The third feature is that, the proposed PLL has an 8-phase output frequency and also for avoiding the power/ground (P/G) effect and the substrate noise effect on the PLL, it also has a low jitter output frequency. The PLL is implemented in 0.13-µm CMOS technology. The PLL output jitter is 2.83 ps (rms) less than 0.7% of the output period. The total power dissipation is 21 mW at 2.5 GHz output frequency, and the core area is 0.08 mm².

In this letter a new analytical method is presented for estimating the timing jitter of CMOS ring oscillators due to power supply noise. Predictive jitter equation is presented, and the proposed method is utilized to study the jitter induced by power supply noise in an inverter-based ring oscillator, which is designed and simulated in SMIC 0.13-µm standard CMOS process. A comparison between the results obtained by the proposed method and those obtained by HSPICE simulation proves the accuracy of the predictive equation. Most of the errors between the theoretic calculation and simulation results are less than 3 ps.