In this paper, trellis coded modulation with bandwidth expansion is examined. The proposed scheme is a modified Symbol-rate-increased TCM [3]-[5], which allows the bandwidth expansion ratio to be varied to an arbitrary value. The Symbol-rate-increased TCM has been shown to be a particular case of the proposed scheme. Simulation results have clarified that the proposed scheme achieves a significant improvement over an uncoded scheme in an AWGN channel.

An encoder of a trellis coded modulation (TCM) is composed of a linear convolutional encoder followed by a mapper to channel signals. A new condition, under which the performance evaluation of the TCM is possible based on the 2ν state error state transition diagram, is proposed, where ν is the number of delay elements in the convolutional encoder. There have been proposed three similar methods. This paper points out the restriction of the previous methods, and proposes a new method. The condition, under which the previous method is useful, is called nuiformity, such as, the error weight profile is independent from the encoder state. When uniformity does not hold, we discuss to divide an error state into substates based on the coset decomposition of output vectors of the convolutional encoder. The coset is determined by the vector called coset selector. If the condition defined as equal dividing holds, the subdivided states can be merged and the performance can be evaluated based on the 2ν state transition diagram, even for the codes without uniformity. When the row rank of the transformation matrix, from the input vector of the encoder to the coset selector vector, is full, the equal dividing condition holds under the assumption of equally probable i.i.d. (independently identically distributed) input sequence. For TCM schemes without uniformity (in the case, previous methods can not be applied), upper bounds of the bit error rate are evaluated by the proposed method and compared with the simulation results. The difference is less than 10% in the range of bet error rate 10-4.

Learning correctly from queries" is a formal learning model proposed by Angluin. In this model, for a class Γ of language representations, a learner asks queries to a teacher of an unknown language Lq which can be represented by some GqΓ, and eventually outputs a language representation GΓ which represents Lq and halts. An algorithm (leaner) A is said to learn a class of languages represented by Γ in the weak definition if the time complexity of A is some polynomial of n and m, where n is the minimum size of the lagunage representations in Γ which represent Lq, and m is the maximum length of the counterexamples returned in an execution. On the other band, A is said to learn represented by Γ in the strong definition if at any point τ of the execution, the time consumed up to τ is some polynomial of n and m, where n is the same as above, and m is the maximum length of the counterexamples returned up to τ. In this paper, adequacy of the model is examined, and it is shown that both in the weak and strong definitions, there exist learners which extract a long counterexample, and identify Lq by using equivalence queries exhaustively. For example, there exists a learner which learns the class CFL of context-free languages represented by the class CFG of context-free grammars in the weak definition using only equivalence queries. Next, two restrictions concerning with learnability criteria are introduced. Proper termination condition is that when a teacher replies with yes" to an equivalence query, then the learner must halt immediately. The other condition, called LBC-condition, is that in the weak/strong definition, the time complexity must be some polynomial of n and log m. In this paper, it is shown that under these conditions, there still exist learners which execute exhaustive search. For instance, there exists a learner which learns CFL represented by CFG in the weak definition using membership queries and equivalence queries under the proper termination condition, and there also exists a learner that learns CFL represented by CFG in the strong definition using subset queries and superset queries under LBC-condition. These results suggest that the weak definition is not an adequate learning model even if the proper termination condition is assumed. Also, the model becomes inadequate in the strong definition if some combination of queries, such as subset queries and superset queries, is used instead of equivalence queries. Many classes of languages become learnable by our extracting long counterexample" technique. However, it is still open whether or not CFL represented by CFG is learnable in the strong definition from membership queries and equivalence queries, although the answer is known to be negative if at least one of (1) quadratic residues modulo a composite, (2) inverting RSA encryption, or (3) factoring Blum integers, is intractable.

This paper reports on the properties of thin-film thermal switches that are monolithically fabricated on high-Tc superconductive filter. Operating at a wide temperature range of 50-77 K, it was found that the switch could control the center frequency by -10 MHz with an increased insertion loss of less than 0.7 dB. In an on-off switching operation of filter characteristics using thin-film switches, power consumption was approximately 20 mW at 77 K, and the signal decay time as a switching speed was 30 ms at 76 K with a switch current of 70 mA. The decay time decreased exponentially as the switch current or the temperature setting increased.

A method is described for constructing an interpolant to a set of arbitrary data points (xi, yi), i1, 2, , n. The constructed interpolant is a piecewise parametric cubic polynomial and satisfies C1 continuity, and it reproduces all parametric polynomials of degree two or less exactly. The experiments to compare the new method with Bessel method and spline method are also shown.

New circuit techniques were proposed to realize a high-density and high-performance content addressable memory (CAM). A dynamic register which functions as a status flag, and some logic circuits are organically combined and flexibly perform complex search operations, despite the compact layout area. Any kind of logic operations for the search results, that are AND, OR, INVERT, and the combinations of them, can be implemented in every word simultaneously. These circuits are implemented in an experimental 288 kbit dynamic CAM using 0.8 µm CMOS process technology. We consider these techniques to be indispensable for high-density and high-performance dynamic CAM.

In this paper, the Pisarenko and the Constrained Yule-Walker (CYW) estimators of a tone frequency are first newly derived from the viewpoint of using directly the autocorrelation coefficients. Then, simulation of these two estimators is carried out in some detail. The simulation results show that compared with the Pisarenko estimator the CYW estimator, which has not been adequately studied, works poorly for low and moderate Signal-to-Noise Ratio (SNR) values. However, in case of high SNR value, it yields very small bias and comparable estimation variance, and thus produces more accurate tone frequency estimates.

We compare interfaces of Nb/AlOx-Al/Nb and Nb/ZrOx-Zr/Nb junctions using secondary ion mass spectroscopy and cross-sectional transmission electron microscopy. We have clarified that an interface of the Nb/AlOx-Al/Nb junction is drastically different from that of the Nb/ZrOxZr/Nb junction. An adsorbed water vapor layer plays an important role in suppressing grain boundary diffusion between Nb and Al at the interface of the Nb/AlOxAl/Nb junction. In depositing Nb and Al at low power and cooling the substrate, it is important to control the formation of the adsorbed water vapor layer for fabricating Nb/AlOx-Al/Nb junctions exhibiting excellent current-voltage characteristics.

We have fabricated Nb/AlOx/Nb Josephson tunnel junctions by a sputtering apparatus with a load-lock system. This sputtering apparatus had the sub chamber for preparation and the main chamber for sputtering. The substrate temperature was confirmed to be kept less than 85 during Nb sputtering at the deposition rate of 1.18 nm/s for 7 minutes. The junctions that had 50µm50 µm area successfully showed the Vm value (the product of the critical current and the subgap resistance at 2 mV) as high as 50 mV at the current density of 100 A/cm2.

The magnitude of low frequency noise is studied in a Nb-(nanoconstrictions)-NbN system with adjustable current-voltage characteristics. We find that the magnitude of low frequency noise decreases sharply with increasing the subgap conductivity of the device. We suggest a qualitative explanation of this observation in terms of gradual build up of the nanoconstriction region by field assisted growth. The decrease of low frequency noise is related to the "cleanliness" of the system as measured by the amount of Andreev reflection-related conductivity. The scaling of the magnitude of low frequency noise with device resistance is also discussed.

We have systematically grown and characterized (Bi, Pb)2Sr2CaCu2Oy (BPSCCO) single crystals, and investigated the tunneling properties and the intrinsic Josephson effects of the single crystals as a function of the nominal composition of Pb, x. It was observed that Pb atoms (ions) were monotonically substituted for Bi atoms (ions) in the (Bi, Pb)-O layers of the crystals with increasing x in a region of 0x0.5, while the modulation structure was maintained in a range of 0x0.3, but disappeared in x0.3, accompanying the decrease of c-lattice parameter and Tc. Moreover, it was found that the energy gaps Δ of BPSCCO depend hardly on x for x0.5, which are about 24 meV, so that the Pb-induced electronic change in the (Bi, Pb)-O layer do not perturb the electronic states in this superconducting system. And it was confirmed that the currentvoltage characteristics of the BPSCCO single crystals had multiple resistive branches corresponding to a series array of several hundreds Josephson junctions, and showed Shapiro steps and zero-crossing steps with the voltage separation of the order of mV resulting from the phase locking of about a hundred Josephson junctions among them under microwave irradiation. The estimated number of junctions gave the concept that the intrinsic Josephson junctions consist of the superconducting block layers and the insulating layers in the BPSCCO single crystals.

Fabrication of all-epitaxial high-Tc SIS tunnel junctions requires an atomically flat superconducting thin film to be grown and a proper insulating material to be selected. First, we study the initial growth mode of YBCO thin films and show that reducing the growth rate results in a very smooth surface. Second, perovskite-related compound oxides, PrGaO3 and NdGaO3, which have a small lattice mismatch with YBCO and good wetability, are shown to be promising insulating materials for all-epitaxial SIS tunnel junctions. We believe that these concepts will be useful in the development of all-epitaxial high-Tc SIS tunnel junctions with good electrical properties.

High temperature superconductors are eminently suitable for use in high frequency devices because of their large energy gap. We fabricated weak link Josephson junctions connected in series. The junctions were constructed of EuBa2Cu3O7-x (EBCO) superconducting thin films on bicrystal MgO substrates. We measured their microwave broadband detection (video detection) characteristics. The responsivity (Sr) of the junctions depended on the bias current and their normal state resistance. The array junctions were effective in increasing normal state resistance. We obtained a maximum Sr of 22.6 [V/W].

The progress of LSI technologies makes it possible to fabricate 256 MDRAM. However, it depends on the cost effectiveness of device fabrication that LSI memory can continue to be the technology driver or not. It is indispensable to make the device, process, and equipment as simple as possible for next generation LSI. For example, wavefront technologies in lithography, high energy ion implantation, and simple DRAM cell with SOI structure or high dielectric constant capacitor, are under development to satisfy both device performance improvement and process simplicity.

This paper describes CMOS embedded RAMs we developed utilizing 1.3 µm and 0.8 µm process technologies. Our goal was to achieve high-performance switching for digital communication systems. Because such switching can best be obtained by using high-performance embedded RAMs, we used 0.8 µm process technology and developed a 4 kW9 b single-port embedded RAM with 5 ns access time and 100 mW power dissipation during32 MHz operation, and a 1 kW9 b dual-port embedded RAM with 3.7 ns access time and 100 mW power dissipation during 40 MHz operation. We implemented these RAMs on one chip in developing three time-switch VLSIs, one buffer memory VLSI for ATM switches, and two cross-connect switch VLSIs.

This paper presents new go-back-N ARQ protocols for point-to-multipoint communications over broadcast channels such as satellite or broadcast radio channels. In the conventional go-back-N ARQ protocols for multidestination communications, usually only error detection codes are used for error detection and m copies of a frame are transmitted at a time. In one of our protocols, a bit-by-bit majority-voting decoder based on all of the m copies of a frame is used to recover the transmitted frame. In another protocol, a hybrid-ARQ protocol, which is an error detection code concatenated with a rate repetition convolutional code with the Viterbi decoding, is used. In these protocols, a dynamic programming technique is used to select the optimal number of copies of a frame to be transmitted at a time. The optimal number is determined by round trip propagation delay of the channel, the error probability, and the number of receivers that have not yet received the message. Analytic expressions are derived for the throughput efficiency of the proposed protocols. The proposed point-to-multipoint protocols provide satisfactory throughput efficiency and perform considerably better than the conventional protocols under high error rate conditions, especially in environments with a large number of receivers and large link round trips. In this paper we analyze the performances of the proposed protocols upon the random error channel conditions.

The performance of multi-pulse pulse position modulation (MPPM) consisting of m slots and 2 pulses, denoted as (m, 2) MPPM, with imperfect slot synchronization is analyzed. The word error probability of (m, 2) MPPM in the presence of timing offset is analyzed, and the optimum symbol sets of (m, 2) MPPM minimizing the symbol error probability are assigned. When an unassigned symbol is detected, the receiver decodes the unassigned symbol as one of the assigned symbols having the highest probability of transition from the assigned symbol to the unassigned symbol. The bit error probability of (m, 2) MPPM in the presence of the timing offset is analyzed, and the bit error probability of (m, 2) MPPM is compared with that of PPM for the same transmission bandwidth and the same transmission rate. Moreover, the bit error probability of (m, 2) MPPM synchronized by a phase-locked loop (PLL) is also analyzed. It is shown that a word with two continuous pulses has better performance than a word with two separate pulses. It is also shown that when the timing offset occurs, and when the slot clock is synchronized by a PLL, (m, 2) MPPM performs better than PPM because (m, 2) MPPM has the optimum assigned symbols, and can decode detected words more correctly than PPM.

A method for extracting and recognizing character strings from unformed document images, which have inclined character strings and have no structure at all, is described. To process such kinds of unformed documents, previous schemes, which are intended only to deal with documents containing nothing but horizontal or vertical strings of characters, do not work well. Our method is based on the idea that the processes of recognition and extraction of character patterns should operate together, and on the characteristic that the character patterns are located close to each other when they belong to the same string. The method has been implemented and applied to several images. The experimental results show the robustness of our method.

We propose a new structure of antenna system to enhance the horizontal plane gain and control the antenna pattern, using passive loading. Our proposed structure can be applied to various kinds of antennas on a handset. We discuss the case of a λ/4 monopole antenna on a handset in this paper. In a new structure of λ/4 monopole antenna system, we show that, 1) the increase of the average gain about 5dB in the horizontal plane can be realized by an optimum load, 2) the antenna pattern can be controlled by changing the value of the passive load so as to have some desirable shapes, and 3) the antenna size can be made smaller by about 6% than the one with no loading because the optimum loading makes the resonant frequency lower. These results were confirmed by the calculations using the method of moments for the EFIE and the measurements.

It is demonstrated that the enhancement in the functional capability of an elemental transistor is quite essential in developing human-like intelligent electronic systems. For this purpose we have introduced the concept of four-terminal devices. Four-terminal devices have an additional dimension in the degree of freedom in controlling currents as compared to the three-terminal devices like bipolar and MOS transistors. The importance of the four-terminal device concept is demonstrated taking the neuron MOS transistor (abbreviated as neuMOS or νMOS) and its circuit applications as examples. We have found that any Boolean functin can be realized by a two-stage configuratin of νMOS inverters. In addition, the variable threshold nature of the device allows us to build real-time reconfigurable logic circuits (no floating gate charging effect is involved in varying the threshold). Based on the principle, we have developed Soft-Hardware Logic Circuits and Real-Time Rule-Variable Data Matching Circuits. A winner-take-all circuit which finds the largest signal by hardware parallel processing has been also developed. The circuit is applied to building an associative memory which is different from Hopfield network in both principle and operation. The hardware algorithm in which binary, multivalue, and analog operations are merged at a very device level is quite essential to establish intelligent information processing systems based on highly flexible, real-time programmable hardwares realized by four-terminal devices.